| /netbsd/src/sys/arch/hpcmips/dev/ |
| D | mq200debug.c | 63 u_int32_t reg, pm00r; in mq200_dump_pll() local
76 reg = mq200_read(sc, MQ200_MMR(1)); in mq200_dump_pll()
77 memclock = (reg & MQ200_MM01_CLK_PLL2) ? 2 : 1; in mq200_dump_pll()
83 reg = mq200_read(sc, MQ200_DCMISCR); in mq200_dump_pll()
84 m = ((reg & MQ200_PLL_M_MASK) >> MQ200_PLL_M_SHIFT) + 1; in mq200_dump_pll()
85 n = ((((reg & MQ200_PLL_N_MASK) >> MQ200_PLL_N_SHIFT) + 1) | in mq200_dump_pll()
87 n <<= ((reg & MQ200_PLL_P_MASK) >> MQ200_PLL_P_SHIFT); in mq200_dump_pll()
90 reg, FIXEDFLOAT1000(sc->sc_baseclock), m, n); in mq200_dump_pll()
95 reg = mq200_read(sc, MQ200_PLL2R); in mq200_dump_pll()
96 m = ((reg & MQ200_PLL_M_MASK) >> MQ200_PLL_M_SHIFT) + 1; in mq200_dump_pll()
[all …]
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| /netbsd/src/sys/dev/pci/ |
| D | pci_subr.c | 925 pcireg_t reg; in pci_conf_print_common() local
928 reg = regs[o2i(pcie_capoff + PCIE_XCAP)]; in pci_conf_print_common()
929 if (PCIE_XCAP_TYPE(reg) == PCIE_XCAP_TYPE_RC_EVNTC) in pci_conf_print_common()
980 const pcireg_t *regs, int reg, const char *name) in pci_conf_print_bar() argument
1005 rval = regs[o2i(reg)]; in pci_conf_print_bar()
1008 rval64h = regs[o2i(reg + 4)]; in pci_conf_print_bar()
1027 pci_conf_write(pc, tag, reg, 0xffffffff); in pci_conf_print_bar()
1028 mask = pci_conf_read(pc, tag, reg); in pci_conf_print_bar()
1029 pci_conf_write(pc, tag, reg, rval); in pci_conf_print_bar()
1032 pci_conf_write(pc, tag, reg + 4, 0xffffffff); in pci_conf_print_bar()
[all …]
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| /netbsd/src/external/gpl3/binutils/dist/gas/config/ |
| D | bfin-parse.c | 100 #define LDIMMHALF_R(reg, h, s, z, hword) \ argument
101 bfin_gen_ldimmhalf (reg, h, s, z, hword, 1)
103 #define LDIMMHALF_R5(reg, h, s, z, hword) \ argument
104 bfin_gen_ldimmhalf (reg, h, s, z, hword, 2)
106 #define LDSTIDXI(ptr, reg, w, sz, z, offset) \ argument
107 bfin_gen_ldstidxi (ptr, reg, w, sz, z, offset)
109 #define LDST(ptr, reg, aop, sz, z, w) \ argument
110 bfin_gen_ldst (ptr, reg, aop, sz, z, w)
112 #define LDSTII(ptr, reg, offset, w, op) \ argument
113 bfin_gen_ldstii (ptr, reg, offset, w, op)
[all …]
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| /netbsd/src/sys/arch/hpcmips/tx/ |
| D | tx39biu.c | 88 txreg_t reg; in tx39biu_attach() local
101 reg = tx_conf_read(tc, TX39_MEMCONFIG4_REG); in tx39biu_attach()
102 reg |= TX39_MEMCONFIG4_ENWATCH; in tx39biu_attach()
103 reg = TX39_MEMCONFIG4_WATCHTIMEVAL_SET(reg, 0xf); in tx39biu_attach()
104 tx_conf_write(tc, TX39_MEMCONFIG4_REG, reg); in tx39biu_attach()
106 reg = tx_conf_read(tc, TX39_MEMCONFIG4_REG); in tx39biu_attach()
107 if (reg & TX39_MEMCONFIG4_ENWATCH) { in tx39biu_attach()
109 i = TX39_MEMCONFIG4_WATCHTIMEVAL(reg); in tx39biu_attach()
147 txreg_t reg; in tx39biu_intr() local
154 reg = tx_conf_read(tc, TX39_MEMCONFIG4_REG); in tx39biu_intr()
[all …]
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| D | tx39sib.c | 188 txreg_t reg; in tx39sib_enable1() local
194 reg = 0; in tx39sib_enable1()
196 reg = TX39_SIBCTRL_SCLKDIV_SET(reg, param->sp_clock); in tx39sib_enable1()
198 reg = TX39_SIBCTRL_SNDFSDIV_SET(reg, param->sp_snd_rate - 1); in tx39sib_enable1()
200 reg = TX39_SIBCTRL_TELFSDIV_SET(reg, param->sp_tel_rate - 1); in tx39sib_enable1()
202 reg |= param->sp_sf0sndmode; in tx39sib_enable1()
203 reg |= param->sp_sf0telmode; in tx39sib_enable1()
204 tx_conf_write(tc, TX39_SIBCTRL_REG, reg); in tx39sib_enable1()
207 reg = tx_conf_read(tc, TX39_SIBDMACTRL_REG); in tx39sib_enable1()
208 reg &= ~(TX39_SIBDMACTRL_ENDMARXSND | in tx39sib_enable1()
[all …]
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| /netbsd/src/sys/dev/ic/ |
| D | arn9285.c | 187 uint32_t reg, offset = 0x1000; in ar9285_init_from_rom() local
194 reg = AR_READ(sc, AR_PHY_TIMING_CTRL4_0); in ar9285_init_from_rom()
195 reg = RW(reg, AR_PHY_TIMING_CTRL4_IQCORR_Q_I_COFF, modal->iqCalI); in ar9285_init_from_rom()
196 reg = RW(reg, AR_PHY_TIMING_CTRL4_IQCORR_Q_Q_COFF, modal->iqCalQ); in ar9285_init_from_rom()
197 AR_WRITE(sc, AR_PHY_TIMING_CTRL4_0, reg); in ar9285_init_from_rom()
200 reg = AR_READ(sc, AR_PHY_GAIN_2GHZ); in ar9285_init_from_rom()
201 reg = RW(reg, AR_PHY_GAIN_2GHZ_XATTEN1_MARGIN, in ar9285_init_from_rom()
203 reg = RW(reg, AR_PHY_GAIN_2GHZ_XATTEN1_DB, in ar9285_init_from_rom()
205 reg = RW(reg, AR_PHY_GAIN_2GHZ_XATTEN2_MARGIN, in ar9285_init_from_rom()
207 reg = RW(reg, AR_PHY_GAIN_2GHZ_XATTEN2_DB, in ar9285_init_from_rom()
[all …]
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| D | arn9380.c | 306 uint32_t reg; in ar9380_init_from_rom() local
316 reg = AR_READ(sc, AR9485_PHY_65NM_CH0_TOP2); in ar9380_init_from_rom()
317 reg = RW(reg, AR9485_PHY_65NM_CH0_TOP2_XPABIASLVL, in ar9380_init_from_rom()
319 AR_WRITE(sc, AR9485_PHY_65NM_CH0_TOP2, reg); in ar9380_init_from_rom()
322 reg = AR_READ(sc, AR_PHY_65NM_CH0_TOP); in ar9380_init_from_rom()
323 reg = RW(reg, AR_PHY_65NM_CH0_TOP_XPABIASLVL, in ar9380_init_from_rom()
325 AR_WRITE(sc, AR_PHY_65NM_CH0_TOP, reg); in ar9380_init_from_rom()
326 reg = AR_READ(sc, AR_PHY_65NM_CH0_THERM); in ar9380_init_from_rom()
327 reg = RW(reg, AR_PHY_65NM_CH0_THERM_XPABIASLVL_MSB, in ar9380_init_from_rom()
329 reg |= AR_PHY_65NM_CH0_THERM_XPASHORT2GND; in ar9380_init_from_rom()
[all …]
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| D | arn9287.c | 164 uint32_t reg, offset; in ar9287_init_from_rom() local
175 reg = AR_READ(sc, AR_PHY_TIMING_CTRL4_0 + offset); in ar9287_init_from_rom()
176 reg = RW(reg, AR_PHY_TIMING_CTRL4_IQCORR_Q_I_COFF, in ar9287_init_from_rom()
178 reg = RW(reg, AR_PHY_TIMING_CTRL4_IQCORR_Q_Q_COFF, in ar9287_init_from_rom()
180 AR_WRITE(sc, AR_PHY_TIMING_CTRL4_0 + offset, reg); in ar9287_init_from_rom()
182 reg = AR_READ(sc, AR_PHY_GAIN_2GHZ + offset); in ar9287_init_from_rom()
183 reg = RW(reg, AR_PHY_GAIN_2GHZ_XATTEN1_MARGIN, in ar9287_init_from_rom()
185 reg = RW(reg, AR_PHY_GAIN_2GHZ_XATTEN1_DB, in ar9287_init_from_rom()
187 AR_WRITE(sc, AR_PHY_GAIN_2GHZ + offset, reg); in ar9287_init_from_rom()
189 reg = AR_READ(sc, AR_PHY_RXGAIN + offset); in ar9287_init_from_rom()
[all …]
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| D | arn9280.c | 167 uint32_t phy, reg, ndiv = 0; in ar9280_set_synth() local
191 reg = AR_READ(sc, AR_PHY_CCK_TX_CTRL); in ar9280_set_synth()
193 reg |= AR_PHY_CCK_TX_CTRL_JAPAN; in ar9280_set_synth()
195 reg &= ~AR_PHY_CCK_TX_CTRL_JAPAN; in ar9280_set_synth()
196 AR_WRITE(sc, AR_PHY_CCK_TX_CTRL, reg); in ar9280_set_synth()
220 reg = AR_READ(sc, AR_AN_SYNTH9); in ar9280_set_synth()
221 reg = RW(reg, AR_AN_SYNTH9_REFDIVA, 1); in ar9280_set_synth()
222 AR_WRITE(sc, AR_AN_SYNTH9, reg); in ar9280_set_synth()
239 uint32_t reg, offset; in ar9280_init_from_rom() local
256 reg = AR_READ(sc, AR_PHY_TIMING_CTRL4_0 + offset); in ar9280_init_from_rom()
[all …]
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| D | nslm7x.c | 124 .reg = 0x20,
132 .reg = 0x21,
140 .reg = 0x22,
148 .reg = 0x23,
156 .reg = 0x24,
164 .reg = 0x25,
172 .reg = 0x26,
182 .reg = 0x27,
192 .reg = 0x28,
200 .reg = 0x29,
[all …]
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| D | wivar.h | 230 #define CSR_WRITE_4(sc, reg, val) \ argument
232 (sc->sc_pci? reg * 2: reg) , htole32(val))
233 #define CSR_WRITE_2(sc, reg, val) \ argument
235 (sc->sc_pci? reg * 2: reg), htole16(val))
236 #define CSR_WRITE_1(sc, reg, val) \ argument
238 (sc->sc_pci? reg * 2: reg), val)
240 #define CSR_READ_4(sc, reg) \ argument
242 (sc->sc_pci? reg * 2: reg)))
243 #define CSR_READ_2(sc, reg) \ argument
245 (sc->sc_pci? reg * 2: reg)))
[all …]
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| /netbsd/src/sys/dev/pci/ixgbe/ |
| D | ixgbe_dcb_82599.c | 129 u32 reg = 0; in ixgbe_dcb_config_rx_arbiter_82599() local
138 reg = IXGBE_RTRPCS_RRM | IXGBE_RTRPCS_RAC | IXGBE_RTRPCS_ARBDIS; in ixgbe_dcb_config_rx_arbiter_82599()
139 IXGBE_WRITE_REG(hw, IXGBE_RTRPCS, reg); in ixgbe_dcb_config_rx_arbiter_82599()
147 reg = 0; in ixgbe_dcb_config_rx_arbiter_82599()
149 reg |= (map[i] << (i * IXGBE_RTRUP2TC_UP_SHIFT)); in ixgbe_dcb_config_rx_arbiter_82599()
151 IXGBE_WRITE_REG(hw, IXGBE_RTRUP2TC, reg); in ixgbe_dcb_config_rx_arbiter_82599()
157 reg = credit_refill | (credit_max << IXGBE_RTRPT4C_MCL_SHIFT); in ixgbe_dcb_config_rx_arbiter_82599()
159 reg |= (u32)(bwg_id[i]) << IXGBE_RTRPT4C_BWG_SHIFT; in ixgbe_dcb_config_rx_arbiter_82599()
162 reg |= IXGBE_RTRPT4C_LSP; in ixgbe_dcb_config_rx_arbiter_82599()
164 IXGBE_WRITE_REG(hw, IXGBE_RTRPT4C(i), reg); in ixgbe_dcb_config_rx_arbiter_82599()
[all …]
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| D | ixgbe_dcb_82598.c | 119 u32 reg = 0; in ixgbe_dcb_config_rx_arbiter_82598() local
124 reg = IXGBE_READ_REG(hw, IXGBE_RUPPBMR) | IXGBE_RUPPBMR_MQA; in ixgbe_dcb_config_rx_arbiter_82598()
125 IXGBE_WRITE_REG(hw, IXGBE_RUPPBMR, reg); in ixgbe_dcb_config_rx_arbiter_82598()
127 reg = IXGBE_READ_REG(hw, IXGBE_RMCS); in ixgbe_dcb_config_rx_arbiter_82598()
129 reg &= ~IXGBE_RMCS_ARBDIS; in ixgbe_dcb_config_rx_arbiter_82598()
131 reg |= IXGBE_RMCS_RRM; in ixgbe_dcb_config_rx_arbiter_82598()
133 reg |= IXGBE_RMCS_DFP; in ixgbe_dcb_config_rx_arbiter_82598()
135 IXGBE_WRITE_REG(hw, IXGBE_RMCS, reg); in ixgbe_dcb_config_rx_arbiter_82598()
142 reg = credit_refill | (credit_max << IXGBE_RT2CR_MCL_SHIFT); in ixgbe_dcb_config_rx_arbiter_82598()
145 reg |= IXGBE_RT2CR_LSP; in ixgbe_dcb_config_rx_arbiter_82598()
[all …]
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| /netbsd/src/external/gpl3/gcc/dist/gcc/config/avr/ |
| D | avr-fixed.md | 69 (clobber (reg:CC REG_CC))])])
75 (clobber (reg:CC REG_CC))]
93 (clobber (reg:CC REG_CC))])])
99 (clobber (reg:CC REG_CC))]
131 (clobber (reg:CC REG_CC))])])
137 (clobber (reg:CC REG_CC))]
156 (clobber (reg:CC REG_CC))])])
162 (clobber (reg:CC REG_CC))]
195 (clobber (reg:CC REG_CC))])])
200 (clobber (reg:CC REG_CC))]
[all …]
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| D | avr-dimode.md | 40 ;; A[] = reg:DI 18
41 ;; B[] = reg:DI 10
99 [(set (reg:ALL8 ACC_A)
100 (plus:ALL8 (reg:ALL8 ACC_A)
101 (reg:ALL8 ACC_B)))]
105 [(parallel [(set (reg:ALL8 ACC_A)
106 (plus:ALL8 (reg:ALL8 ACC_A)
107 (reg:ALL8 ACC_B)))
108 (clobber (reg:CC REG_CC))])])
111 [(set (reg:ALL8 ACC_A)
[all …]
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| /netbsd/src/sys/arch/sgimips/dev/ |
| D | imc.c | 101 uint32_t reg; in imc_attach() local
145 reg = bus_space_read_4(isc.iot, isc.ioh, IMC_CPUCTRL0); in imc_attach()
146 reg &= ~IMC_CPUCTRL0_NCHKMEMPAR; in imc_attach()
147 reg |= (IMC_CPUCTRL0_GPR | IMC_CPUCTRL0_MPR | IMC_CPUCTRL0_INTENA); in imc_attach()
148 bus_space_write_4(isc.iot, isc.ioh, IMC_CPUCTRL0, reg); in imc_attach()
151 reg = bus_space_read_4(isc.iot, isc.ioh, IMC_CPUCTRL1); in imc_attach()
152 reg = (reg & ~IMC_CPUCTRL1_MCHWMSK) | 13; in imc_attach()
161 reg |= IMC_CPUCTRL1_HPCFX; in imc_attach()
162 reg |= IMC_CPUCTRL1_EXP0FX; in imc_attach()
163 reg |= IMC_CPUCTRL1_EXP1FX; in imc_attach()
[all …]
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| /netbsd/src/external/gpl3/binutils/dist/include/opcode/ |
| D | tic6x-opcode-table.h | 135 ENC4(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src2, reg, 0),
136 ENC(dst, reg, 1)))
140 ENC3(ENC(s, fu, 0), ENC(src2, reg, 0), ENC(dst, reg, 1)))
145 ENC4(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src2, reg, 0),
146 ENC(dst, reg, 1)))
152 ENC(dst, reg, 1)))
157 ENC4(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src2, reg, 0),
158 ENC(dst, reg, 1)))
163 ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0),
164 ENC(src2, reg, 1), ENC(dst, reg, 2)))
[all …]
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| /netbsd/src/external/gpl3/gdb/dist/include/opcode/ |
| D | tic6x-opcode-table.h | 135 ENC4(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src2, reg, 0),
136 ENC(dst, reg, 1)))
140 ENC3(ENC(s, fu, 0), ENC(src2, reg, 0), ENC(dst, reg, 1)))
145 ENC4(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src2, reg, 0),
146 ENC(dst, reg, 1)))
152 ENC(dst, reg, 1)))
157 ENC4(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src2, reg, 0),
158 ENC(dst, reg, 1)))
163 ENC5(ENC(s, fu, 0), ENC(x, xpath, 0), ENC(src1, reg, 0),
164 ENC(src2, reg, 1), ENC(dst, reg, 2)))
[all …]
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| /netbsd/src/sys/dev/acpi/ |
| D | apei_mapreg.c | 53 apei_mapreg_map(const ACPI_GENERIC_ADDRESS *reg) in apei_mapreg_map() argument
59 switch (reg->BitWidth) { in apei_mapreg_map()
72 switch (reg->AccessWidth) { in apei_mapreg_map()
78 if (reg->SpaceId == ACPI_ADR_SPACE_SYSTEM_IO) in apei_mapreg_map()
90 switch (reg->BitOffset) { in apei_mapreg_map()
101 if (reg->BitWidth % (8*(1 << (reg->AccessWidth - 1)))) in apei_mapreg_map()
107 switch (reg->SpaceId) { in apei_mapreg_map()
113 return (struct apei_mapreg *)__UNCONST(reg); in apei_mapreg_map()
115 return AcpiOsMapMemory(reg->Address, in apei_mapreg_map()
116 1 << (reg->AccessWidth - 1)); in apei_mapreg_map()
[all …]
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| /netbsd/src/external/gpl3/gdb/dist/gdb/ |
| D | user-regs.c | 66 struct user_reg *reg) in append_user_reg() argument
71 gdb_assert (reg != NULL); in append_user_reg()
72 reg->name = name; in append_user_reg()
73 reg->xread = xread; in append_user_reg()
74 reg->baton = baton; in append_user_reg()
75 reg->next = NULL; in append_user_reg()
78 (*regs->last) = reg; in append_user_reg()
109 for (user_reg *reg = builtin_user_regs.first; in get_user_regs() local
110 reg != NULL; in get_user_regs()
111 reg = reg->next) in get_user_regs()
[all …]
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| /netbsd/src/external/gpl3/gdb/dist/sim/ppc/ |
| D | registers.c | 72 register_description(const char reg[]) in register_description() argument
77 if (reg[0] == 'r' && are_digits(reg + 1)) { in register_description()
79 description.index = atoi(reg+1); in register_description()
82 else if (reg[0] == 'f' && are_digits(reg + 1)) { in register_description()
84 description.index = atoi(reg+1); in register_description()
87 else if (!strcmp(reg, "pc") || !strcmp(reg, "nia")) { in register_description()
92 else if (!strcmp(reg, "sp")) { in register_description()
97 else if (!strcmp(reg, "toc")) { in register_description()
102 else if (!strcmp(reg, "cr") || !strcmp(reg, "cnd")) { in register_description()
107 else if (!strcmp(reg, "msr") || !strcmp(reg, "ps")) { in register_description()
[all …]
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| /netbsd/src/external/gpl3/gcc/dist/libgcc/config/i386/ |
| D | linux-unwind.h | 82 fs->regs.reg[0].how = REG_SAVED_OFFSET; in x86_64_fallback_frame_state()
83 fs->regs.reg[0].loc.offset = (long)&sc->rax - new_cfa; in x86_64_fallback_frame_state()
84 fs->regs.reg[1].how = REG_SAVED_OFFSET; in x86_64_fallback_frame_state()
85 fs->regs.reg[1].loc.offset = (long)&sc->rdx - new_cfa; in x86_64_fallback_frame_state()
86 fs->regs.reg[2].how = REG_SAVED_OFFSET; in x86_64_fallback_frame_state()
87 fs->regs.reg[2].loc.offset = (long)&sc->rcx - new_cfa; in x86_64_fallback_frame_state()
88 fs->regs.reg[3].how = REG_SAVED_OFFSET; in x86_64_fallback_frame_state()
89 fs->regs.reg[3].loc.offset = (long)&sc->rbx - new_cfa; in x86_64_fallback_frame_state()
90 fs->regs.reg[4].how = REG_SAVED_OFFSET; in x86_64_fallback_frame_state()
91 fs->regs.reg[4].loc.offset = (long)&sc->rsi - new_cfa; in x86_64_fallback_frame_state()
[all …]
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| D | sol2-unwind.h | 97 fs->regs.reg[0].how = REG_SAVED_OFFSET; in x86_64_fallback_frame_state()
98 fs->regs.reg[0].loc.offset = (long)&mctx->gregs[REG_RAX] - new_cfa; in x86_64_fallback_frame_state()
99 fs->regs.reg[1].how = REG_SAVED_OFFSET; in x86_64_fallback_frame_state()
100 fs->regs.reg[1].loc.offset = (long)&mctx->gregs[REG_RDX] - new_cfa; in x86_64_fallback_frame_state()
101 fs->regs.reg[2].how = REG_SAVED_OFFSET; in x86_64_fallback_frame_state()
102 fs->regs.reg[2].loc.offset = (long)&mctx->gregs[REG_RCX] - new_cfa; in x86_64_fallback_frame_state()
103 fs->regs.reg[3].how = REG_SAVED_OFFSET; in x86_64_fallback_frame_state()
104 fs->regs.reg[3].loc.offset = (long)&mctx->gregs[REG_RBX] - new_cfa; in x86_64_fallback_frame_state()
105 fs->regs.reg[4].how = REG_SAVED_OFFSET; in x86_64_fallback_frame_state()
106 fs->regs.reg[4].loc.offset = (long)&mctx->gregs[REG_RSI] - new_cfa; in x86_64_fallback_frame_state()
[all …]
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| D | freebsd-unwind.h | 37 #define REG_NAME(reg) sf_uc.uc_mcontext.mc_## reg argument
113 fs->regs.reg[0].how = REG_SAVED_OFFSET; in x86_64_freebsd_fallback_frame_state()
114 fs->regs.reg[0].loc.offset = (long)&sf->REG_NAME(rax) - new_cfa; in x86_64_freebsd_fallback_frame_state()
115 fs->regs.reg[1].how = REG_SAVED_OFFSET; in x86_64_freebsd_fallback_frame_state()
116 fs->regs.reg[1].loc.offset = (long)&sf->REG_NAME(rdx) - new_cfa; in x86_64_freebsd_fallback_frame_state()
117 fs->regs.reg[2].how = REG_SAVED_OFFSET; in x86_64_freebsd_fallback_frame_state()
118 fs->regs.reg[2].loc.offset = (long)&sf->REG_NAME(rcx) - new_cfa; in x86_64_freebsd_fallback_frame_state()
119 fs->regs.reg[3].how = REG_SAVED_OFFSET; in x86_64_freebsd_fallback_frame_state()
120 fs->regs.reg[3].loc.offset = (long)&sf->REG_NAME(rbx) - new_cfa; in x86_64_freebsd_fallback_frame_state()
121 fs->regs.reg[4].how = REG_SAVED_OFFSET; in x86_64_freebsd_fallback_frame_state()
[all …]
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| /netbsd/src/external/gpl3/gcc/dist/gcc/ |
| D | lra-remat.cc | 297 struct lra_insn_reg *reg, *found_reg = NULL; in operand_to_remat() local
303 for (reg = id->regs; reg != NULL; reg = reg->next) in operand_to_remat()
309 if (reg->regno == STACK_POINTER_REGNUM && frame_pointer_needed) in operand_to_remat()
311 else if (reg->type == OP_OUT && ! reg->subreg_p in operand_to_remat()
312 && find_regno_note (insn, REG_UNUSED, reg->regno) == NULL) in operand_to_remat()
317 found_reg = reg; in operand_to_remat()
324 if (reg->regno >= FIRST_PSEUDO_REGISTER in operand_to_remat()
325 && bitmap_bit_p (&subreg_regs, reg->regno)) in operand_to_remat()
329 if (reg->regno < FIRST_PSEUDO_REGISTER) in operand_to_remat()
339 for (reg = id->regs; reg != NULL; reg = reg->next) in operand_to_remat()
[all …]
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