Lines Matching refs:reg
167 uint32_t phy, reg, ndiv = 0; in ar9280_set_synth() local
191 reg = AR_READ(sc, AR_PHY_CCK_TX_CTRL); in ar9280_set_synth()
193 reg |= AR_PHY_CCK_TX_CTRL_JAPAN; in ar9280_set_synth()
195 reg &= ~AR_PHY_CCK_TX_CTRL_JAPAN; in ar9280_set_synth()
196 AR_WRITE(sc, AR_PHY_CCK_TX_CTRL, reg); in ar9280_set_synth()
220 reg = AR_READ(sc, AR_AN_SYNTH9); in ar9280_set_synth()
221 reg = RW(reg, AR_AN_SYNTH9_REFDIVA, 1); in ar9280_set_synth()
222 AR_WRITE(sc, AR_AN_SYNTH9, reg); in ar9280_set_synth()
239 uint32_t reg, offset; in ar9280_init_from_rom() local
256 reg = AR_READ(sc, AR_PHY_TIMING_CTRL4_0 + offset); in ar9280_init_from_rom()
257 reg = RW(reg, AR_PHY_TIMING_CTRL4_IQCORR_Q_I_COFF, in ar9280_init_from_rom()
259 reg = RW(reg, AR_PHY_TIMING_CTRL4_IQCORR_Q_Q_COFF, in ar9280_init_from_rom()
261 AR_WRITE(sc, AR_PHY_TIMING_CTRL4_0 + offset, reg); in ar9280_init_from_rom()
264 reg = AR_READ(sc, AR_PHY_GAIN_2GHZ + offset); in ar9280_init_from_rom()
265 reg = RW(reg, AR_PHY_GAIN_2GHZ_XATTEN1_MARGIN, in ar9280_init_from_rom()
267 reg = RW(reg, AR_PHY_GAIN_2GHZ_XATTEN1_DB, in ar9280_init_from_rom()
269 reg = RW(reg, AR_PHY_GAIN_2GHZ_XATTEN2_MARGIN, in ar9280_init_from_rom()
271 reg = RW(reg, AR_PHY_GAIN_2GHZ_XATTEN2_DB, in ar9280_init_from_rom()
273 AR_WRITE(sc, AR_PHY_GAIN_2GHZ + offset, reg); in ar9280_init_from_rom()
279 reg = AR_READ(sc, AR_PHY_RXGAIN + offset); in ar9280_init_from_rom()
280 reg = RW(reg, AR9280_PHY_RXGAIN_TXRX_ATTEN, in ar9280_init_from_rom()
282 reg = RW(reg, AR9280_PHY_RXGAIN_TXRX_MARGIN, in ar9280_init_from_rom()
284 AR_WRITE(sc, AR_PHY_RXGAIN + offset, reg); in ar9280_init_from_rom()
287 reg = AR_READ(sc, AR_AN_RF2G1_CH0); in ar9280_init_from_rom()
288 reg = RW(reg, AR_AN_RF2G1_CH0_OB, modal->ob); in ar9280_init_from_rom()
289 reg = RW(reg, AR_AN_RF2G1_CH0_DB, modal->db); in ar9280_init_from_rom()
290 AR_WRITE(sc, AR_AN_RF2G1_CH0, reg); in ar9280_init_from_rom()
294 reg = AR_READ(sc, AR_AN_RF2G1_CH1); in ar9280_init_from_rom()
295 reg = RW(reg, AR_AN_RF2G1_CH1_OB, modal->ob_ch1); in ar9280_init_from_rom()
296 reg = RW(reg, AR_AN_RF2G1_CH1_DB, modal->db_ch1); in ar9280_init_from_rom()
297 AR_WRITE(sc, AR_AN_RF2G1_CH1, reg); in ar9280_init_from_rom()
302 reg = AR_READ(sc, AR_AN_RF5G1_CH0); in ar9280_init_from_rom()
303 reg = RW(reg, AR_AN_RF5G1_CH0_OB5, modal->ob); in ar9280_init_from_rom()
304 reg = RW(reg, AR_AN_RF5G1_CH0_DB5, modal->db); in ar9280_init_from_rom()
305 AR_WRITE(sc, AR_AN_RF5G1_CH0, reg); in ar9280_init_from_rom()
309 reg = AR_READ(sc, AR_AN_RF5G1_CH1); in ar9280_init_from_rom()
310 reg = RW(reg, AR_AN_RF5G1_CH1_OB5, modal->ob_ch1); in ar9280_init_from_rom()
311 reg = RW(reg, AR_AN_RF5G1_CH1_DB5, modal->db_ch1); in ar9280_init_from_rom()
312 AR_WRITE(sc, AR_AN_RF5G1_CH1, reg); in ar9280_init_from_rom()
316 reg = AR_READ(sc, AR_AN_TOP2); in ar9280_init_from_rom()
323 reg = RW(reg, AR_AN_TOP2_XPABIAS_LVL, 0); in ar9280_init_from_rom()
326 reg = RW(reg, AR_AN_TOP2_XPABIAS_LVL, modal->xpaBiasLvl); in ar9280_init_from_rom()
328 reg |= AR_AN_TOP2_LOCALBIAS; in ar9280_init_from_rom()
330 reg &= ~AR_AN_TOP2_LOCALBIAS; in ar9280_init_from_rom()
331 AR_WRITE(sc, AR_AN_TOP2, reg); in ar9280_init_from_rom()
335 reg = AR_READ(sc, AR_PHY_XPA_CFG); in ar9280_init_from_rom()
337 reg |= AR_PHY_FORCE_XPA_CFG; in ar9280_init_from_rom()
339 reg &= ~AR_PHY_FORCE_XPA_CFG; in ar9280_init_from_rom()
340 AR_WRITE(sc, AR_PHY_XPA_CFG, reg); in ar9280_init_from_rom()
342 reg = AR_READ(sc, AR_PHY_SETTLING); in ar9280_init_from_rom()
343 reg = RW(reg, AR_PHY_SETTLING_SWITCH, modal->switchSettling); in ar9280_init_from_rom()
344 AR_WRITE(sc, AR_PHY_SETTLING, reg); in ar9280_init_from_rom()
346 reg = AR_READ(sc, AR_PHY_DESIRED_SZ); in ar9280_init_from_rom()
347 reg = RW(reg, AR_PHY_DESIRED_SZ_ADC, modal->adcDesiredSize); in ar9280_init_from_rom()
348 AR_WRITE(sc, AR_PHY_DESIRED_SZ, reg); in ar9280_init_from_rom()
350 reg = SM(AR_PHY_RF_CTL4_TX_END_XPAA_OFF, modal->txEndToXpaOff); in ar9280_init_from_rom()
351 reg |= SM(AR_PHY_RF_CTL4_TX_END_XPAB_OFF, modal->txEndToXpaOff); in ar9280_init_from_rom()
352 reg |= SM(AR_PHY_RF_CTL4_FRAME_XPAA_ON, modal->txFrameToXpaOn); in ar9280_init_from_rom()
353 reg |= SM(AR_PHY_RF_CTL4_FRAME_XPAB_ON, modal->txFrameToXpaOn); in ar9280_init_from_rom()
354 AR_WRITE(sc, AR_PHY_RF_CTL4, reg); in ar9280_init_from_rom()
356 reg = AR_READ(sc, AR_PHY_RF_CTL3); in ar9280_init_from_rom()
357 reg = RW(reg, AR_PHY_TX_END_TO_A2_RX_ON, modal->txEndToRxOn); in ar9280_init_from_rom()
358 AR_WRITE(sc, AR_PHY_RF_CTL3, reg); in ar9280_init_from_rom()
360 reg = AR_READ(sc, AR_PHY_CCA(0)); in ar9280_init_from_rom()
361 reg = RW(reg, AR9280_PHY_CCA_THRESH62, modal->thresh62); in ar9280_init_from_rom()
362 AR_WRITE(sc, AR_PHY_CCA(0), reg); in ar9280_init_from_rom()
364 reg = AR_READ(sc, AR_PHY_EXT_CCA0); in ar9280_init_from_rom()
365 reg = RW(reg, AR_PHY_EXT_CCA0_THRESH62, modal->thresh62); in ar9280_init_from_rom()
366 AR_WRITE(sc, AR_PHY_EXT_CCA0, reg); in ar9280_init_from_rom()
369 reg = AR_READ(sc, AR_PHY_RF_CTL2); in ar9280_init_from_rom()
370 reg = RW(reg, AR_PHY_TX_END_DATA_START, in ar9280_init_from_rom()
372 reg = RW(reg, AR_PHY_TX_END_PA_ON, modal->txFrameToPaOn); in ar9280_init_from_rom()
373 AR_WRITE(sc, AR_PHY_RF_CTL2, reg); in ar9280_init_from_rom()
378 reg = AR_READ(sc, AR_PHY_SETTLING); in ar9280_init_from_rom()
379 reg = RW(reg, AR_PHY_SETTLING_SWITCH, modal->swSettleHt40); in ar9280_init_from_rom()
380 AR_WRITE(sc, AR_PHY_SETTLING, reg); in ar9280_init_from_rom()
384 reg = AR_READ(sc, AR_PHY_CCK_TX_CTRL); in ar9280_init_from_rom()
385 reg = RW(reg, AR_PHY_CCK_TX_CTRL_TX_DAC_SCALE_CCK, in ar9280_init_from_rom()
387 AR_WRITE(sc, AR_PHY_CCK_TX_CTRL, reg); in ar9280_init_from_rom()
391 reg = AR_READ(sc, AR_AN_TOP1); in ar9280_init_from_rom()
395 reg |= AR_AN_TOP1_DACLPMODE; in ar9280_init_from_rom()
397 reg &= ~AR_AN_TOP1_DACLPMODE; in ar9280_init_from_rom()
398 AR_WRITE(sc, AR_AN_TOP1, reg); in ar9280_init_from_rom()
402 reg = AR_READ(sc, AR_PHY_FRAME_CTL); in ar9280_init_from_rom()
403 reg = RW(reg, AR_PHY_FRAME_CTL_TX_CLIP, in ar9280_init_from_rom()
405 AR_WRITE(sc, AR_PHY_FRAME_CTL, reg); in ar9280_init_from_rom()
407 reg = AR_READ(sc, AR_PHY_TX_PWRCTRL9); in ar9280_init_from_rom()
408 reg = RW(reg, AR_PHY_TX_DESIRED_SCALE_CCK, in ar9280_init_from_rom()
410 AR_WRITE(sc, AR_PHY_TX_PWRCTRL9, reg); in ar9280_init_from_rom()
578 uint32_t reg; in ar9280_olpc_init() local
583 reg = AR_READ(sc, AR_PHY_TX_GAIN_TBL(i)); in ar9280_olpc_init()
584 sc->sc_tx_gain_tbl[i] = MS(reg, AR_PHY_TX_GAIN); in ar9280_olpc_init()
595 uint32_t reg; in ar9280_olpc_temp_compensation() local
598 reg = AR_READ(sc, AR_PHY_TX_PWRCTRL4); in ar9280_olpc_temp_compensation()
599 pdadc = MS(reg, AR_PHY_TX_PWRCTRL_PD_AVG_OUT); in ar9280_olpc_temp_compensation()
622 reg = AR_READ(sc, AR_PHY_TX_GAIN_TBL(i)); in ar9280_olpc_temp_compensation()
623 reg = RW(reg, AR_PHY_TX_GAIN, txgain); in ar9280_olpc_temp_compensation()
624 AR_WRITE(sc, AR_PHY_TX_GAIN_TBL(i), reg); in ar9280_olpc_temp_compensation()