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Searched refs:uc_rclk (Results 1 – 20 of 20) sorted by relevance

/freebsd-13-stable/sys/dev/uart/
HDuart_dev_ti8250.c119 .uc_rclk = 48000000,
HDuart_bus.h68 u_int uc_rclk; /* Default rclk for this device. */ member
HDuart_dev_snps.c117 .uc_rclk = 0,
HDuart_dev_lowrisc.c180 .uc_rclk = 12500000, /* TODO: get value from clock manager */
HDuart_dev_mu.c293 .uc_rclk = 0,
HDuart_dev_pl011.c327 .uc_rclk = 0,
HDuart_dev_msm.c568 .uc_rclk = DEF_CLK,
HDuart_dev_mvebu.c317 .uc_rclk = DEFAULT_RCLK,
HDuart_dev_quicc.c274 .uc_rclk = DEFAULT_RCLK,
HDuart_dev_imx.c308 .uc_rclk = 24000000, /* TODO: get value from CCM */
HDuart_core.c554 sc->sc_bas.rclk = (rclk == 0) ? sc->sc_class->uc_rclk : rclk; in uart_bus_probe()
HDuart_dev_z8530.c310 .uc_rclk = DEFAULT_RCLK,
HDuart_dev_ns8250.c407 .uc_rclk = DEFAULT_RCLK,
/freebsd-13-stable/sys/mips/ingenic/
HDjz4780_uart.c108 .uc_rclk = 0,
/freebsd-13-stable/sys/arm/nvidia/
HDtegra_uart.c151 .uc_rclk = 0,
/freebsd-13-stable/sys/mips/cavium/
HDuart_dev_oct16550.c426 .uc_rclk = 0,
661 bas->rclk = uart_oct16550_class.uc_rclk = cvmx_clock_get_rate(CVMX_CLOCK_SCLK); in oct16550_bus_probe()
/freebsd-13-stable/sys/arm/freescale/vybrid/
HDvf_uart.c279 .uc_rclk = 24000000, /* TODO: get value from CCM */
/freebsd-13-stable/sys/riscv/sifive/
HDsifive_uart.c538 .uc_rclk = 0,
/freebsd-13-stable/sys/mips/mediatek/
HDuart_dev_mtk.c227 .uc_rclk = 0
/freebsd-13-stable/sys/mips/atheros/
HDuart_dev_ar933x.c350 .uc_rclk = DEFAULT_RCLK,