1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
3 *
4 * Copyright (c) 2003 Marcel Moolenaar
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 *
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29 #include <sys/cdefs.h>
30 #include <sys/param.h>
31 #include <sys/systm.h>
32 #include <sys/bus.h>
33 #include <sys/conf.h>
34 #include <sys/cons.h>
35 #include <sys/fcntl.h>
36 #include <sys/interrupt.h>
37 #include <sys/kdb.h>
38 #include <sys/kernel.h>
39 #include <sys/malloc.h>
40 #include <sys/queue.h>
41 #include <sys/reboot.h>
42 #include <sys/sysctl.h>
43 #include <machine/bus.h>
44 #include <sys/rman.h>
45 #include <machine/resource.h>
46 #include <machine/stdarg.h>
47
48 #include <dev/uart/uart.h>
49 #include <dev/uart/uart_bus.h>
50 #include <dev/uart/uart_cpu.h>
51 #include <dev/uart/uart_ppstypes.h>
52
53 #include "uart_if.h"
54
55 devclass_t uart_devclass;
56 const char uart_driver_name[] = "uart";
57
58 SLIST_HEAD(uart_devinfo_list, uart_devinfo) uart_sysdevs =
59 SLIST_HEAD_INITIALIZER(uart_sysdevs);
60
61 static MALLOC_DEFINE(M_UART, "UART", "UART driver");
62
63 #ifndef UART_POLL_FREQ
64 #define UART_POLL_FREQ 50
65 #endif
66 static int uart_poll_freq = UART_POLL_FREQ;
67 SYSCTL_INT(_debug, OID_AUTO, uart_poll_freq, CTLFLAG_RDTUN, &uart_poll_freq,
68 0, "UART poll frequency");
69
70 static int uart_force_poll;
71 SYSCTL_INT(_debug, OID_AUTO, uart_force_poll, CTLFLAG_RDTUN, &uart_force_poll,
72 0, "Force UART polling");
73
74 static inline int
uart_pps_mode_valid(int pps_mode)75 uart_pps_mode_valid(int pps_mode)
76 {
77 int opt;
78
79 switch(pps_mode & UART_PPS_SIGNAL_MASK) {
80 case UART_PPS_DISABLED:
81 case UART_PPS_CTS:
82 case UART_PPS_DCD:
83 break;
84 default:
85 return (false);
86 }
87
88 opt = pps_mode & UART_PPS_OPTION_MASK;
89 if ((opt & ~(UART_PPS_INVERT_PULSE | UART_PPS_NARROW_PULSE)) != 0)
90 return (false);
91
92 return (true);
93 }
94
95 static void
uart_pps_print_mode(struct uart_softc * sc)96 uart_pps_print_mode(struct uart_softc *sc)
97 {
98
99 device_printf(sc->sc_dev, "PPS capture mode: ");
100 switch(sc->sc_pps_mode & UART_PPS_SIGNAL_MASK) {
101 case UART_PPS_DISABLED:
102 printf("disabled");
103 break;
104 case UART_PPS_CTS:
105 printf("CTS");
106 break;
107 case UART_PPS_DCD:
108 printf("DCD");
109 break;
110 default:
111 printf("invalid");
112 break;
113 }
114 if (sc->sc_pps_mode & UART_PPS_INVERT_PULSE)
115 printf("-Inverted");
116 if (sc->sc_pps_mode & UART_PPS_NARROW_PULSE)
117 printf("-NarrowPulse");
118 printf("\n");
119 }
120
121 static int
uart_pps_mode_sysctl(SYSCTL_HANDLER_ARGS)122 uart_pps_mode_sysctl(SYSCTL_HANDLER_ARGS)
123 {
124 struct uart_softc *sc;
125 int err, tmp;
126
127 sc = arg1;
128 tmp = sc->sc_pps_mode;
129 err = sysctl_handle_int(oidp, &tmp, 0, req);
130 if (err != 0 || req->newptr == NULL)
131 return (err);
132 if (!uart_pps_mode_valid(tmp))
133 return (EINVAL);
134 sc->sc_pps_mode = tmp;
135 return(0);
136 }
137
138 static void
uart_pps_process(struct uart_softc * sc,int ser_sig)139 uart_pps_process(struct uart_softc *sc, int ser_sig)
140 {
141 sbintime_t now;
142 int is_assert, pps_sig;
143
144 /* Which signal is configured as PPS? Early out if none. */
145 switch(sc->sc_pps_mode & UART_PPS_SIGNAL_MASK) {
146 case UART_PPS_CTS:
147 pps_sig = SER_CTS;
148 break;
149 case UART_PPS_DCD:
150 pps_sig = SER_DCD;
151 break;
152 default:
153 return;
154 }
155
156 /* Early out if there is no change in the signal configured as PPS. */
157 if ((ser_sig & SER_DELTA(pps_sig)) == 0)
158 return;
159
160 /*
161 * In narrow-pulse mode we need to synthesize both capture and clear
162 * events from a single "delta occurred" indication from the uart
163 * hardware because the pulse width is too narrow to reliably detect
164 * both edges. However, when the pulse width is close to our interrupt
165 * processing latency we might intermittantly catch both edges. To
166 * guard against generating spurious events when that happens, we use a
167 * separate timer to ensure at least half a second elapses before we
168 * generate another event.
169 */
170 pps_capture(&sc->sc_pps);
171 if (sc->sc_pps_mode & UART_PPS_NARROW_PULSE) {
172 now = getsbinuptime();
173 if (now > sc->sc_pps_captime + 500 * SBT_1MS) {
174 sc->sc_pps_captime = now;
175 pps_event(&sc->sc_pps, PPS_CAPTUREASSERT);
176 pps_event(&sc->sc_pps, PPS_CAPTURECLEAR);
177 }
178 } else {
179 is_assert = ser_sig & pps_sig;
180 if (sc->sc_pps_mode & UART_PPS_INVERT_PULSE)
181 is_assert = !is_assert;
182 pps_event(&sc->sc_pps, is_assert ? PPS_CAPTUREASSERT :
183 PPS_CAPTURECLEAR);
184 }
185 }
186
187 static void
uart_pps_init(struct uart_softc * sc)188 uart_pps_init(struct uart_softc *sc)
189 {
190 struct sysctl_ctx_list *ctx;
191 struct sysctl_oid *tree;
192
193 ctx = device_get_sysctl_ctx(sc->sc_dev);
194 tree = device_get_sysctl_tree(sc->sc_dev);
195
196 /*
197 * The historical default for pps capture mode is either DCD or CTS,
198 * depending on the UART_PPS_ON_CTS kernel option. Start with that,
199 * then try to fetch the tunable that overrides the mode for all uart
200 * devices, then try to fetch the sysctl-tunable that overrides the mode
201 * for one specific device.
202 */
203 #ifdef UART_PPS_ON_CTS
204 sc->sc_pps_mode = UART_PPS_CTS;
205 #else
206 sc->sc_pps_mode = UART_PPS_DCD;
207 #endif
208 TUNABLE_INT_FETCH("hw.uart.pps_mode", &sc->sc_pps_mode);
209 SYSCTL_ADD_PROC(ctx, SYSCTL_CHILDREN(tree), OID_AUTO, "pps_mode",
210 CTLTYPE_INT | CTLFLAG_RWTUN | CTLFLAG_MPSAFE, sc, 0,
211 uart_pps_mode_sysctl, "I", "pulse mode: 0/1/2=disabled/CTS/DCD; "
212 "add 0x10 to invert, 0x20 for narrow pulse");
213
214 if (!uart_pps_mode_valid(sc->sc_pps_mode)) {
215 device_printf(sc->sc_dev,
216 "Invalid pps_mode 0x%02x configured; disabling PPS capture\n",
217 sc->sc_pps_mode);
218 sc->sc_pps_mode = UART_PPS_DISABLED;
219 } else if (bootverbose) {
220 uart_pps_print_mode(sc);
221 }
222
223 sc->sc_pps.ppscap = PPS_CAPTUREBOTH;
224 sc->sc_pps.driver_mtx = uart_tty_getlock(sc);
225 sc->sc_pps.driver_abi = PPS_ABI_VERSION;
226 pps_init_abi(&sc->sc_pps);
227 }
228
229 void
uart_add_sysdev(struct uart_devinfo * di)230 uart_add_sysdev(struct uart_devinfo *di)
231 {
232 SLIST_INSERT_HEAD(&uart_sysdevs, di, next);
233 }
234
235 const char *
uart_getname(struct uart_class * uc)236 uart_getname(struct uart_class *uc)
237 {
238 return ((uc != NULL) ? uc->name : NULL);
239 }
240
241 struct uart_ops *
uart_getops(struct uart_class * uc)242 uart_getops(struct uart_class *uc)
243 {
244 return ((uc != NULL) ? uc->uc_ops : NULL);
245 }
246
247 int
uart_getrange(struct uart_class * uc)248 uart_getrange(struct uart_class *uc)
249 {
250 return ((uc != NULL) ? uc->uc_range : 0);
251 }
252
253 u_int
uart_getregshift(struct uart_class * uc)254 uart_getregshift(struct uart_class *uc)
255 {
256 return ((uc != NULL) ? uc->uc_rshift : 0);
257 }
258
259 u_int
uart_getregiowidth(struct uart_class * uc)260 uart_getregiowidth(struct uart_class *uc)
261 {
262 return ((uc != NULL) ? uc->uc_riowidth : 0);
263 }
264
265 /*
266 * Schedule a soft interrupt. We do this on the 0 to !0 transition
267 * of the TTY pending interrupt status.
268 */
269 void
uart_sched_softih(struct uart_softc * sc,uint32_t ipend)270 uart_sched_softih(struct uart_softc *sc, uint32_t ipend)
271 {
272 uint32_t new, old;
273
274 do {
275 old = sc->sc_ttypend;
276 new = old | ipend;
277 } while (!atomic_cmpset_32(&sc->sc_ttypend, old, new));
278
279 if ((old & SER_INT_MASK) == 0)
280 swi_sched(sc->sc_softih, 0);
281 }
282
283 /*
284 * A break condition has been detected. We treat the break condition as
285 * a special case that should not happen during normal operation. When
286 * the break condition is to be passed to higher levels in the form of
287 * a NUL character, we really want the break to be in the right place in
288 * the input stream. The overhead to achieve that is not in relation to
289 * the exceptional nature of the break condition, so we permit ourselves
290 * to be sloppy.
291 */
292 static __inline int
uart_intr_break(void * arg)293 uart_intr_break(void *arg)
294 {
295 struct uart_softc *sc = arg;
296
297 #if defined(KDB)
298 if (sc->sc_sysdev != NULL && sc->sc_sysdev->type == UART_DEV_CONSOLE) {
299 if (kdb_break())
300 return (0);
301 }
302 #endif
303 if (sc->sc_opened)
304 uart_sched_softih(sc, SER_INT_BREAK);
305 return (0);
306 }
307
308 /*
309 * Handle a receiver overrun situation. We lost at least 1 byte in the
310 * input stream and it's our job to contain the situation. We grab as
311 * much of the data we can, but otherwise flush the receiver FIFO to
312 * create some breathing room. The net effect is that we avoid the
313 * overrun condition to happen for the next X characters, where X is
314 * related to the FIFO size at the cost of losing data right away.
315 * So, instead of having multiple overrun interrupts in close proximity
316 * to each other and possibly pessimizing UART interrupt latency for
317 * other UARTs in a multiport configuration, we create a longer segment
318 * of missing characters by freeing up the FIFO.
319 * Each overrun condition is marked in the input buffer by a token. The
320 * token represents the loss of at least one, but possible more bytes in
321 * the input stream.
322 */
323 static __inline int
uart_intr_overrun(void * arg)324 uart_intr_overrun(void *arg)
325 {
326 struct uart_softc *sc = arg;
327
328 if (sc->sc_opened) {
329 UART_RECEIVE(sc);
330 if (uart_rx_put(sc, UART_STAT_OVERRUN))
331 sc->sc_rxbuf[sc->sc_rxput] = UART_STAT_OVERRUN;
332 uart_sched_softih(sc, SER_INT_RXREADY);
333 }
334 sc->sc_rxoverruns++;
335 UART_FLUSH(sc, UART_FLUSH_RECEIVER);
336 return (0);
337 }
338
339 /*
340 * Received data ready.
341 */
342 static __inline int
uart_intr_rxready(void * arg)343 uart_intr_rxready(void *arg)
344 {
345 struct uart_softc *sc = arg;
346 int rxp;
347
348 rxp = sc->sc_rxput;
349 UART_RECEIVE(sc);
350 #if defined(KDB)
351 if (sc->sc_sysdev != NULL && sc->sc_sysdev->type == UART_DEV_CONSOLE) {
352 while (rxp != sc->sc_rxput) {
353 kdb_alt_break(sc->sc_rxbuf[rxp++], &sc->sc_altbrk);
354 if (rxp == sc->sc_rxbufsz)
355 rxp = 0;
356 }
357 }
358 #endif
359 if (sc->sc_opened)
360 uart_sched_softih(sc, SER_INT_RXREADY);
361 else
362 sc->sc_rxput = sc->sc_rxget; /* Ignore received data. */
363 return (1);
364 }
365
366 /*
367 * Line or modem status change (OOB signalling).
368 * We pass the signals to the software interrupt handler for further
369 * processing. Note that we merge the delta bits, but set the state
370 * bits. This is to avoid losing state transitions due to having more
371 * than 1 hardware interrupt between software interrupts.
372 */
373 static __inline int
uart_intr_sigchg(void * arg)374 uart_intr_sigchg(void *arg)
375 {
376 struct uart_softc *sc = arg;
377 int new, old, sig;
378
379 sig = UART_GETSIG(sc);
380
381 /*
382 * Time pulse counting support, invoked whenever the PPS parameters are
383 * currently set to capture either edge of the signal.
384 */
385 if (sc->sc_pps.ppsparam.mode & PPS_CAPTUREBOTH) {
386 uart_pps_process(sc, sig);
387 }
388
389 /*
390 * Keep track of signal changes, even when the device is not
391 * opened. This allows us to inform upper layers about a
392 * possible loss of DCD and thus the existence of a (possibly)
393 * different connection when we have DCD back, during the time
394 * that the device was closed.
395 */
396 do {
397 old = sc->sc_ttypend;
398 new = old & ~SER_MASK_STATE;
399 new |= sig & SER_INT_SIGMASK;
400 } while (!atomic_cmpset_32(&sc->sc_ttypend, old, new));
401
402 if (sc->sc_opened)
403 uart_sched_softih(sc, SER_INT_SIGCHG);
404 return (1);
405 }
406
407 /*
408 * The transmitter can accept more data.
409 */
410 static __inline int
uart_intr_txidle(void * arg)411 uart_intr_txidle(void *arg)
412 {
413 struct uart_softc *sc = arg;
414
415 if (sc->sc_txbusy) {
416 sc->sc_txbusy = 0;
417 uart_sched_softih(sc, SER_INT_TXIDLE);
418 }
419 return (0);
420 }
421
422 static int
uart_intr(void * arg)423 uart_intr(void *arg)
424 {
425 struct uart_softc *sc = arg;
426 int cnt, ipend, testintr;
427
428 if (sc->sc_leaving)
429 return (FILTER_STRAY);
430
431 cnt = 0;
432 testintr = sc->sc_testintr;
433 while ((!testintr || cnt < 20) && (ipend = UART_IPEND(sc)) != 0) {
434 cnt++;
435 if (ipend & SER_INT_OVERRUN)
436 uart_intr_overrun(sc);
437 if (ipend & SER_INT_BREAK)
438 uart_intr_break(sc);
439 if (ipend & SER_INT_RXREADY)
440 uart_intr_rxready(sc);
441 if (ipend & SER_INT_SIGCHG)
442 uart_intr_sigchg(sc);
443 if (ipend & SER_INT_TXIDLE)
444 uart_intr_txidle(sc);
445 }
446
447 if (sc->sc_polled) {
448 callout_reset(&sc->sc_timer, hz / uart_poll_freq,
449 (callout_func_t *)uart_intr, sc);
450 }
451
452 return ((cnt == 0) ? FILTER_STRAY :
453 ((testintr && cnt == 20) ? FILTER_SCHEDULE_THREAD :
454 FILTER_HANDLED));
455 }
456
457 serdev_intr_t *
uart_bus_ihand(device_t dev,int ipend)458 uart_bus_ihand(device_t dev, int ipend)
459 {
460
461 switch (ipend) {
462 case SER_INT_BREAK:
463 return (uart_intr_break);
464 case SER_INT_OVERRUN:
465 return (uart_intr_overrun);
466 case SER_INT_RXREADY:
467 return (uart_intr_rxready);
468 case SER_INT_SIGCHG:
469 return (uart_intr_sigchg);
470 case SER_INT_TXIDLE:
471 return (uart_intr_txidle);
472 }
473 return (NULL);
474 }
475
476 int
uart_bus_ipend(device_t dev)477 uart_bus_ipend(device_t dev)
478 {
479 struct uart_softc *sc;
480
481 sc = device_get_softc(dev);
482 return (UART_IPEND(sc));
483 }
484
485 int
uart_bus_sysdev(device_t dev)486 uart_bus_sysdev(device_t dev)
487 {
488 struct uart_softc *sc;
489
490 sc = device_get_softc(dev);
491 return ((sc->sc_sysdev != NULL) ? 1 : 0);
492 }
493
494 int
uart_bus_probe(device_t dev,int regshft,int regiowidth,int rclk,int rid,int chan,int quirks)495 uart_bus_probe(device_t dev, int regshft, int regiowidth, int rclk, int rid, int chan, int quirks)
496 {
497 struct uart_softc *sc;
498 struct uart_devinfo *sysdev;
499 int error;
500
501 sc = device_get_softc(dev);
502
503 /*
504 * All uart_class references are weak. Check that the needed
505 * class has been compiled-in. Fail if not.
506 */
507 if (sc->sc_class == NULL)
508 return (ENXIO);
509
510 /*
511 * Initialize the instance. Note that the instance (=softc) does
512 * not necessarily match the hardware specific softc. We can't do
513 * anything about it now, because we may not attach to the device.
514 * Hardware drivers cannot use any of the class specific fields
515 * while probing.
516 */
517 kobj_init((kobj_t)sc, (kobj_class_t)sc->sc_class);
518 sc->sc_dev = dev;
519 if (device_get_desc(dev) == NULL)
520 device_set_desc(dev, uart_getname(sc->sc_class));
521
522 /*
523 * Allocate the register resource. We assume that all UARTs have
524 * a single register window in either I/O port space or memory
525 * mapped I/O space. Any UART that needs multiple windows will
526 * consequently not be supported by this driver as-is. We try I/O
527 * port space first because that's the common case.
528 */
529 sc->sc_rrid = rid;
530 sc->sc_rtype = SYS_RES_IOPORT;
531 sc->sc_rres = bus_alloc_resource_any(dev, sc->sc_rtype, &sc->sc_rrid,
532 RF_ACTIVE);
533 if (sc->sc_rres == NULL) {
534 sc->sc_rrid = rid;
535 sc->sc_rtype = SYS_RES_MEMORY;
536 sc->sc_rres = bus_alloc_resource_any(dev, sc->sc_rtype,
537 &sc->sc_rrid, RF_ACTIVE);
538 if (sc->sc_rres == NULL)
539 return (ENXIO);
540 }
541
542 /*
543 * Fill in the bus access structure and compare this device with
544 * a possible console device and/or a debug port. We set the flags
545 * in the softc so that the hardware dependent probe can adjust
546 * accordingly. In general, you don't want to permanently disrupt
547 * console I/O.
548 */
549 sc->sc_bas.bsh = rman_get_bushandle(sc->sc_rres);
550 sc->sc_bas.bst = rman_get_bustag(sc->sc_rres);
551 sc->sc_bas.chan = chan;
552 sc->sc_bas.regshft = regshft;
553 sc->sc_bas.regiowidth = regiowidth;
554 sc->sc_bas.rclk = (rclk == 0) ? sc->sc_class->uc_rclk : rclk;
555 sc->sc_bas.busy_detect = !!(quirks & UART_F_BUSY_DETECT);
556
557 SLIST_FOREACH(sysdev, &uart_sysdevs, next) {
558 if (chan == sysdev->bas.chan &&
559 uart_cpu_eqres(&sc->sc_bas, &sysdev->bas)) {
560 /* XXX check if ops matches class. */
561 sc->sc_sysdev = sysdev;
562 sysdev->bas.rclk = sc->sc_bas.rclk;
563 }
564 }
565
566 error = UART_PROBE(sc);
567 bus_release_resource(dev, sc->sc_rtype, sc->sc_rrid, sc->sc_rres);
568 return ((error) ? error : BUS_PROBE_DEFAULT);
569 }
570
571 int
uart_bus_attach(device_t dev)572 uart_bus_attach(device_t dev)
573 {
574 struct uart_softc *sc, *sc0;
575 const char *sep;
576 int error, filt;
577
578 /*
579 * The sc_class field defines the type of UART we're going to work
580 * with and thus the size of the softc. Replace the generic softc
581 * with one that matches the UART now that we're certain we handle
582 * the device.
583 */
584 sc0 = device_get_softc(dev);
585 if (sc0->sc_class->size > device_get_driver(dev)->size) {
586 sc = malloc(sc0->sc_class->size, M_UART, M_WAITOK|M_ZERO);
587 bcopy(sc0, sc, sizeof(*sc));
588 device_set_softc(dev, sc);
589 } else
590 sc = sc0;
591
592 /*
593 * Now that we know the softc for this device, connect the back
594 * pointer from the sysdev for this device, if any
595 */
596 if (sc->sc_sysdev != NULL)
597 sc->sc_sysdev->sc = sc;
598
599 /*
600 * Protect ourselves against interrupts while we're not completely
601 * finished attaching and initializing. We don't expect interrupts
602 * until after UART_ATTACH(), though.
603 */
604 sc->sc_leaving = 1;
605
606 mtx_init(&sc->sc_hwmtx_s, "uart_hwmtx", NULL, MTX_SPIN);
607 if (sc->sc_hwmtx == NULL)
608 sc->sc_hwmtx = &sc->sc_hwmtx_s;
609
610 /*
611 * Re-allocate. We expect that the softc contains the information
612 * collected by uart_bus_probe() intact.
613 */
614 sc->sc_rres = bus_alloc_resource_any(dev, sc->sc_rtype, &sc->sc_rrid,
615 RF_ACTIVE);
616 if (sc->sc_rres == NULL) {
617 mtx_destroy(&sc->sc_hwmtx_s);
618 return (ENXIO);
619 }
620 sc->sc_bas.bsh = rman_get_bushandle(sc->sc_rres);
621 sc->sc_bas.bst = rman_get_bustag(sc->sc_rres);
622
623 /*
624 * Ensure there is room for at least three full FIFOs of data in the
625 * receive buffer (handles the case of low-level drivers with huge
626 * FIFOs), and also ensure that there is no less than the historical
627 * size of 384 bytes (handles the typical small-FIFO case).
628 */
629 sc->sc_rxbufsz = MAX(384, sc->sc_rxfifosz * 3);
630 sc->sc_rxbuf = malloc(sc->sc_rxbufsz * sizeof(*sc->sc_rxbuf),
631 M_UART, M_WAITOK);
632 sc->sc_txbuf = malloc(sc->sc_txfifosz * sizeof(*sc->sc_txbuf),
633 M_UART, M_WAITOK);
634
635 error = UART_ATTACH(sc);
636 if (error)
637 goto fail;
638
639 if (sc->sc_hwiflow || sc->sc_hwoflow) {
640 sep = "";
641 device_print_prettyname(dev);
642 if (sc->sc_hwiflow) {
643 printf("%sRTS iflow", sep);
644 sep = ", ";
645 }
646 if (sc->sc_hwoflow) {
647 printf("%sCTS oflow", sep);
648 sep = ", ";
649 }
650 printf("\n");
651 }
652
653 if (sc->sc_sysdev != NULL) {
654 if (sc->sc_sysdev->baudrate == 0) {
655 if (UART_IOCTL(sc, UART_IOCTL_BAUD,
656 (intptr_t)&sc->sc_sysdev->baudrate) != 0)
657 sc->sc_sysdev->baudrate = -1;
658 }
659 switch (sc->sc_sysdev->type) {
660 case UART_DEV_CONSOLE:
661 device_printf(dev, "console");
662 break;
663 case UART_DEV_DBGPORT:
664 device_printf(dev, "debug port");
665 break;
666 case UART_DEV_KEYBOARD:
667 device_printf(dev, "keyboard");
668 break;
669 default:
670 device_printf(dev, "unknown system device");
671 break;
672 }
673 printf(" (%d,%c,%d,%d)\n", sc->sc_sysdev->baudrate,
674 "noems"[sc->sc_sysdev->parity], sc->sc_sysdev->databits,
675 sc->sc_sysdev->stopbits);
676 }
677
678 sc->sc_leaving = 0;
679 sc->sc_testintr = 1;
680 filt = uart_intr(sc);
681 sc->sc_testintr = 0;
682
683 /*
684 * Don't use interrupts if we couldn't clear any pending interrupt
685 * conditions. We may have broken H/W and polling is probably the
686 * safest thing to do.
687 */
688 if (filt != FILTER_SCHEDULE_THREAD && !uart_force_poll) {
689 sc->sc_ires = bus_alloc_resource_any(dev, SYS_RES_IRQ,
690 &sc->sc_irid, RF_ACTIVE | RF_SHAREABLE);
691 }
692 if (sc->sc_ires != NULL) {
693 error = bus_setup_intr(dev, sc->sc_ires, INTR_TYPE_TTY,
694 uart_intr, NULL, sc, &sc->sc_icookie);
695 sc->sc_fastintr = (error == 0) ? 1 : 0;
696
697 if (!sc->sc_fastintr)
698 error = bus_setup_intr(dev, sc->sc_ires,
699 INTR_TYPE_TTY | INTR_MPSAFE, NULL,
700 (driver_intr_t *)uart_intr, sc, &sc->sc_icookie);
701
702 if (error) {
703 device_printf(dev, "could not activate interrupt\n");
704 bus_release_resource(dev, SYS_RES_IRQ, sc->sc_irid,
705 sc->sc_ires);
706 sc->sc_ires = NULL;
707 }
708 }
709 if (sc->sc_ires == NULL) {
710 /* No interrupt resource. Force polled mode. */
711 sc->sc_polled = 1;
712 callout_init(&sc->sc_timer, 1);
713 callout_reset(&sc->sc_timer, hz / uart_poll_freq,
714 (callout_func_t *)uart_intr, sc);
715 }
716
717 if (bootverbose && (sc->sc_fastintr || sc->sc_polled)) {
718 sep = "";
719 device_print_prettyname(dev);
720 if (sc->sc_fastintr) {
721 printf("%sfast interrupt", sep);
722 sep = ", ";
723 }
724 if (sc->sc_polled) {
725 printf("%spolled mode (%dHz)", sep, uart_poll_freq);
726 sep = ", ";
727 }
728 printf("\n");
729 }
730
731 if (sc->sc_sysdev != NULL && sc->sc_sysdev->attach != NULL) {
732 if ((error = sc->sc_sysdev->attach(sc)) != 0)
733 goto fail;
734 } else {
735 if ((error = uart_tty_attach(sc)) != 0)
736 goto fail;
737 uart_pps_init(sc);
738 }
739
740 if (sc->sc_sysdev != NULL)
741 sc->sc_sysdev->hwmtx = sc->sc_hwmtx;
742
743 if (sc->sc_rxfifosz > 1)
744 SYSCTL_ADD_INT(device_get_sysctl_ctx(dev),
745 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO,
746 "rx_overruns", CTLFLAG_RD, &sc->sc_rxoverruns, 0,
747 "Receive overruns");
748
749 return (0);
750
751 fail:
752 free(sc->sc_txbuf, M_UART);
753 free(sc->sc_rxbuf, M_UART);
754
755 if (sc->sc_ires != NULL) {
756 bus_teardown_intr(dev, sc->sc_ires, sc->sc_icookie);
757 bus_release_resource(dev, SYS_RES_IRQ, sc->sc_irid,
758 sc->sc_ires);
759 }
760 bus_release_resource(dev, sc->sc_rtype, sc->sc_rrid, sc->sc_rres);
761
762 mtx_destroy(&sc->sc_hwmtx_s);
763
764 return (error);
765 }
766
767 int
uart_bus_detach(device_t dev)768 uart_bus_detach(device_t dev)
769 {
770 struct uart_softc *sc;
771
772 sc = device_get_softc(dev);
773
774 sc->sc_leaving = 1;
775
776 if (sc->sc_sysdev != NULL)
777 sc->sc_sysdev->hwmtx = NULL;
778
779 UART_DETACH(sc);
780
781 if (sc->sc_sysdev != NULL && sc->sc_sysdev->detach != NULL)
782 (*sc->sc_sysdev->detach)(sc);
783 else
784 uart_tty_detach(sc);
785
786 free(sc->sc_txbuf, M_UART);
787 free(sc->sc_rxbuf, M_UART);
788
789 if (sc->sc_ires != NULL) {
790 bus_teardown_intr(dev, sc->sc_ires, sc->sc_icookie);
791 bus_release_resource(dev, SYS_RES_IRQ, sc->sc_irid,
792 sc->sc_ires);
793 }
794 bus_release_resource(dev, sc->sc_rtype, sc->sc_rrid, sc->sc_rres);
795
796 mtx_destroy(&sc->sc_hwmtx_s);
797
798 if (sc->sc_class->size > device_get_driver(dev)->size) {
799 device_set_softc(dev, NULL);
800 free(sc, M_UART);
801 }
802
803 return (0);
804 }
805
806 int
uart_bus_resume(device_t dev)807 uart_bus_resume(device_t dev)
808 {
809 struct uart_softc *sc;
810
811 sc = device_get_softc(dev);
812 return (UART_ATTACH(sc));
813 }
814
815 void
uart_grab(struct uart_devinfo * di)816 uart_grab(struct uart_devinfo *di)
817 {
818
819 if (di->sc)
820 UART_GRAB(di->sc);
821 }
822
823 void
uart_ungrab(struct uart_devinfo * di)824 uart_ungrab(struct uart_devinfo *di)
825 {
826
827 if (di->sc)
828 UART_UNGRAB(di->sc);
829 }
830