1 /* $OpenBSD: if_re_pci.c,v 1.2 2005/06/15 23:39:19 brad Exp $ */
2
3 /*
4 * Copyright (c) 2005 Peter Valchev <pvalchev@openbsd.org>
5 *
6 * Permission to use, copy, modify, and distribute this software for any
7 * purpose with or without fee is hereby granted, provided that the above
8 * copyright notice and this permission notice appear in all copies.
9 *
10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 */
18
19 /*
20 * PCI front-end for the Realtek 8169
21 */
22
23 #include <sys/param.h>
24 #include <sys/endian.h>
25 #include <sys/systm.h>
26 #include <sys/sockio.h>
27 #include <sys/mbuf.h>
28 #include <sys/malloc.h>
29 #include <sys/kernel.h>
30 #include <sys/device.h>
31 #include <sys/socket.h>
32
33 #include <net/if.h>
34 #include <net/if_dl.h>
35 #include <net/if_media.h>
36
37 #ifdef INET
38 #include <netinet/in.h>
39 #include <netinet/in_systm.h>
40 #include <netinet/in_var.h>
41 #include <netinet/ip.h>
42 #include <netinet/if_ether.h>
43 #endif
44
45 #include <dev/mii/mii.h>
46 #include <dev/mii/miivar.h>
47
48 #include <dev/pci/pcireg.h>
49 #include <dev/pci/pcivar.h>
50 #include <dev/pci/pcidevs.h>
51
52 #include <dev/ic/rtl81x9reg.h>
53 #include <dev/ic/revar.h>
54
55 struct re_pci_softc {
56 /* General */
57 struct rl_softc sc_rl;
58
59 /* PCI-specific data */
60 void *sc_ih;
61 pci_chipset_tag_t sc_pc;
62 pcitag_t sc_pcitag;
63 };
64
65 const struct pci_matchid re_pci_devices[] = {
66 { PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8169 },
67 { PCI_VENDOR_COREGA, PCI_PRODUCT_COREGA_CGLAPCIGT },
68 { PCI_VENDOR_DLINK, PCI_PRODUCT_DLINK_DGE528T },
69 { PCI_VENDOR_USR2, PCI_PRODUCT_USR2_USR997902 },
70 };
71
72 int re_pci_probe(struct device *, void *, void *);
73 void re_pci_attach(struct device *, struct device *, void *);
74
75 /*
76 * PCI autoconfig definitions
77 */
78 struct cfattach re_pci_ca = {
79 sizeof(struct re_pci_softc),
80 re_pci_probe,
81 re_pci_attach
82 };
83
84 /*
85 * Probe for a Realtek 8169/8110 chip. Check the PCI vendor and device
86 * IDs against our list and return a device name if we find a match.
87 */
88 int
re_pci_probe(struct device * parent,void * match,void * aux)89 re_pci_probe(struct device *parent, void *match, void *aux)
90 {
91 return (pci_matchbyid((struct pci_attach_args *)aux, re_pci_devices,
92 sizeof(re_pci_devices)/sizeof(re_pci_devices[0])));
93 }
94
95 /*
96 * PCI-specific attach routine
97 */
98 void
re_pci_attach(struct device * parent,struct device * self,void * aux)99 re_pci_attach(struct device *parent, struct device *self, void *aux)
100 {
101 struct re_pci_softc *psc = (struct re_pci_softc *)self;
102 struct rl_softc *sc = &psc->sc_rl;
103 struct pci_attach_args *pa = aux;
104 pci_chipset_tag_t pc = pa->pa_pc;
105 pci_intr_handle_t ih;
106 const char *intrstr = NULL;
107 bus_size_t iosize;
108 pcireg_t command;
109
110 #ifndef BURN_BRIDGES
111 /*
112 * Handle power management nonsense.
113 */
114
115 command = pci_conf_read(pc, pa->pa_tag, RL_PCI_CAPID) & 0x000000FF;
116
117 if (command == 0x01) {
118 u_int32_t iobase, membase, irq;
119
120 /* Save important PCI config data. */
121 iobase = pci_conf_read(pc, pa->pa_tag, RL_PCI_LOIO);
122 membase = pci_conf_read(pc, pa->pa_tag, RL_PCI_LOMEM);
123 irq = pci_conf_read(pc, pa->pa_tag, RL_PCI_INTLINE);
124
125 /* Reset the power state. */
126 printf("%s: chip is is in D%d power mode "
127 "-- setting to D0\n", sc->sc_dev.dv_xname,
128 command & RL_PSTATE_MASK);
129 command &= 0xFFFFFFFC;
130
131 /* Restore PCI config data. */
132 pci_conf_write(pc, pa->pa_tag, RL_PCI_LOIO, iobase);
133 pci_conf_write(pc, pa->pa_tag, RL_PCI_LOMEM, membase);
134 pci_conf_write(pc, pa->pa_tag, RL_PCI_INTLINE, irq);
135 }
136 #endif
137
138 /*
139 * Map control/status registers.
140 */
141 command = pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
142 command |= PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE |
143 PCI_COMMAND_MASTER_ENABLE;
144 pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, command);
145 command = pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
146
147 if ((command & (PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE)) == 0) {
148 printf(": neither i/o nor mem enabled\n");
149 return;
150 }
151
152 if (command & PCI_COMMAND_MEM_ENABLE) {
153 if (pci_mapreg_map(pa, RL_PCI_LOMEM, PCI_MAPREG_TYPE_MEM, 0,
154 &sc->rl_btag, &sc->rl_bhandle, NULL, &iosize, 0)) {
155 printf(": can't map mem space\n");
156 return;
157 }
158 } else {
159 if (pci_mapreg_map(pa, RL_PCI_LOIO, PCI_MAPREG_TYPE_IO, 0,
160 &sc->rl_btag, &sc->rl_bhandle, NULL, &iosize, 0)) {
161 printf(": can't map i/o space\n");
162 return;
163 }
164 }
165
166 /* Allocate interrupt */
167 if (pci_intr_map(pa, &ih)) {
168 printf(": couldn't map interrupt\n");
169 return;
170 }
171 intrstr = pci_intr_string(pc, ih);
172 psc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, re_intr, sc,
173 sc->sc_dev.dv_xname);
174 if (psc->sc_ih == NULL) {
175 printf(": couldn't establish interrupt");
176 if (intrstr != NULL)
177 printf(" at %s", intrstr);
178 return;
179 }
180 printf(": %s", intrstr);
181
182 sc->sc_dmat = pa->pa_dmat;
183 sc->sc_flags |= RL_ENABLED;
184 sc->rl_type = RL_8169;
185
186 /* Call bus-independent attach routine */
187 re_attach_common(sc);
188 }
189