| /openbsd/src/gnu/gcc/gcc/config/i386/ |
| D | i386.opt | 23 Target RejectNegative Report Mask(128BIT_LONG_DOUBLE)
27 Target RejectNegative Negative(m64) Report InverseMask(64BIT)
31 Target RejectNegative Undocumented
35 Target Report Mask(3DNOW)
39 Target RejectNegative Undocumented
43 Target RejectNegative Negative(m32) Report Mask(64BIT)
47 Target Report Mask(80387)
51 Target RejectNegative Report InverseMask(128BIT_LONG_DOUBLE)
55 Target Report Mask(ACCUMULATE_OUTGOING_ARGS)
59 Target Report Mask(ALIGN_DOUBLE)
[all …]
|
| /openbsd/src/gnu/usr.bin/clang/include/llvm/AMDGPU/ |
| D | Makefile | 48 AMDGPUGenAsmMatcher.inc: ${LLVM_SRCS}/lib/Target/AMDGPU/AMDGPU.td
50 -I${LLVM_SRCS}/include -I${LLVM_SRCS}/lib/Target/AMDGPU \
52 AMDGPUGenAsmWriter.inc: ${LLVM_SRCS}/lib/Target/AMDGPU/AMDGPU.td
54 -I${LLVM_SRCS}/include -I${LLVM_SRCS}/lib/Target/AMDGPU \
56 AMDGPUGenCallingConv.inc: ${LLVM_SRCS}/lib/Target/AMDGPU/AMDGPU.td
58 -I${LLVM_SRCS}/include -I${LLVM_SRCS}/lib/Target/AMDGPU \
60 AMDGPUGenDAGISel.inc: ${LLVM_SRCS}/lib/Target/AMDGPU/AMDGPU.td
62 -I${LLVM_SRCS}/include -I${LLVM_SRCS}/lib/Target/AMDGPU \
64 AMDGPUGenDisassemblerTables.inc: ${LLVM_SRCS}/lib/Target/AMDGPU/AMDGPU.td
66 -I${LLVM_SRCS}/include -I${LLVM_SRCS}/lib/Target/AMDGPU \
[all …]
|
| /openbsd/src/gnu/gcc/gcc/config/mips/ |
| D | mips.opt | 23 Target RejectNegative Joined
27 Target Report Mask(ABICALLS)
31 Target Report Var(TARGET_MAD)
35 Target RejectNegative Joined Var(mips_arch_string)
39 Target Report Mask(BRANCHLIKELY)
43 Target Report Mask(CHECK_ZERO_DIV)
47 Target Report RejectNegative Mask(DIVIDE_BREAKS)
51 Target Report RejectNegative InverseMask(DIVIDE_BREAKS, DIVIDE_TRAPS)
55 Target Report RejectNegative InverseMask(SINGLE_FLOAT, DOUBLE_FLOAT)
59 Target Report Mask(DSP)
[all …]
|
| /openbsd/src/gnu/usr.bin/clang/include/llvm/AArch64/ |
| D | Makefile | 36 AArch64GenAsmMatcher.inc: ${LLVM_SRCS}/lib/Target/AArch64/AArch64.td
38 -I${LLVM_SRCS}/include -I${LLVM_SRCS}/lib/Target/AArch64 \
41 AArch64GenAsmWriter.inc: ${LLVM_SRCS}/lib/Target/AArch64/AArch64.td
43 -I${LLVM_SRCS}/include -I${LLVM_SRCS}/lib/Target/AArch64 \
46 AArch64GenAsmWriter1.inc: ${LLVM_SRCS}/lib/Target/AArch64/AArch64.td
49 -I${LLVM_SRCS}/lib/Target/AArch64 -o ${.TARGET} ${.ALLSRC}
51 AArch64GenCallingConv.inc: ${LLVM_SRCS}/lib/Target/AArch64/AArch64.td
53 -I${LLVM_SRCS}/include -I${LLVM_SRCS}/lib/Target/AArch64 \
56 AArch64GenDAGISel.inc: ${LLVM_SRCS}/lib/Target/AArch64/AArch64.td
58 -I${LLVM_SRCS}/include -I${LLVM_SRCS}/lib/Target/AArch64 \
[all …]
|
| /openbsd/src/gnu/llvm/llvm/include/llvm/TextAPI/ |
| D | Target.h | 26 class Target {
28 Target() = default;
29 Target(Architecture Arch, PlatformType Platform) in Target() function
31 explicit Target(const llvm::Triple &Triple) in Target() function
34 static llvm::Expected<Target> create(StringRef Target);
42 inline bool operator==(const Target &LHS, const Target &RHS) {
46 inline bool operator!=(const Target &LHS, const Target &RHS) {
50 inline bool operator<(const Target &LHS, const Target &RHS) {
54 inline bool operator==(const Target &LHS, const Architecture &RHS) {
58 inline bool operator!=(const Target &LHS, const Architecture &RHS) {
[all …]
|
| /openbsd/src/gnu/gcc/gcc/config/rs6000/ |
| D | rs6000.opt | 24 Target Report RejectNegative Mask(POWER)
28 Target Report RejectNegative
32 Target Report Mask(POWER2)
36 Target Report RejectNegative Mask(POWERPC)
40 Target Report RejectNegative
44 Target Report Mask(POWERPC64)
48 Target Report Mask(PPC_GPOPT)
52 Target Report Mask(PPC_GFXOPT)
56 Target Report Mask(MFCRF)
60 Target Report Mask(POPCNTB)
[all …]
|
| D | sysv4.opt | 24 Target RejectNegative Joined
28 Target RejectNegative Joined
32 Target RejectNegative Joined
36 Target Report Mask(NO_BITFIELD_TYPE)
40 Target Report Mask(STRICT_ALIGN)
45 Target Report Mask(RELOCATABLE)
49 Target
53 Target Report RejectNegative Mask(LITTLE_ENDIAN)
57 Target Report RejectNegative Mask(LITTLE_ENDIAN) MaskExists
61 Target Report RejectNegative InverseMask(LITTLE_ENDIAN)
[all …]
|
| /openbsd/src/gnu/gcc/gcc/config/frv/ |
| D | frv.opt | 23 Target Report RejectNegative Mask(ACC_4)
27 Target Report RejectNegative InverseMask(ACC_4, ACC_8)
31 Target Report Mask(ALIGN_LABELS)
35 Target Report RejectNegative Mask(ALLOC_CC)
42 Target RejectNegative Joined UInteger Var(frv_branch_cost_int) Init(1)
46 Target Report Mask(COND_EXEC)
50 Target RejectNegative Joined UInteger Var(frv_condexec_insns) Init(8)
54 Target RejectNegative Joined UInteger Var(frv_condexec_temps) Init(4)
58 Target Report Mask(COND_MOVE)
62 Target RejectNegative Joined
[all …]
|
| /openbsd/src/gnu/usr.bin/clang/include/llvm/RISCV/ |
| D | Makefile | 29 RISCVGenRegisterInfo.inc: ${LLVM_SRCS}/lib/Target/RISCV/RISCV.td
31 -I${LLVM_SRCS}/include -I${LLVM_SRCS}/lib/Target/RISCV \
34 RISCVGenDisassemblerTables.inc: ${LLVM_SRCS}/lib/Target/RISCV/RISCV.td
36 -I${LLVM_SRCS}/include -I${LLVM_SRCS}/lib/Target/RISCV \
39 RISCVGenInstrInfo.inc: ${LLVM_SRCS}/lib/Target/RISCV/RISCV.td
41 -I${LLVM_SRCS}/include -I${LLVM_SRCS}/lib/Target/RISCV \
44 RISCVGenAsmWriter.inc: ${LLVM_SRCS}/lib/Target/RISCV/RISCV.td
47 -I${LLVM_SRCS}/lib/Target/RISCV -o ${.TARGET} ${.ALLSRC}
49 RISCVGenAsmMatcher.inc: ${LLVM_SRCS}/lib/Target/RISCV/RISCV.td
51 -I${LLVM_SRCS}/include -I${LLVM_SRCS}/lib/Target/RISCV \
[all …]
|
| /openbsd/src/gnu/gcc/gcc/config/sh/ |
| D | sh.opt | 44 Target RejectNegative Mask(SH1) Condition(SUPPORT_SH1)
48 Target RejectNegative Mask(SH2) Condition(SUPPORT_SH2)
52 Target RejectNegative Condition(SUPPORT_SH2A)
56 Target RejectNegative Condition(SUPPORT_SH2A_NOFPU)
60 Target RejectNegative Condition (SUPPORT_SH2A_SINGLE)
64 Target RejectNegative Condition (SUPPORT_SH2A_SINGLE_ONLY)
68 Target RejectNegative Condition(SUPPORT_SH2E)
72 Target RejectNegative Mask(SH3) Condition(SUPPORT_SH3)
76 Target RejectNegative Condition(SUPPORT_SH3E)
80 Target RejectNegative Mask(SH4) Condition(SUPPORT_SH4)
[all …]
|
| /openbsd/src/gnu/gcc/gcc/config/m68k/ |
| D | m68k.opt | 23 Target RejectNegative Mask(5200)
27 Target RejectNegative Mask(CF_HWDIV)
31 Target RejectNegative Mask(528x)
35 Target RejectNegative Mask(CFV3)
39 Target RejectNegative Mask(CFV4)
43 Target RejectNegative Mask(CFV4E)
47 Target RejectNegative
51 Target RejectNegative Mask(68020)
55 Target RejectNegative Mask(68040)
59 Target RejectNegative Mask(68060)
[all …]
|
| /openbsd/src/gnu/llvm/llvm/lib/TextAPI/ |
| D | InterfaceFile.cpp | 33 typename C::iterator addEntry(C &Container, const Target &Target_) { in addEntry()
35 lower_bound(Container, Target_, [](const Target &LHS, const Target &RHS) { in addEntry()
45 void InterfaceFileRef::addTarget(const Target &Target) { in addTarget() argument
46 addEntry(Targets, Target); in addTarget()
50 const Target &Target) { in addAllowableClient() argument
52 Client->addTarget(Target); in addAllowableClient()
56 const Target &Target) { in addReexportedLibrary() argument
58 Lib->addTarget(Target); in addReexportedLibrary()
61 void InterfaceFile::addParentUmbrella(const Target &Target_, StringRef Parent) { in addParentUmbrella()
63 [](const std::pair<Target, std::string> &LHS, in addParentUmbrella()
[all …]
|
| D | Target.cpp | 17 Expected<Target> Target::create(StringRef TargetValue) { in create()
45 return Target{Architecture, Platform}; in create()
48 Target::operator std::string() const { in operator std::string()
53 raw_ostream &operator<<(raw_ostream &OS, const Target &Target) { in operator <<() argument
54 OS << std::string(Target); in operator <<()
58 PlatformSet mapToPlatformSet(ArrayRef<Target> Targets) { in mapToPlatformSet()
60 for (const auto &Target : Targets) in mapToPlatformSet() local
61 Result.insert(Target.Platform); in mapToPlatformSet()
65 ArchitectureSet mapToArchitectureSet(ArrayRef<Target> Targets) { in mapToArchitectureSet()
67 for (const auto &Target : Targets) in mapToArchitectureSet() local
[all …]
|
| /openbsd/src/gnu/usr.bin/clang/include/llvm/Mips/ |
| D | Makefile | 31 MipsGenAsmMatcher.inc: ${LLVM_SRCS}/lib/Target/Mips/Mips.td
33 -I${LLVM_SRCS}/include -I${LLVM_SRCS}/lib/Target/Mips \
36 MipsGenAsmWriter.inc: ${LLVM_SRCS}/lib/Target/Mips/Mips.td
38 -I${LLVM_SRCS}/include -I${LLVM_SRCS}/lib/Target/Mips \
41 MipsGenCallingConv.inc: ${LLVM_SRCS}/lib/Target/Mips/Mips.td
43 -I${LLVM_SRCS}/include -I${LLVM_SRCS}/lib/Target/Mips \
46 MipsGenDAGISel.inc: ${LLVM_SRCS}/lib/Target/Mips/Mips.td
48 -I${LLVM_SRCS}/include -I${LLVM_SRCS}/lib/Target/Mips \
51 MipsGenDisassemblerTables.inc: ${LLVM_SRCS}/lib/Target/Mips/Mips.td
53 -I${LLVM_SRCS}/include -I${LLVM_SRCS}/lib/Target/Mips \
[all …]
|
| /openbsd/src/gnu/usr.bin/clang/include/llvm/X86/ |
| D | Makefile | 31 X86GenAsmMatcher.inc: ${LLVM_SRCS}/lib/Target/X86/X86.td
33 -I${LLVM_SRCS}/include -I${LLVM_SRCS}/lib/Target/X86 \
36 X86GenAsmWriter.inc: ${LLVM_SRCS}/lib/Target/X86/X86.td
38 -I${LLVM_SRCS}/include -I${LLVM_SRCS}/lib/Target/X86 \
41 X86GenAsmWriter1.inc: ${LLVM_SRCS}/lib/Target/X86/X86.td
43 -I${LLVM_SRCS}/include -I${LLVM_SRCS}/lib/Target/X86 \
46 X86GenCallingConv.inc: ${LLVM_SRCS}/lib/Target/X86/X86.td
48 -I${LLVM_SRCS}/include -I${LLVM_SRCS}/lib/Target/X86 \
51 X86GenDAGISel.inc: ${LLVM_SRCS}/lib/Target/X86/X86.td
53 -I${LLVM_SRCS}/include -I${LLVM_SRCS}/lib/Target/X86 \
[all …]
|
| /openbsd/src/gnu/usr.bin/clang/include/llvm/ARM/ |
| D | Makefile | 30 ARMGenAsmMatcher.inc: ${LLVM_SRCS}/lib/Target/ARM/ARM.td
32 -I${LLVM_SRCS}/include -I${LLVM_SRCS}/lib/Target/ARM \
35 ARMGenAsmWriter.inc: ${LLVM_SRCS}/lib/Target/ARM/ARM.td
37 -I${LLVM_SRCS}/include -I${LLVM_SRCS}/lib/Target/ARM \
40 ARMGenCallingConv.inc: ${LLVM_SRCS}/lib/Target/ARM/ARM.td
42 -I${LLVM_SRCS}/include -I${LLVM_SRCS}/lib/Target/ARM \
45 ARMGenDAGISel.inc: ${LLVM_SRCS}/lib/Target/ARM/ARM.td
47 -I${LLVM_SRCS}/include -I${LLVM_SRCS}/lib/Target/ARM \
50 ARMGenDisassemblerTables.inc: ${LLVM_SRCS}/lib/Target/ARM/ARM.td
52 -I${LLVM_SRCS}/include -I${LLVM_SRCS}/lib/Target/ARM \
[all …]
|
| /openbsd/src/gnu/llvm/llvm/include/llvm/MC/ |
| D | TargetRegistry.h | 149 class Target {
168 *(*)(const Target &T, const Triple &TT, StringRef CPU, StringRef Features,
176 using MCAsmBackendCtorTy = MCAsmBackend *(*)(const Target &T,
183 using MCDisassemblerCtorTy = MCDisassembler *(*)(const Target &T,
259 Target *Next;
370 Target() = default;
376 const Target *getNext() const { return Next; } in getNext()
744 const Target *Current = nullptr;
746 explicit iterator(Target *T) : Current(T) {} in iterator()
750 using value_type = Target;
[all …]
|
| /openbsd/src/gnu/gcc/gcc/config/arm/ |
| D | arm.opt | 23 Target RejectNegative Joined Var(target_abi_name)
27 Target Report Mask(ABORT_NORETURN)
31 Target RejectNegative Mask(APCS_FRAME) MaskExists Undocumented
34 Target Report Mask(APCS_FLOAT)
38 Target Report Mask(APCS_FRAME)
42 Target Report Mask(APCS_REENT)
46 Target Report Mask(APCS_STACK) Undocumented
49 Target RejectNegative Joined
53 Target RejectNegative InverseMask(THUMB) Undocumented
56 Target Report RejectNegative Mask(BIG_END)
[all …]
|
| /openbsd/src/gnu/usr.bin/clang/include/llvm/PowerPC/ |
| D | Makefile | 29 PPCGenAsmMatcher.inc: ${LLVM_SRCS}/lib/Target/PowerPC/PPC.td
31 -I${LLVM_SRCS}/include -I${LLVM_SRCS}/lib/Target/PowerPC \
34 PPCGenAsmWriter.inc: ${LLVM_SRCS}/lib/Target/PowerPC/PPC.td
36 -I${LLVM_SRCS}/include -I${LLVM_SRCS}/lib/Target/PowerPC \
39 PPCGenCallingConv.inc: ${LLVM_SRCS}/lib/Target/PowerPC/PPC.td
41 -I${LLVM_SRCS}/include -I${LLVM_SRCS}/lib/Target/PowerPC \
44 PPCGenDAGISel.inc: ${LLVM_SRCS}/lib/Target/PowerPC/PPC.td
46 -I${LLVM_SRCS}/include -I${LLVM_SRCS}/lib/Target/PowerPC \
49 PPCGenDisassemblerTables.inc: ${LLVM_SRCS}/lib/Target/PowerPC/PPC.td
51 -I${LLVM_SRCS}/include -I${LLVM_SRCS}/lib/Target/PowerPC \
[all …]
|
| /openbsd/src/gnu/gcc/gcc/config/c4x/ |
| D | c4x.opt | 23 Target RejectNegative
27 Target RejectNegative
31 Target RejectNegative
35 Target RejectNegative
39 Target RejectNegative
43 Target RejectNegative
47 Target Report Mask(ALIASES)
51 Target RejectNegative Report InverseMask(SMALL)
55 Target Report Mask(BK)
59 Target RejectNegative Joined
[all …]
|
| /openbsd/src/gnu/gcc/gcc/config/ia64/ |
| D | ia64.opt | 2 Target Report RejectNegative Mask(BIG_ENDIAN)
6 Target Report RejectNegative InverseMask(BIG_ENDIAN)
10 Target Report Mask(GNU_AS)
14 Target Report Mask(GNU_LD)
18 Target Report Mask(VOL_ASM_STOP)
22 Target Mask(REG_NAMES)
26 Target Report RejectNegative Mask(NO_SDATA)
29 Target Report RejectNegative InverseMask(NO_SDATA)
33 Target Report RejectNegative Mask(NO_PIC)
37 Target Report RejectNegative Mask(CONST_GP)
[all …]
|
| /openbsd/src/gnu/llvm/clang/lib/Basic/Targets/ |
| D | OSTargets.h | 38 template <typename Target>
39 class LLVM_LIBRARY_VISIBILITY CloudABITargetInfo : public OSTargetInfo<Target> {
53 using OSTargetInfo<Target>::OSTargetInfo;
57 template <typename Target>
58 class LLVM_LIBRARY_VISIBILITY AnanasTargetInfo : public OSTargetInfo<Target> {
68 using OSTargetInfo<Target>::OSTargetInfo;
75 template <typename Target>
76 class LLVM_LIBRARY_VISIBILITY DarwinTargetInfo : public OSTargetInfo<Target> {
86 : OSTargetInfo<Target>(Triple, Opts) { in DarwinTargetInfo()
153 return OSTargetInfo<Target>::getExnObjectAlignment(); in getExnObjectAlignment()
[all …]
|
| /openbsd/src/gnu/gcc/gcc/config/alpha/ |
| D | alpha.opt | 23 Target Report Mask(SOFT_FP)
27 Target Report Mask(FPREGS)
31 Target RejectNegative Mask(GAS)
35 Target RejectNegative InverseMask(GAS)
39 Target RejectNegative Mask(IEEE_CONFORMANT)
43 Target Report RejectNegative Mask(IEEE)
47 Target Report RejectNegative InverseMask(IEEE)
51 Target Report RejectNegative Mask(IEEE_WITH_INEXACT)
55 Target Report Mask(BUILD_CONSTANTS)
59 Target Report RejectNegative Mask(FLOAT_VAX)
[all …]
|
| /openbsd/src/gnu/gcc/gcc/config/pa/ |
| D | pa.opt | 23 Target RejectNegative
27 Target RejectNegative
31 Target RejectNegative
35 Target Report Mask(BIG_SWITCH)
39 Target Report Mask(DISABLE_FPREGS)
43 Target Report Mask(DISABLE_INDEXING)
47 Target Report Mask(FAST_INDIRECT_CALLS)
51 Target RejectNegative Joined
55 Target Report Mask(GAS)
59 Target Report Mask(JUMP_IN_DELAY)
[all …]
|
| /openbsd/src/gnu/usr.bin/clang/include/llvm/Sparc/ |
| D | Makefile | 25 SparcGenAsmMatcher.inc: ${LLVM_SRCS}/lib/Target/Sparc/Sparc.td
27 -I${LLVM_SRCS}/include -I${LLVM_SRCS}/lib/Target/Sparc \
30 SparcGenAsmWriter.inc: ${LLVM_SRCS}/lib/Target/Sparc/Sparc.td
32 -I${LLVM_SRCS}/include -I${LLVM_SRCS}/lib/Target/Sparc \
35 SparcGenCallingConv.inc: ${LLVM_SRCS}/lib/Target/Sparc/Sparc.td
37 -I${LLVM_SRCS}/include -I${LLVM_SRCS}/lib/Target/Sparc \
40 SparcGenDAGISel.inc: ${LLVM_SRCS}/lib/Target/Sparc/Sparc.td
42 -I${LLVM_SRCS}/include -I${LLVM_SRCS}/lib/Target/Sparc \
45 SparcGenDisassemblerTables.inc: ${LLVM_SRCS}/lib/Target/Sparc/Sparc.td
47 -I${LLVM_SRCS}/include -I${LLVM_SRCS}/lib/Target/Sparc \
[all …]
|