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Searched refs:uart_getreg (Results 1 – 13 of 13) sorted by relevance

/freebsd-13-stable/sys/mips/cavium/
HDuart_dev_oct16550.c85 iir = uart_getreg(bas, REG_IIR); in oct16550_clrint()
89 (void)uart_getreg(bas, REG_LSR); in oct16550_clrint()
91 (void)uart_getreg(bas, REG_DATA); in oct16550_clrint()
93 (void)uart_getreg(bas, REG_MSR); in oct16550_clrint()
95 (void) uart_getreg(bas, REG_USR); in oct16550_clrint()
97 iir = uart_getreg(bas, REG_IIR); in oct16550_clrint()
112 lcr = uart_getreg(bas, REG_LCR); in oct16550_delay()
115 divisor = uart_getreg(bas, REG_DLL) | (uart_getreg(bas, REG_DLH) << 8); in oct16550_delay()
168 while ((uart_getreg(bas, REG_LSR) & LSR_TEMT) == 0 && --limit) in oct16550_drain()
186 while ((uart_getreg(bas, REG_LSR) & LSR_RXRDY) && --limit) { in oct16550_drain()
[all …]
/freebsd-13-stable/sys/dev/uart/
HDuart_dev_ns8250.c90 iir = uart_getreg(bas, REG_IIR); in ns8250_clrint()
94 lsr = uart_getreg(bas, REG_LSR); in ns8250_clrint()
96 (void)uart_getreg(bas, REG_DATA); in ns8250_clrint()
98 (void)uart_getreg(bas, REG_DATA); in ns8250_clrint()
100 (void)uart_getreg(bas, REG_MSR); in ns8250_clrint()
102 iir = uart_getreg(bas, REG_IIR); in ns8250_clrint()
112 lcr = uart_getreg(bas, REG_LCR); in ns8250_delay()
115 divisor = uart_getreg(bas, REG_DLL) | (uart_getreg(bas, REG_DLH) << 8); in ns8250_delay()
164 while ((uart_getreg(bas, REG_LSR) & LSR_TEMT) == 0 && --limit) in ns8250_drain()
182 while ((uart_getreg(bas, REG_LSR) & LSR_RXRDY) && --limit) { in ns8250_drain()
[all …]
HDuart_dev_mvebu.c181 ctrl = uart_getreg(bas, UART_CTRL); in uart_mvebu_param()
209 ccr = uart_getreg(bas, UART_CCR); in uart_mvebu_param()
234 uart_setreg(bas, UART_CTRL, uart_getreg(bas, UART_CTRL) & in uart_mvebu_init()
244 while (uart_getreg(bas, UART_STAT) & STAT_TX_FIFO_FULL) in uart_mvebu_putc()
252 if (uart_getreg(bas, UART_STAT) & STAT_RX_RDY) in uart_mvebu_rxready()
263 while (!(uart_getreg(bas, UART_STAT) & STAT_RX_RDY)) in uart_mvebu_getc()
266 c = uart_getreg(bas, UART_RBR) & 0xff; in uart_mvebu_getc()
337 ctrl = uart_getreg(bas, UART_CTRL); in uart_mvebu_bus_attach()
367 ctrl = uart_getreg(bas, UART_CTRL); in uart_mvebu_bus_flush()
413 ctrl = uart_getreg(bas, UART_CTRL); in uart_mvebu_bus_ioctl()
[all …]
HDuart_dev_msm.c233 if (!(uart_getreg(bas, UART_DM_SR) & UART_DM_SR_TXEMT)) { in msm_putc()
234 while ((uart_getreg(bas, UART_DM_ISR) & UART_DM_TX_READY) == 0 in msm_putc()
243 while ((uart_getreg(bas, UART_DM_SR) & UART_DM_SR_TXRDY) == 0) in msm_putc()
255 return ((uart_getreg(bas, UART_DM_SR) & UART_DM_SR_RXRDY) == in msm_rxready()
267 while ((uart_getreg(bas, UART_DM_SR) & UART_DM_SR_RXRDY) != in msm_getc()
272 if (uart_getreg(bas, UART_DM_SR) & UART_DM_SR_UART_OVERRUN) in msm_getc()
276 c = uart_getreg(bas, UART_DM_RF(0)); in msm_getc()
412 while (uart_getreg(bas, UART_DM_SR) & UART_DM_SR_RXRDY) { in msm_bus_receive()
420 c = uart_getreg(bas, UART_DM_RF(0)); in msm_bus_receive()
HDuart_dev_z8530.c69 return (uart_getreg(bas, REG_CTRL)); in uart_getmreg()
231 while (!(uart_getreg(bas, REG_CTRL) & BES_TXE)) in z8530_putc()
241 return ((uart_getreg(bas, REG_CTRL) & BES_RXA) != 0 ? 1 : 0); in z8530_rxready()
251 while (!(uart_getreg(bas, REG_CTRL) & BES_RXA)) { in z8530_getc()
257 c = uart_getreg(bas, REG_DATA); in z8530_getc()
545 xc = uart_getreg(bas, REG_DATA); in z8530_bus_receive()
563 (void)uart_getreg(bas, REG_DATA); in z8530_bus_receive()
HDuart_dev_ti8250.c85 while (uart_getreg(&sc->sc_bas, SYSS_REG) & SYSS_STATUS_RESETDONE) in ti8250_bus_probe()
HDuart.h52 uart_getreg(struct uart_bas *bas, int reg) in uart_getreg() function
/freebsd-13-stable/sys/arm/freescale/vybrid/
HDvf_uart.c156 while (!(uart_getreg(bas, UART_S1) & UART_S1_TDRE)) in vf_uart_putc()
167 usr1 = uart_getreg(bas, UART_S1); in vf_uart_rxready()
182 while (!(uart_getreg(bas, UART_S1) & UART_S1_RDRF)) in vf_uart_getc()
185 c = uart_getreg(bas, UART_D); in vf_uart_getc()
218 reg = uart_getreg(bas, UART_C2); in uart_reinit()
227 reg = uart_getreg(bas, UART_BDH); in uart_reinit()
235 reg = uart_getreg(bas, UART_C4); in uart_reinit()
240 reg = uart_getreg(bas, UART_C2); in uart_reinit()
302 reg = uart_getreg(bas, UART_C2); in vf_uart_bus_attach()
377 usr1 = uart_getreg(bas, UART_S1); in vf_uart_bus_ipend()
[all …]
/freebsd-13-stable/sys/mips/mediatek/
HDuart_dev_mtk.c147 while (!(uart_getreg(bas, UART_LSR_REG) & UART_LSR_THRE)); in mtk_uart_putc()
150 while (!(uart_getreg(bas, UART_LSR_REG) & UART_LSR_THRE)); in mtk_uart_putc()
156 if (uart_getreg(bas, UART_LSR_REG) & UART_LSR_DR) in mtk_uart_rxready()
168 while (!(uart_getreg(bas, UART_LSR_REG) & UART_LSR_DR)) { in mtk_uart_getc()
174 c = uart_getreg(bas, UART_RX_REG); in mtk_uart_getc()
257 cr = uart_getreg(bas, UART_IER_REG); in mtk_uart_disable_txintr()
272 cr = uart_getreg(bas, UART_IER_REG); in mtk_uart_enable_txintr()
306 uart_getreg(bas, UART_FCR_REG) | in mtk_uart_bus_attach()
328 uint32_t fcr = uart_getreg(bas, UART_FCR_REG); in mtk_uart_bus_flush()
354 bes = uart_getreg(&sc->sc_bas, UART_MSR_REG); in mtk_uart_bus_getsig()
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HDuart_dev_mtk.h34 #undef uart_getreg
36 #define uart_getreg(bas, reg) \ macro
/freebsd-13-stable/sys/riscv/sifive/
HDsifive_uart.c128 while ((uart_getreg(bas, SFUART_TXDATA) & SFUART_TXDATA_FULL) in sfuart_putc()
145 return ((uart_getreg(bas, SFUART_IRQ_PENDING) & in sfuart_rxready()
156 while (((c = uart_getreg(bas, SFUART_RXDATA)) & in sfuart_getc()
267 reg = uart_getreg(bas, SFUART_TXDATA); in sfuart_bus_flush()
273 reg = uart_getreg(bas, SFUART_RXDATA); in sfuart_bus_flush()
338 reg = uart_getreg(bas, SFUART_DIV); in sfuart_bus_ioctl()
368 reg = uart_getreg(bas, SFUART_IRQ_PENDING); in sfuart_bus_ipend()
369 ie = uart_getreg(bas, SFUART_IRQ_ENABLE); in sfuart_bus_ipend()
405 reg = uart_getreg(bas, SFUART_TXCTRL); in sfuart_bus_param()
433 reg = uart_getreg(bas, SFUART_RXDATA); in sfuart_bus_receive()
[all …]
/freebsd-13-stable/sys/arm/nvidia/
HDtegra_uart.c80 ns8250->ier = uart_getreg(bas, REG_IER) & ns8250->ier_mask; in tegra_uart_attach()
100 ier = uart_getreg(bas, REG_IER); in tegra_uart_grab()
103 while ((uart_getreg(bas, REG_LSR) & LSR_TEMT) == 0) in tegra_uart_grab()
/freebsd-13-stable/sys/mips/ingenic/
HDjz4780_uart.c77 ns8250->ier = uart_getreg(bas, REG_IER) & ns8250->ier_mask; in jz4780_bus_attach()