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Searched refs:Cond (Results 1 – 25 of 283) sorted by relevance

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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/WebAssembly/
HDWebAssemblyInstrInfo.cpp105 SmallVectorImpl<MachineOperand> &Cond, in analyzeBranch() argument
123 Cond.push_back(MachineOperand::CreateImm(true)); in analyzeBranch()
124 Cond.push_back(MI.getOperand(1)); in analyzeBranch()
131 Cond.push_back(MachineOperand::CreateImm(false)); in analyzeBranch()
132 Cond.push_back(MI.getOperand(1)); in analyzeBranch()
145 Cond.push_back(MachineOperand::CreateImm(true)); in analyzeBranch()
146 Cond.push_back(MI.getOperand(2)); in analyzeBranch()
182 ArrayRef<MachineOperand> Cond, const DebugLoc &DL, int *BytesAdded) const { in insertBranch() argument
185 if (Cond.empty()) { in insertBranch()
193 assert(Cond.size() == 2 && "Expected a flag and a successor block"); in insertBranch()
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HDWebAssemblyLowerBrUnless.cpp71 Register Cond = MI->getOperand(1).getReg(); in runOnMachineFunction() local
75 if (MFI.isVRegStackified(Cond)) { in runOnMachineFunction()
76 assert(MRI.hasOneDef(Cond)); in runOnMachineFunction()
77 MachineInstr *Def = MRI.getVRegDef(Cond); in runOnMachineFunction()
178 Cond = Def->getOperand(1).getReg(); in runOnMachineFunction()
193 .addReg(Cond); in runOnMachineFunction()
195 Cond = Tmp; in runOnMachineFunction()
204 .addReg(Cond); in runOnMachineFunction()
/freebsd-11-stable/contrib/llvm-project/clang/lib/StaticAnalyzer/Core/
HDSimpleConstraintManager.cpp26 DefinedSVal Cond, in assume() argument
29 if (Optional<Loc> LV = Cond.getAs<Loc>()) { in assume()
38 Cond = SVB.evalCast(*LV, SVB.getContext().BoolTy, T).castAs<DefinedSVal>(); in assume()
41 return assume(State, Cond.castAs<NonLoc>(), Assumption); in assume()
45 NonLoc Cond, bool Assumption) { in assume() argument
46 State = assumeAux(State, Cond, Assumption); in assume()
48 return SU->processAssume(State, Cond, Assumption); in assume()
53 NonLoc Cond, in assumeAux() argument
58 if (!canReasonAbout(Cond)) { in assumeAux()
60 SymbolRef Sym = Cond.getAsSymExpr(); in assumeAux()
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Transforms/Utils/
HDLibCallsShrinkWrap.cpp95 void shrinkWrapCI(CallInst *CI, Value *Cond);
138 Value *Cond = nullptr; in performCallDomainErrorOnly() local
149 Cond = createOrCond(CI, CmpInst::FCMP_OLT, -1.0f, CmpInst::FCMP_OGT, 1.0f); in performCallDomainErrorOnly()
160 Cond = createOrCond(CI, CmpInst::FCMP_OEQ, INFINITY, CmpInst::FCMP_OEQ, in performCallDomainErrorOnly()
169 Cond = createCond(CI, CmpInst::FCMP_OLT, 1.0f); in performCallDomainErrorOnly()
177 Cond = createCond(CI, CmpInst::FCMP_OLT, 0.0f); in performCallDomainErrorOnly()
183 shrinkWrapCI(CI, Cond); in performCallDomainErrorOnly()
190 Value *Cond = nullptr; in performCallRangeErrorOnly() local
208 Cond = generateTwoRangeCond(CI, Func); in performCallRangeErrorOnly()
215 Cond = generateOneRangeCond(CI, Func); in performCallRangeErrorOnly()
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/MSP430/
HDMSP430InstrInfo.cpp132 reverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const { in reverseBranchCondition()
133 assert(Cond.size() == 1 && "Invalid Xbranch condition!"); in reverseBranchCondition()
135 MSP430CC::CondCodes CC = static_cast<MSP430CC::CondCodes>(Cond[0].getImm()); in reverseBranchCondition()
159 Cond[0].setImm(CC); in reverseBranchCondition()
178 SmallVectorImpl<MachineOperand> &Cond, in analyzeBranch() argument
213 Cond.clear(); in analyzeBranch()
237 if (Cond.empty()) { in analyzeBranch()
240 Cond.push_back(MachineOperand::CreateImm(BranchCode)); in analyzeBranch()
246 assert(Cond.size() == 1); in analyzeBranch()
254 MSP430CC::CondCodes OldBranchCode = (MSP430CC::CondCodes)Cond[0].getImm(); in analyzeBranch()
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/XCore/
HDXCoreInstrInfo.cpp192 SmallVectorImpl<MachineOperand> &Cond, in analyzeBranch() argument
220 Cond.push_back(MachineOperand::CreateImm(BranchCode)); in analyzeBranch()
221 Cond.push_back(LastInst->getOperand(0)); in analyzeBranch()
241 Cond.push_back(MachineOperand::CreateImm(BranchCode)); in analyzeBranch()
242 Cond.push_back(SecondLastInst->getOperand(0)); in analyzeBranch()
274 ArrayRef<MachineOperand> Cond, in insertBranch() argument
279 assert((Cond.size() == 2 || Cond.size() == 0) && in insertBranch()
284 if (Cond.empty()) { in insertBranch()
289 unsigned Opc = GetCondBranchFromCond((XCore::CondCode)Cond[0].getImm()); in insertBranch()
290 BuildMI(&MBB, DL, get(Opc)).addReg(Cond[1].getReg()) in insertBranch()
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/ARC/
HDARCInstrInfo.cpp173 SmallVectorImpl<MachineOperand> &Cond, in analyzeBranch() argument
202 if (!Cond.empty()) in analyzeBranch()
208 Cond.push_back(I->getOperand(1)); in analyzeBranch()
209 Cond.push_back(I->getOperand(2)); in analyzeBranch()
210 Cond.push_back(I->getOperand(3)); in analyzeBranch()
225 Cond.clear(); in analyzeBranch()
351 SmallVectorImpl<MachineOperand> &Cond) const { in reverseBranchCondition()
352 assert((Cond.size() == 3) && "Invalid ARC branch condition!"); in reverseBranchCondition()
353 Cond[2].setImm(GetOppositeBranchCondition((ARCCC::CondCode)Cond[2].getImm())); in reverseBranchCondition()
373 ArrayRef<MachineOperand> Cond, in insertBranch() argument
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Mips/
HDMipsInstrInfo.cpp81 SmallVectorImpl<MachineOperand> &Cond) const { in AnalyzeCondBr()
88 Cond.push_back(MachineOperand::CreateImm(Opc)); in AnalyzeCondBr()
91 Cond.push_back(Inst->getOperand(i)); in AnalyzeCondBr()
97 SmallVectorImpl<MachineOperand> &Cond, in analyzeBranch() argument
100 BranchType BT = analyzeBranch(MBB, TBB, FBB, Cond, AllowModify, BranchInstrs); in analyzeBranch()
107 ArrayRef<MachineOperand> Cond) const { in BuildCondBr()
108 unsigned Opc = Cond[0].getImm(); in BuildCondBr()
112 for (unsigned i = 1; i < Cond.size(); ++i) { in BuildCondBr()
113 assert((Cond[i].isImm() || Cond[i].isReg()) && in BuildCondBr()
115 MIB.add(Cond[i]); in BuildCondBr()
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HDMipsInstrInfo.h65 SmallVectorImpl<MachineOperand> &Cond,
72 MachineBasicBlock *FBB, ArrayRef<MachineOperand> Cond,
77 reverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const override;
81 SmallVectorImpl<MachineOperand> &Cond,
175 SmallVectorImpl<MachineOperand> &Cond) const;
178 const DebugLoc &DL, ArrayRef<MachineOperand> Cond) const;
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/NVPTX/
HDNVPTXInstrInfo.cpp98 SmallVectorImpl<MachineOperand> &Cond, in analyzeBranch() argument
116 Cond.push_back(LastInst.getOperand(0)); in analyzeBranch()
134 Cond.push_back(SecondLastInst.getOperand(0)); in analyzeBranch()
183 ArrayRef<MachineOperand> Cond, in insertBranch() argument
190 assert((Cond.size() == 1 || Cond.size() == 0) && in insertBranch()
195 if (Cond.empty()) // Unconditional branch in insertBranch()
198 BuildMI(&MBB, DL, get(NVPTX::CBranch)).addReg(Cond[0].getReg()) in insertBranch()
204 BuildMI(&MBB, DL, get(NVPTX::CBranch)).addReg(Cond[0].getReg()).addMBB(TBB); in insertBranch()
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AVR/
HDAVRInstrInfo.cpp266 SmallVectorImpl<MachineOperand> &Cond, in analyzeBranch() argument
306 Cond.clear(); in analyzeBranch()
330 if (Cond.empty()) { in analyzeBranch()
371 Cond.push_back(MachineOperand::CreateImm(BranchCode)); in analyzeBranch()
377 assert(Cond.size() == 1); in analyzeBranch()
386 AVRCC::CondCodes OldBranchCode = (AVRCC::CondCodes)Cond[0].getImm(); in analyzeBranch()
401 ArrayRef<MachineOperand> Cond, in insertBranch() argument
408 assert((Cond.size() == 1 || Cond.size() == 0) && in insertBranch()
411 if (Cond.empty()) { in insertBranch()
421 AVRCC::CondCodes CC = (AVRCC::CondCodes)Cond[0].getImm(); in insertBranch()
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/RISCV/
HDRISCVInstrInfo.cpp207 SmallVectorImpl<MachineOperand> &Cond) { in parseCondBranch() argument
212 Cond.push_back(MachineOperand::CreateImm(LastInst.getOpcode())); in parseCondBranch()
213 Cond.push_back(LastInst.getOperand(0)); in parseCondBranch()
214 Cond.push_back(LastInst.getOperand(1)); in parseCondBranch()
239 SmallVectorImpl<MachineOperand> &Cond, in analyzeBranch() argument
242 Cond.clear(); in analyzeBranch()
288 parseCondBranch(*I, TBB, Cond); in analyzeBranch()
295 parseCondBranch(*std::prev(I), TBB, Cond); in analyzeBranch()
340 ArrayRef<MachineOperand> Cond, const DebugLoc &DL, int *BytesAdded) const { in insertBranch() argument
346 assert((Cond.size() == 3 || Cond.size() == 0) && in insertBranch()
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/X86/
HDX86FlagsCopyLowering.cpp102 DebugLoc TestLoc, X86::CondCode Cond);
106 X86::CondCode Cond, CondRegArray &CondRegs);
754 X86::CondCode Cond = X86::getCondFromSETCC(MI); in collectCondsInRegs() local
755 if (Cond != X86::COND_INVALID && !MI.mayStore() && in collectCondsInRegs()
760 CondRegs[Cond] = MI.getOperand(0).getReg(); in collectCondsInRegs()
773 DebugLoc TestLoc, X86::CondCode Cond) { in promoteCondToReg() argument
776 TII->get(X86::SETCCr), Reg).addImm(Cond); in promoteCondToReg()
785 DebugLoc TestLoc, X86::CondCode Cond, CondRegArray &CondRegs) { in getCondOrInverseInReg() argument
786 unsigned &CondReg = CondRegs[Cond]; in getCondOrInverseInReg()
787 unsigned &InvCondReg = CondRegs[X86::GetOppositeBranchCondition(Cond)]; in getCondOrInverseInReg()
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HDX86InstrCMovSetCC.td87 multiclass CMOV_SETCC_Aliases<string Cond, int CC> {
88 def : InstAlias<"cmov"#Cond#"{w}\t{$src, $dst|$dst, $src}",
90 def : InstAlias<"cmov"#Cond#"{w}\t{$src, $dst|$dst, $src}",
92 def : InstAlias<"cmov"#Cond#"{l}\t{$src, $dst|$dst, $src}",
94 def : InstAlias<"cmov"#Cond#"{l}\t{$src, $dst|$dst, $src}",
96 def : InstAlias<"cmov"#Cond#"{q}\t{$src, $dst|$dst, $src}",
98 def : InstAlias<"cmov"#Cond#"{q}\t{$src, $dst|$dst, $src}",
101 def : InstAlias<"set"#Cond#"\t$dst", (SETCCr GR8:$dst, CC), 0>;
102 def : InstAlias<"set"#Cond#"\t$dst", (SETCCm i8mem:$dst, CC), 0>;
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Analysis/
HDGuardUtils.cpp66 auto *Cond = BI->getCondition(); in parseWidenableBranch() local
67 if (!Cond->hasOneUse()) in parseWidenableBranch()
73 if (match(Cond, m_Intrinsic<Intrinsic::experimental_widenable_condition>())) { in parseWidenableBranch()
85 if (!match(Cond, m_And(m_Value(A), m_Value(B)))) in parseWidenableBranch()
87 auto *And = dyn_cast<Instruction>(Cond); in parseWidenableBranch()
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/
HDSIAnnotateControlFlow.cpp99 handleLoopCondition(Value *Cond, PHINode *Broken, llvm::Loop *L,
231 Value *Cond, PHINode *Broken, llvm::Loop *L, BranchInst *Term) { in handleLoopCondition() argument
232 if (Instruction *Inst = dyn_cast<Instruction>(Cond)) { in handleLoopCondition()
241 Value *Args[] = { Cond, Broken }; in handleLoopCondition()
246 if (isa<Constant>(Cond)) { in handleLoopCondition()
247 Instruction *Insert = Cond == BoolTrue ? in handleLoopCondition()
250 Value *Args[] = { Cond, Broken }; in handleLoopCondition()
270 Value *Cond = Term->getCondition(); in handleLoop() local
272 Value *Arg = handleLoopCondition(Cond, Broken, L, Term); in handleLoop()
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Transforms/Scalar/
HDLoopUnswitch.cpp250 void UnswitchTrivialCondition(Loop *L, Value *Cond, Constant *Val,
422 static Value *FindLIVLoopCondition(Value *Cond, Loop *L, bool &Changed, in FindLIVLoopCondition() argument
426 auto CacheIt = Cache.find(Cond); in FindLIVLoopCondition()
434 if (Cond->getType()->isVectorTy()) in FindLIVLoopCondition()
438 if (isa<Constant>(Cond)) return nullptr; in FindLIVLoopCondition()
443 if (L->makeLoopInvariant(Cond, Changed, nullptr, MSSAU)) { in FindLIVLoopCondition()
444 Cache[Cond] = Cond; in FindLIVLoopCondition()
445 return Cond; in FindLIVLoopCondition()
449 if (BinaryOperator *BO = dyn_cast<BinaryOperator>(Cond)) in FindLIVLoopCondition()
484 Cache[Cond] = LHS; in FindLIVLoopCondition()
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/freebsd-11-stable/contrib/llvm-project/clang/include/clang/StaticAnalyzer/Core/PathSensitive/
HDConstraintManager.h86 DefinedSVal Cond,
93 ProgramStatePair assumeDual(ProgramStateRef State, DefinedSVal Cond) { in assumeDual() argument
94 ProgramStateRef StTrue = assume(State, Cond, true); in assumeDual()
104 assert(assume(State, Cond, false) && "System is over constrained."); in assumeDual()
109 ProgramStateRef StFalse = assume(State, Cond, false); in assumeDual()
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/
HDHexagonInstrInfo.cpp388 SmallVectorImpl<MachineOperand> &Cond, in analyzeBranch() argument
392 Cond.clear(); in analyzeBranch()
483 Cond.push_back(MachineOperand::CreateImm(LastInst->getOpcode())); in analyzeBranch()
484 Cond.push_back(LastInst->getOperand(0)); in analyzeBranch()
489 Cond.push_back(MachineOperand::CreateImm(LastInst->getOpcode())); in analyzeBranch()
490 Cond.push_back(LastInst->getOperand(0)); in analyzeBranch()
496 Cond.push_back(MachineOperand::CreateImm(LastInst->getOpcode())); in analyzeBranch()
497 Cond.push_back(LastInst->getOperand(0)); in analyzeBranch()
498 Cond.push_back(LastInst->getOperand(1)); in analyzeBranch()
513 Cond.push_back(MachineOperand::CreateImm(SecondLastInst->getOpcode())); in analyzeBranch()
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Sparc/
HDSparcInstrInfo.cpp154 SmallVectorImpl<MachineOperand> &Cond) { in parseCondBranch() argument
155 Cond.push_back(MachineOperand::CreateImm(LastInst->getOperand(1).getImm())); in parseCondBranch()
162 SmallVectorImpl<MachineOperand> &Cond, in analyzeBranch() argument
183 parseCondBranch(LastInst, TBB, Cond); in analyzeBranch()
217 parseCondBranch(SecondLastInst, TBB, Cond); in analyzeBranch()
245 ArrayRef<MachineOperand> Cond, in insertBranch() argument
249 assert((Cond.size() == 1 || Cond.size() == 0) && in insertBranch()
253 if (Cond.empty()) { in insertBranch()
260 unsigned CC = Cond[0].getImm(); in insertBranch()
298 SmallVectorImpl<MachineOperand> &Cond) const { in reverseBranchCondition()
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/freebsd-11-stable/contrib/llvm-project/llvm/utils/TableGen/
HDSubtargetFeatureInfo.cpp132 StringRef Cond = Comma.first; in emitComputeAssemblerAvailableFeatures() local
133 if (Cond[0] == '!') { in emitComputeAssemblerAvailableFeatures()
135 Cond = Cond.substr(1); in emitComputeAssemblerAvailableFeatures()
141 OS << "FB[" << TargetName << "::" << Cond << "])"; in emitComputeAssemblerAvailableFeatures()
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Transforms/Instrumentation/
HDPoisonChecking.cpp238 static void CreateAssert(IRBuilder<> &B, Value *Cond) { in CreateAssert() argument
239 assert(Cond->getType()->isIntegerTy(1)); in CreateAssert()
240 if (auto *CI = dyn_cast<ConstantInt>(Cond)) in CreateAssert()
249 B.CreateCall(TrapFunc, Cond); in CreateAssert()
252 static void CreateAssertNot(IRBuilder<> &B, Value *Cond) { in CreateAssertNot() argument
253 assert(Cond->getType()->isIntegerTy(1)); in CreateAssertNot()
254 CreateAssert(B, B.CreateNot(Cond)); in CreateAssertNot()
/freebsd-11-stable/contrib/llvm-project/llvm/lib/CodeGen/
HDMachineBasicBlock.cpp539 SmallVector<MachineOperand, 4> Cond; in updateTerminator() local
541 bool B = TII->analyzeBranch(*this, TBB, FBB, Cond); in updateTerminator()
544 if (Cond.empty()) { in updateTerminator()
569 TII->insertBranch(*this, TBB, nullptr, Cond, DL); in updateTerminator()
579 if (TII->reverseBranchCondition(Cond)) in updateTerminator()
582 TII->insertBranch(*this, FBB, nullptr, Cond, DL); in updateTerminator()
585 TII->insertBranch(*this, TBB, nullptr, Cond, DL); in updateTerminator()
612 TII->insertBranch(*this, TBB, nullptr, Cond, DL); in updateTerminator()
620 Cond.clear(); in updateTerminator()
621 TII->insertBranch(*this, TBB, nullptr, Cond, DL); in updateTerminator()
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/freebsd-11-stable/contrib/llvm-project/llvm/lib/Support/
HDParallel.cpp66 Cond.notify_all(); in stop()
89 Cond.notify_one(); in add()
96 Cond.wait(Lock, [&] { return Stop || !WorkStack.empty(); }); in work()
109 std::condition_variable Cond; member in llvm::parallel::detail::__anon6b1407400111::ThreadPoolExecutor
/freebsd-11-stable/contrib/llvm-project/clang/lib/Sema/
HDScopeInfo.cpp165 if (const ConditionalOperator *Cond = dyn_cast<ConditionalOperator>(E)) { in markSafeWeakUse() local
166 markSafeWeakUse(Cond->getTrueExpr()); in markSafeWeakUse()
167 markSafeWeakUse(Cond->getFalseExpr()); in markSafeWeakUse()
171 if (const BinaryConditionalOperator *Cond = in markSafeWeakUse() local
173 markSafeWeakUse(Cond->getCommon()); in markSafeWeakUse()
174 markSafeWeakUse(Cond->getFalseExpr()); in markSafeWeakUse()

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