Lines Matching refs:Cond
266 SmallVectorImpl<MachineOperand> &Cond, in analyzeBranch() argument
306 Cond.clear(); in analyzeBranch()
330 if (Cond.empty()) { in analyzeBranch()
371 Cond.push_back(MachineOperand::CreateImm(BranchCode)); in analyzeBranch()
377 assert(Cond.size() == 1); in analyzeBranch()
386 AVRCC::CondCodes OldBranchCode = (AVRCC::CondCodes)Cond[0].getImm(); in analyzeBranch()
401 ArrayRef<MachineOperand> Cond, in insertBranch() argument
408 assert((Cond.size() == 1 || Cond.size() == 0) && in insertBranch()
411 if (Cond.empty()) { in insertBranch()
421 AVRCC::CondCodes CC = (AVRCC::CondCodes)Cond[0].getImm(); in insertBranch()
467 SmallVectorImpl<MachineOperand> &Cond) const { in reverseBranchCondition()
468 assert(Cond.size() == 1 && "Invalid AVR branch condition!"); in reverseBranchCondition()
470 AVRCC::CondCodes CC = static_cast<AVRCC::CondCodes>(Cond[0].getImm()); in reverseBranchCondition()
471 Cond[0].setImm(getOppositeCondition(CC)); in reverseBranchCondition()