| /NextBSD/sys/dev/ixgbe/ |
| HD | ixgbe_dcb_82599.c | 121 u32 reg = 0; in ixgbe_dcb_config_rx_arbiter_82599() local
130 reg = IXGBE_RTRPCS_RRM | IXGBE_RTRPCS_RAC | IXGBE_RTRPCS_ARBDIS; in ixgbe_dcb_config_rx_arbiter_82599()
131 IXGBE_WRITE_REG(hw, IXGBE_RTRPCS, reg); in ixgbe_dcb_config_rx_arbiter_82599()
139 reg = 0; in ixgbe_dcb_config_rx_arbiter_82599()
141 reg |= (map[i] << (i * IXGBE_RTRUP2TC_UP_SHIFT)); in ixgbe_dcb_config_rx_arbiter_82599()
143 IXGBE_WRITE_REG(hw, IXGBE_RTRUP2TC, reg); in ixgbe_dcb_config_rx_arbiter_82599()
149 reg = credit_refill | (credit_max << IXGBE_RTRPT4C_MCL_SHIFT); in ixgbe_dcb_config_rx_arbiter_82599()
151 reg |= (u32)(bwg_id[i]) << IXGBE_RTRPT4C_BWG_SHIFT; in ixgbe_dcb_config_rx_arbiter_82599()
154 reg |= IXGBE_RTRPT4C_LSP; in ixgbe_dcb_config_rx_arbiter_82599()
156 IXGBE_WRITE_REG(hw, IXGBE_RTRPT4C(i), reg); in ixgbe_dcb_config_rx_arbiter_82599()
[all …]
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| HD | ixgbe_dcb_82598.c | 121 u32 reg = 0; in ixgbe_dcb_config_rx_arbiter_82598() local
126 reg = IXGBE_READ_REG(hw, IXGBE_RUPPBMR) | IXGBE_RUPPBMR_MQA; in ixgbe_dcb_config_rx_arbiter_82598()
127 IXGBE_WRITE_REG(hw, IXGBE_RUPPBMR, reg); in ixgbe_dcb_config_rx_arbiter_82598()
129 reg = IXGBE_READ_REG(hw, IXGBE_RMCS); in ixgbe_dcb_config_rx_arbiter_82598()
131 reg &= ~IXGBE_RMCS_ARBDIS; in ixgbe_dcb_config_rx_arbiter_82598()
133 reg |= IXGBE_RMCS_RRM; in ixgbe_dcb_config_rx_arbiter_82598()
135 reg |= IXGBE_RMCS_DFP; in ixgbe_dcb_config_rx_arbiter_82598()
137 IXGBE_WRITE_REG(hw, IXGBE_RMCS, reg); in ixgbe_dcb_config_rx_arbiter_82598()
144 reg = credit_refill | (credit_max << IXGBE_RT2CR_MCL_SHIFT); in ixgbe_dcb_config_rx_arbiter_82598()
147 reg |= IXGBE_RT2CR_LSP; in ixgbe_dcb_config_rx_arbiter_82598()
[all …]
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| /NextBSD/sys/arm/freescale/imx/ |
| HD | imx6_ccm.c | 91 uint32_t reg; in ccm_init_gates() local
94 reg = CCGR0_AIPS_TZ1 | CCGR0_AIPS_TZ2 | CCGR0_ABPHDMA; in ccm_init_gates()
95 WR4(sc, CCM_CCGR0, reg); in ccm_init_gates()
98 reg = CCGR1_ENET | CCGR1_GPT; in ccm_init_gates()
99 WR4(sc, CCM_CCGR1, reg); in ccm_init_gates()
102 reg = CCGR2_I2C1 | CCGR2_I2C2 | CCGR2_I2C3 | CCGR2_IIM | in ccm_init_gates()
106 WR4(sc, CCM_CCGR2, reg); in ccm_init_gates()
109 reg = CCGR3_OCRAM | CCGR3_MMDC_CORE_IPG | in ccm_init_gates()
111 WR4(sc, CCM_CCGR3, reg); in ccm_init_gates()
114 reg = CCGR4_PL301_MX6QFAST1_S133 | in ccm_init_gates()
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| /NextBSD/sys/contrib/octeon-sdk/ |
| HD | cvmx-fau.h | 155 static inline uint64_t __cvmx_fau_store_address(uint64_t noadd, uint64_t reg) in __cvmx_fau_store_address() argument
159 cvmx_build_bits(CVMX_FAU_BITS_REGISTER, reg)); in __cvmx_fau_store_address()
179 static inline uint64_t __cvmx_fau_atomic_address(uint64_t tagwait, uint64_t reg, int64_t value) in __cvmx_fau_atomic_address() argument
184 cvmx_build_bits(CVMX_FAU_BITS_REGISTER, reg)); in __cvmx_fau_atomic_address()
196 static inline int64_t cvmx_fau_fetch_and_add64(cvmx_fau_reg_64_t reg, int64_t value) in cvmx_fau_fetch_and_add64() argument
198 return cvmx_read64_int64(__cvmx_fau_atomic_address(0, reg, value)); in cvmx_fau_fetch_and_add64()
210 static inline int32_t cvmx_fau_fetch_and_add32(cvmx_fau_reg_32_t reg, int32_t value) in cvmx_fau_fetch_and_add32() argument
212 return cvmx_read64_int32(__cvmx_fau_atomic_address(0, reg, value)); in cvmx_fau_fetch_and_add32()
223 static inline int16_t cvmx_fau_fetch_and_add16(cvmx_fau_reg_16_t reg, int16_t value) in cvmx_fau_fetch_and_add16() argument
225 return cvmx_read64_int16(__cvmx_fau_atomic_address(0, reg, value)); in cvmx_fau_fetch_and_add16()
[all …]
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| HD | cvmx-cn3010-evb-hs5.c | 108 uint8_t reg[8]; in cvmx_rtc_ds1337_read() local
113 memset(®, 0, sizeof(reg)); in cvmx_rtc_ds1337_read()
119 reg[0] = cvmx_twsi_read8(CVMX_RTC_DS1337_ADDR, 0x0); in cvmx_rtc_ds1337_read()
121 reg[i] = cvmx_twsi_read8_cur_addr(CVMX_RTC_DS1337_ADDR); in cvmx_rtc_ds1337_read()
124 if ((sec & 0xf) == (reg[0] & 0xf)) in cvmx_rtc_ds1337_read()
128 tms.tm_sec = bcd2bin(reg[0] & 0x7f); in cvmx_rtc_ds1337_read()
129 tms.tm_min = bcd2bin(reg[1] & 0x7f); in cvmx_rtc_ds1337_read()
130 tms.tm_hour = bcd2bin(reg[2] & 0x3f); in cvmx_rtc_ds1337_read()
131 if ((reg[2] & 0x40) && (reg[2] & 0x20)) /* AM/PM format and is PM time */ in cvmx_rtc_ds1337_read()
135 tms.tm_wday = (reg[3] & 0x7) - 1; /* Day of week field is 0..6 */ in cvmx_rtc_ds1337_read()
[all …]
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| /NextBSD/sys/contrib/alpine-hal/ |
| HD | al_hal_reg_utils.h | 65 #define AL_REG_FIELD_GET(reg, mask, shift) (((reg) & (mask)) >> (shift)) argument
68 #define AL_REG_FIELD_SET(reg, mask, shift, val) \ argument
69 (reg) = \
70 (((reg) & (~(mask))) | \
74 #define AL_REG_FIELD_SET_64(reg, mask, shift, val) \ argument
75 ((reg) = \
76 (((reg) & (~(mask))) | \
80 #define AL_REG_BIT_GET(reg, shift) \ argument
81 AL_REG_FIELD_GET(reg, AL_BIT(shift), shift)
87 #define AL_REG_BIT_VAL_SET(reg, shift, val) \ argument
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| /NextBSD/sys/arm/xscale/ixp425/ |
| HD | ixdp425_pci.c | 62 uint32_t reg; in ixp425_md_attach() local
66 reg = GPIO_CONF_READ_4(sc, IXP425_GPIO_GPOUTR); in ixp425_md_attach()
67 reg &= ~(1U << GPIO_PCI_RESET); in ixp425_md_attach()
68 GPIO_CONF_WRITE_4(sc, IXP425_GPIO_GPOUTR, reg); in ixp425_md_attach()
71 reg = GPIO_CONF_READ_4(sc, IXP425_GPIO_GPCLKR); in ixp425_md_attach()
72 reg &= ~GPCLKR_MUX14; in ixp425_md_attach()
73 GPIO_CONF_WRITE_4(sc, IXP425_GPIO_GPCLKR, reg); in ixp425_md_attach()
80 reg = GPIO_CONF_READ_4(sc, IXP425_GPIO_GPOER); in ixp425_md_attach()
81 reg &= ~(1U << GPIO_PCI_CLK); in ixp425_md_attach()
82 reg &= ~(1U << GPIO_PCI_RESET); in ixp425_md_attach()
[all …]
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| /NextBSD/contrib/gcc/config/i386/ |
| HD | linux-unwind.h | 70 fs->regs.reg[0].how = REG_SAVED_OFFSET; in x86_64_fallback_frame_state()
71 fs->regs.reg[0].loc.offset = (long)&sc->rax - new_cfa; in x86_64_fallback_frame_state()
72 fs->regs.reg[1].how = REG_SAVED_OFFSET; in x86_64_fallback_frame_state()
73 fs->regs.reg[1].loc.offset = (long)&sc->rdx - new_cfa; in x86_64_fallback_frame_state()
74 fs->regs.reg[2].how = REG_SAVED_OFFSET; in x86_64_fallback_frame_state()
75 fs->regs.reg[2].loc.offset = (long)&sc->rcx - new_cfa; in x86_64_fallback_frame_state()
76 fs->regs.reg[3].how = REG_SAVED_OFFSET; in x86_64_fallback_frame_state()
77 fs->regs.reg[3].loc.offset = (long)&sc->rbx - new_cfa; in x86_64_fallback_frame_state()
78 fs->regs.reg[4].how = REG_SAVED_OFFSET; in x86_64_fallback_frame_state()
79 fs->regs.reg[4].loc.offset = (long)&sc->rsi - new_cfa; in x86_64_fallback_frame_state()
[all …]
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| /NextBSD/usr.sbin/ndiscvt/ |
| HD | inf.c | 71 const struct reg *, int);
564 struct reg *reg; in dump_addreg() local
570 TAILQ_FOREACH(reg, &rh, link) { in dump_addreg()
577 if (reg->section == sec) { in dump_addreg()
578 if (reg->subkey == NULL) { in dump_addreg()
579 fprintf(ofp, "\n\t{ \"%s\",", reg->key); in dump_addreg()
580 fprintf(ofp,"\n\t\"%s \",", reg->key); in dump_addreg()
582 reg->value == NULL ? "" : in dump_addreg()
583 stringcvt(reg->value), devidx); in dump_addreg()
584 } else if (strncasecmp(reg->subkey, in dump_addreg()
[all …]
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| /NextBSD/crypto/openssl/crypto/ |
| HD | sparc_arch.h | 40 # define SPARC_PIC_THUNK(reg) \ argument
44 add %o7, reg, reg;
46 # define SPARC_PIC_THUNK_CALL(reg) \ argument
47 sethi %hi(_GLOBAL_OFFSET_TABLE_-4), reg; \
49 or reg, %lo(_GLOBAL_OFFSET_TABLE_+4), reg;
52 # define SPARC_SETUP_GOT_REG(reg) SPARC_PIC_THUNK_CALL(reg) argument
54 # define SPARC_SETUP_GOT_REG(reg) \ argument
55 sethi %hi(_GLOBAL_OFFSET_TABLE_-4), reg; \
57 or reg,%lo(_GLOBAL_OFFSET_TABLE_+4), reg; \
58 add %o7, reg, reg
[all …]
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| /NextBSD/sys/gnu/dts/arm/ |
| HD | k2hk-clocks.dtsi | 17 reg = <0x02620370 4>;
18 reg-names = "control";
25 reg = <0x02620350 4>, <0x02310110 4>;
26 reg-names = "control", "multiplier";
35 reg = <0x02620358 4>;
36 reg-names = "control";
44 reg = <0x02620360 4>;
45 reg-names = "control";
53 reg = <0x02620368 4>;
54 reg-names = "control";
[all …]
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| HD | k2l-clocks.dtsi | 17 reg = <0x02620370 4>;
18 reg-names = "control";
25 reg = <0x02620350 4>, <0x02310110 4>;
26 reg-names = "control", "multiplier";
35 reg = <0x02620358 4>;
36 reg-names = "control";
44 reg = <0x02620360 4>;
45 reg-names = "control";
53 reg-names = "control", "domain";
54 reg = <0x02350004 0xb00>, <0x02350000 0x400>;
[all …]
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| HD | hip04.dtsi | 93 reg = <0>;
98 reg = <1>;
103 reg = <2>;
108 reg = <3>;
113 reg = <0x100>;
118 reg = <0x101>;
123 reg = <0x102>;
128 reg = <0x103>;
133 reg = <0x200>;
138 reg = <0x201>;
[all …]
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| /NextBSD/contrib/gdb/gdb/ |
| HD | user-regs.c | 62 user_reg_read_ftype *read, struct user_reg *reg) in append_user_reg() argument
67 gdb_assert (reg != NULL); in append_user_reg()
68 reg->name = name; in append_user_reg()
69 reg->read = read; in append_user_reg()
70 reg->next = NULL; in append_user_reg()
71 (*regs->last) = reg; in append_user_reg()
94 struct user_reg *reg; in user_regs_init() local
97 for (reg = builtin_user_regs.first; reg != NULL; reg = reg->next) in user_regs_init()
98 append_user_reg (regs, reg->name, reg->read, in user_regs_init()
147 struct user_reg *reg; in user_reg_map_name_to_regnum() local
[all …]
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| /NextBSD/sys/arm/ti/ |
| HD | ti_edma3.c | 125 #define ti_edma3_cc_rd_4(reg) bus_read_4(ti_edma3_sc->mem_res[0], reg) argument
126 #define ti_edma3_cc_wr_4(reg, val) bus_write_4(ti_edma3_sc->mem_res[0], reg, val) argument
159 uint32_t reg; in ti_edma3_attach() local
186 reg = ti_edma3_cc_rd_4(TI_EDMA3CC_PID); in ti_edma3_attach()
188 device_printf(dev, "EDMA revision %08x\n", reg); in ti_edma3_attach()
243 uint32_t reg; in ti_edma3_init() local
269 reg = ti_edma3_cc_rd_4(TI_EDMA3CC_DMAQNUM(i>>3)); in ti_edma3_init()
270 reg &= TI_EDMA3CC_DMAQNUM_CLR(i); in ti_edma3_init()
271 reg |= TI_EDMA3CC_DMAQNUM_SET(i, eqn); in ti_edma3_init()
272 ti_edma3_cc_wr_4(TI_EDMA3CC_DMAQNUM(i>>3), reg); in ti_edma3_init()
[all …]
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| /NextBSD/sys/arm64/arm64/ |
| HD | debug_monitor.c | 86 #define DBG_WB_READ(reg, num, val) do { \ argument
87 __asm __volatile("mrs %0, dbg" reg #num "_el1" : "=r" (val)); \
90 #define DBG_WB_WRITE(reg, num, val) do { \ argument
91 __asm __volatile("msr dbg" reg #num "_el1, %0" :: "r" (val)); \
94 #define READ_WB_REG_CASE(reg, num, offset, val) \ argument
96 DBG_WB_READ(reg, num, val); \
99 #define WRITE_WB_REG_CASE(reg, num, offset, val) \ argument
101 DBG_WB_WRITE(reg, num, val); \
104 #define SWITCH_CASES_READ_WB_REG(reg, offset, val) \ argument
105 READ_WB_REG_CASE(reg, 0, offset, val); \
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| /NextBSD/sys/mips/cavium/ |
| HD | octeon_ds1337.c | 99 uint8_t reg[8]; in cvmx_rtc_ds1337_read() local
105 memset(®, 0, sizeof(reg)); in cvmx_rtc_ds1337_read()
111 reg[0] = cvmx_twsi_read8(CVMX_RTC_DS1337_ADDR, 0x0); in cvmx_rtc_ds1337_read()
113 reg[i] = cvmx_twsi_read8_cur_addr(CVMX_RTC_DS1337_ADDR); in cvmx_rtc_ds1337_read()
116 if ((sec & 0xf) == (reg[0] & 0xf)) in cvmx_rtc_ds1337_read()
120 ct.sec = bcd2bin(reg[0] & 0x7f); in cvmx_rtc_ds1337_read()
121 ct.min = bcd2bin(reg[1] & 0x7f); in cvmx_rtc_ds1337_read()
122 ct.hour = bcd2bin(reg[2] & 0x3f); in cvmx_rtc_ds1337_read()
123 if ((reg[2] & 0x40) && (reg[2] & 0x20)) /* AM/PM format and is PM time */ in cvmx_rtc_ds1337_read()
127 ct.dow = (reg[3] & 0x7) - 1; /* Day of week field is 0..6 */ in cvmx_rtc_ds1337_read()
[all …]
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| /NextBSD/sys/dev/mii/ |
| HD | e1000phy.c | 187 uint16_t reg, page; in e1000phy_reset() local
189 reg = PHY_READ(sc, E1000_SCR); in e1000phy_reset()
191 reg &= ~E1000_SCR_AUTO_X_MODE; in e1000phy_reset()
192 PHY_WRITE(sc, E1000_SCR, reg); in e1000phy_reset()
197 reg = PHY_READ(sc, E1000_SCR); in e1000phy_reset()
198 reg &= ~E1000_SCR_MODE_MASK; in e1000phy_reset()
199 reg |= E1000_SCR_MODE_1000BX; in e1000phy_reset()
200 PHY_WRITE(sc, E1000_SCR, reg); in e1000phy_reset()
204 reg = PHY_READ(sc, E1000_SCR); in e1000phy_reset()
205 reg |= E1000_SCR_FIB_SIGDET_POLARITY; in e1000phy_reset()
[all …]
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| /NextBSD/gnu/usr.bin/gdb/gdbserver/ |
| HD | fbsd-amd64-low.c | 37 offsetof(struct reg, r_rax),
38 offsetof(struct reg, r_rbx),
39 offsetof(struct reg, r_rcx),
40 offsetof(struct reg, r_rdx),
41 offsetof(struct reg, r_rsi),
42 offsetof(struct reg, r_rdi),
43 offsetof(struct reg, r_rbp),
44 offsetof(struct reg, r_rsp),
45 offsetof(struct reg, r_r8),
46 offsetof(struct reg, r_r9),
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| /NextBSD/sys/arm/mv/armadaxp/ |
| HD | armadaxp_mp.c | 68 read_cpu_clkdiv(uint32_t reg) in read_cpu_clkdiv() argument
71 return (bus_space_read_4(fdtbus_bs_tag, MV_AXP_CPU_DIVCLK_BASE, reg)); in read_cpu_clkdiv()
75 write_cpu_clkdiv(uint32_t reg, uint32_t val) in write_cpu_clkdiv() argument
78 bus_space_write_4(fdtbus_bs_tag, MV_AXP_CPU_DIVCLK_BASE, reg, val); in write_cpu_clkdiv()
108 uint32_t reg, *src, *dst, cpu_num, div_val, cputype; in platform_mp_start_ap() local
135 reg = read_cpu_clkdiv(CPU_DIVCLK_CTRL2_RATIO_FULL1); in platform_mp_start_ap()
136 reg &= CPU_DIVCLK_MASK(cpu_num); in platform_mp_start_ap()
137 reg |= div_val << (cpu_num * 8); in platform_mp_start_ap()
138 write_cpu_clkdiv(CPU_DIVCLK_CTRL2_RATIO_FULL1, reg); in platform_mp_start_ap()
145 reg = read_cpu_clkdiv(CPU_DIVCLK_CTRL2_RATIO_FULL0); in platform_mp_start_ap()
[all …]
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| /NextBSD/contrib/wpa/src/wps/ |
| HD | wps_registrar.c | 194 static int wps_set_ie(struct wps_registrar *reg);
198 static void wps_registrar_remove_pin(struct wps_registrar *reg,
202 static void wps_registrar_add_authorized_mac(struct wps_registrar *reg, in wps_registrar_add_authorized_mac() argument
209 if (os_memcmp(reg->authorized_macs[i], addr, ETH_ALEN) == 0) { in wps_registrar_add_authorized_mac()
215 os_memcpy(reg->authorized_macs[i], reg->authorized_macs[i - 1], in wps_registrar_add_authorized_mac()
217 os_memcpy(reg->authorized_macs[0], addr, ETH_ALEN); in wps_registrar_add_authorized_mac()
219 (u8 *) reg->authorized_macs, sizeof(reg->authorized_macs)); in wps_registrar_add_authorized_mac()
223 static void wps_registrar_remove_authorized_mac(struct wps_registrar *reg, in wps_registrar_remove_authorized_mac() argument
230 if (os_memcmp(reg->authorized_macs, addr, ETH_ALEN) == 0) in wps_registrar_remove_authorized_mac()
239 os_memcpy(reg->authorized_macs[i], reg->authorized_macs[i + 1], in wps_registrar_remove_authorized_mac()
[all …]
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| /NextBSD/sys/mips/rmi/ |
| HD | rmi_mips_exts.h | 46 read_xlr_ctrl_register(int block, int reg) in read_xlr_ctrl_register() argument
57 : "=r" (res) : "r"((block << 8) | reg) in read_xlr_ctrl_register()
64 write_xlr_ctrl_register(int block, int reg, uint64_t value) in write_xlr_ctrl_register() argument
74 : "r" (value), "r" ((block << 8) | reg) in write_xlr_ctrl_register()
82 read_xlr_ctrl_register(int block, int reg) in read_xlr_ctrl_register() argument
96 : "r" ((block << 8) | reg) in read_xlr_ctrl_register()
103 write_xlr_ctrl_register(int block, int reg, uint64_t value) in write_xlr_ctrl_register() argument
121 : "r" (high), "r" (low), "r"((block << 8) | reg) in write_xlr_ctrl_register()
129 #define read_c0_register32(reg, sel) \ argument
137 : "=r" (__rv) : "i" (reg), "i" (sel) ); \
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| /NextBSD/contrib/llvm/tools/lldb/source/Plugins/Process/FreeBSD/ |
| HD | RegisterContextPOSIXProcessMonitor_x86.cpp | 110 RegisterContextPOSIXProcessMonitor_x86_64::ReadRegister(const unsigned reg, in ReadRegister() argument
116 if (reg >= m_reg_info.first_dr) in ReadRegister()
118 GetRegisterOffset(reg), in ReadRegister()
119 GetRegisterName(reg), in ReadRegister()
120 GetRegisterSize(reg), in ReadRegister()
124 GetRegisterOffset(reg), in ReadRegister()
125 GetRegisterName(reg), in ReadRegister()
126 GetRegisterSize(reg), in ReadRegister()
131 RegisterContextPOSIXProcessMonitor_x86_64::WriteRegister(const unsigned reg, in WriteRegister() argument
134 unsigned reg_to_write = reg; in WriteRegister()
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| /NextBSD/contrib/gcc/ |
| HD | reg-stack.c | 205 unsigned char reg[REG_STACK_SIZE];/* register - stack mapping */ member
380 temp_stack.reg[top] = FIRST_STACK_REG + temp_stack.top - top; in straighten_stack()
395 if (regstack->reg [top] != regno) in pop_stack()
399 if (regstack->reg [i] == regno) in pop_stack()
403 regstack->reg [j] = regstack->reg [j + 1]; in pop_stack()
509 rtx reg = XEXP (clobber, 0); in check_asm_stack_operands() local
511 if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg))) in check_asm_stack_operands()
512 reg = SUBREG_REG (reg); in check_asm_stack_operands()
514 if (STACK_REG_P (reg)) in check_asm_stack_operands()
516 clobber_reg[n_clobbers] = reg; in check_asm_stack_operands()
[all …]
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| /NextBSD/sys/arm/mv/ |
| HD | mv_machdep.c | 82 pcell_t reg[4]; in platform_mpp_init() local
121 len = OF_getprop(node, "reg", reg, sizeof(reg)); in platform_mpp_init()
129 rv = fdt_data_to_res(reg, par_addr_cells, par_size_cells, in platform_mpp_init()
435 u_int reg; in DB_SHOW_COMMAND() local
437 __asm __volatile("mrc p15, 0, %0, c0, c0, 0" : "=r" (reg)); in DB_SHOW_COMMAND()
438 db_printf("Cpu ID: 0x%08x\n", reg); in DB_SHOW_COMMAND()
439 __asm __volatile("mrc p15, 0, %0, c0, c0, 1" : "=r" (reg)); in DB_SHOW_COMMAND()
440 db_printf("Current Cache Lvl ID: 0x%08x\n",reg); in DB_SHOW_COMMAND()
442 __asm __volatile("mrc p15, 0, %0, c1, c0, 0" : "=r" (reg)); in DB_SHOW_COMMAND()
443 db_printf("Ctrl: 0x%08x\n",reg); in DB_SHOW_COMMAND()
[all …]
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