121 	u32 reg = 0;  in ixgbe_dcb_config_rx_arbiter_82599()  local
130 	reg = IXGBE_RTRPCS_RRM | IXGBE_RTRPCS_RAC | IXGBE_RTRPCS_ARBDIS;  in ixgbe_dcb_config_rx_arbiter_82599()
131 	IXGBE_WRITE_REG(hw, IXGBE_RTRPCS, reg);  in ixgbe_dcb_config_rx_arbiter_82599()
139 	reg = 0;  in ixgbe_dcb_config_rx_arbiter_82599()
141 		reg |= (map[i] << (i * IXGBE_RTRUP2TC_UP_SHIFT));  in ixgbe_dcb_config_rx_arbiter_82599()
143 	IXGBE_WRITE_REG(hw, IXGBE_RTRUP2TC, reg);  in ixgbe_dcb_config_rx_arbiter_82599()
149 		reg = credit_refill | (credit_max << IXGBE_RTRPT4C_MCL_SHIFT);  in ixgbe_dcb_config_rx_arbiter_82599()
151 		reg |= (u32)(bwg_id[i]) << IXGBE_RTRPT4C_BWG_SHIFT;  in ixgbe_dcb_config_rx_arbiter_82599()
154 			reg |= IXGBE_RTRPT4C_LSP;  in ixgbe_dcb_config_rx_arbiter_82599()
156 		IXGBE_WRITE_REG(hw, IXGBE_RTRPT4C(i), reg);  in ixgbe_dcb_config_rx_arbiter_82599()
163 	reg = IXGBE_RTRPCS_RRM | IXGBE_RTRPCS_RAC;  in ixgbe_dcb_config_rx_arbiter_82599()
164 	IXGBE_WRITE_REG(hw, IXGBE_RTRPCS, reg);  in ixgbe_dcb_config_rx_arbiter_82599()
179 	u32 reg, max_credits;  in ixgbe_dcb_config_tx_desc_arbiter_82599()  local
191 		reg = max_credits << IXGBE_RTTDT2C_MCL_SHIFT;  in ixgbe_dcb_config_tx_desc_arbiter_82599()
192 		reg |= refill[i];  in ixgbe_dcb_config_tx_desc_arbiter_82599()
193 		reg |= (u32)(bwg_id[i]) << IXGBE_RTTDT2C_BWG_SHIFT;  in ixgbe_dcb_config_tx_desc_arbiter_82599()
196 			reg |= IXGBE_RTTDT2C_GSP;  in ixgbe_dcb_config_tx_desc_arbiter_82599()
199 			reg |= IXGBE_RTTDT2C_LSP;  in ixgbe_dcb_config_tx_desc_arbiter_82599()
201 		IXGBE_WRITE_REG(hw, IXGBE_RTTDT2C(i), reg);  in ixgbe_dcb_config_tx_desc_arbiter_82599()
208 	reg = IXGBE_RTTDCS_TDPAC | IXGBE_RTTDCS_TDRM;  in ixgbe_dcb_config_tx_desc_arbiter_82599()
209 	IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, reg);  in ixgbe_dcb_config_tx_desc_arbiter_82599()
225 	u32 reg;  in ixgbe_dcb_config_tx_data_arbiter_82599()  local
232 	reg = IXGBE_RTTPCS_TPPAC | IXGBE_RTTPCS_TPRM |  in ixgbe_dcb_config_tx_data_arbiter_82599()
235 	IXGBE_WRITE_REG(hw, IXGBE_RTTPCS, reg);  in ixgbe_dcb_config_tx_data_arbiter_82599()
243 	reg = 0;  in ixgbe_dcb_config_tx_data_arbiter_82599()
245 		reg |= (map[i] << (i * IXGBE_RTTUP2TC_UP_SHIFT));  in ixgbe_dcb_config_tx_data_arbiter_82599()
247 	IXGBE_WRITE_REG(hw, IXGBE_RTTUP2TC, reg);  in ixgbe_dcb_config_tx_data_arbiter_82599()
251 		reg = refill[i];  in ixgbe_dcb_config_tx_data_arbiter_82599()
252 		reg |= (u32)(max[i]) << IXGBE_RTTPT2C_MCL_SHIFT;  in ixgbe_dcb_config_tx_data_arbiter_82599()
253 		reg |= (u32)(bwg_id[i]) << IXGBE_RTTPT2C_BWG_SHIFT;  in ixgbe_dcb_config_tx_data_arbiter_82599()
256 			reg |= IXGBE_RTTPT2C_GSP;  in ixgbe_dcb_config_tx_data_arbiter_82599()
259 			reg |= IXGBE_RTTPT2C_LSP;  in ixgbe_dcb_config_tx_data_arbiter_82599()
261 		IXGBE_WRITE_REG(hw, IXGBE_RTTPT2C(i), reg);  in ixgbe_dcb_config_tx_data_arbiter_82599()
268 	reg = IXGBE_RTTPCS_TPPAC | IXGBE_RTTPCS_TPRM |  in ixgbe_dcb_config_tx_data_arbiter_82599()
270 	IXGBE_WRITE_REG(hw, IXGBE_RTTPCS, reg);  in ixgbe_dcb_config_tx_data_arbiter_82599()
285 	u32 i, j, fcrtl, reg;  in ixgbe_dcb_config_pfc_82599()  local
292 	reg = IXGBE_READ_REG(hw, IXGBE_MFLCN);  in ixgbe_dcb_config_pfc_82599()
293 	reg |= IXGBE_MFLCN_DPF;  in ixgbe_dcb_config_pfc_82599()
300 	reg &= ~(IXGBE_MFLCN_RPFCE_MASK | IXGBE_MFLCN_RFCE);  in ixgbe_dcb_config_pfc_82599()
303 		reg |= pfc_en << IXGBE_MFLCN_RPFCE_SHIFT;  in ixgbe_dcb_config_pfc_82599()
306 		reg |= IXGBE_MFLCN_RPFCE;  in ixgbe_dcb_config_pfc_82599()
308 	IXGBE_WRITE_REG(hw, IXGBE_MFLCN, reg);  in ixgbe_dcb_config_pfc_82599()
328 			reg = (hw->fc.high_water[i] << 10) | IXGBE_FCRTH_FCEN;  in ixgbe_dcb_config_pfc_82599()
339 			reg = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(i)) - 24576;  in ixgbe_dcb_config_pfc_82599()
343 		IXGBE_WRITE_REG(hw, IXGBE_FCRTH_82599(i), reg);  in ixgbe_dcb_config_pfc_82599()
352 	reg = hw->fc.pause_time | (hw->fc.pause_time << 16);  in ixgbe_dcb_config_pfc_82599()
354 		IXGBE_WRITE_REG(hw, IXGBE_FCTTV(i), reg);  in ixgbe_dcb_config_pfc_82599()
372 	u32 reg = 0;  in ixgbe_dcb_config_tc_stats_82599()  local
394 			reg = 0x01010101 * (i / 4);  in ixgbe_dcb_config_tc_stats_82599()
395 			IXGBE_WRITE_REG(hw, IXGBE_RQSMR(i), reg);  in ixgbe_dcb_config_tc_stats_82599()
408 				reg = 0x00000000;  in ixgbe_dcb_config_tc_stats_82599()
410 				reg = 0x01010101;  in ixgbe_dcb_config_tc_stats_82599()
412 				reg = 0x02020202;  in ixgbe_dcb_config_tc_stats_82599()
414 				reg = 0x03030303;  in ixgbe_dcb_config_tc_stats_82599()
416 				reg = 0x04040404;  in ixgbe_dcb_config_tc_stats_82599()
418 				reg = 0x05050505;  in ixgbe_dcb_config_tc_stats_82599()
420 				reg = 0x06060606;  in ixgbe_dcb_config_tc_stats_82599()
422 				reg = 0x07070707;  in ixgbe_dcb_config_tc_stats_82599()
423 			IXGBE_WRITE_REG(hw, IXGBE_TQSM(i), reg);  in ixgbe_dcb_config_tc_stats_82599()
439 			reg = 0x01010101 * (i / 8);  in ixgbe_dcb_config_tc_stats_82599()
440 			IXGBE_WRITE_REG(hw, IXGBE_RQSMR(i), reg);  in ixgbe_dcb_config_tc_stats_82599()
453 				reg = 0x00000000;  in ixgbe_dcb_config_tc_stats_82599()
455 				reg = 0x01010101;  in ixgbe_dcb_config_tc_stats_82599()
457 				reg = 0x02020202;  in ixgbe_dcb_config_tc_stats_82599()
459 				reg = 0x03030303;  in ixgbe_dcb_config_tc_stats_82599()
460 			IXGBE_WRITE_REG(hw, IXGBE_TQSM(i), reg);  in ixgbe_dcb_config_tc_stats_82599()
498 	u32 reg;  in ixgbe_dcb_config_82599()  local
502 	reg = IXGBE_READ_REG(hw, IXGBE_RTTDCS);  in ixgbe_dcb_config_82599()
503 	reg |= IXGBE_RTTDCS_ARBDIS;  in ixgbe_dcb_config_82599()
504 	IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, reg);  in ixgbe_dcb_config_82599()
506 	reg = IXGBE_READ_REG(hw, IXGBE_MRQC);  in ixgbe_dcb_config_82599()
509 		switch (reg & IXGBE_MRQC_MRQE_MASK) {  in ixgbe_dcb_config_82599()
513 			reg = (reg & ~IXGBE_MRQC_MRQE_MASK) |  in ixgbe_dcb_config_82599()
519 			reg = (reg & ~IXGBE_MRQC_MRQE_MASK) |  in ixgbe_dcb_config_82599()
528 			reg = (reg & ~IXGBE_MRQC_MRQE_MASK) |  in ixgbe_dcb_config_82599()
535 			reg = (reg & ~IXGBE_MRQC_MRQE_MASK) |  in ixgbe_dcb_config_82599()
538 			reg = (reg & ~IXGBE_MRQC_MRQE_MASK) |  in ixgbe_dcb_config_82599()
541 	IXGBE_WRITE_REG(hw, IXGBE_MRQC, reg);  in ixgbe_dcb_config_82599()
545 		reg = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_8TC_8TQ;  in ixgbe_dcb_config_82599()
548 		reg = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ;  in ixgbe_dcb_config_82599()
550 			reg |= IXGBE_MTQC_VT_ENA;  in ixgbe_dcb_config_82599()
552 	IXGBE_WRITE_REG(hw, IXGBE_MTQC, reg);  in ixgbe_dcb_config_82599()
560 	reg = IXGBE_READ_REG(hw, IXGBE_RTTDCS);  in ixgbe_dcb_config_82599()
561 	reg &= ~IXGBE_RTTDCS_ARBDIS;  in ixgbe_dcb_config_82599()
562 	IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, reg);  in ixgbe_dcb_config_82599()
565 	reg = IXGBE_READ_REG(hw, IXGBE_SECTXMINIFG);  in ixgbe_dcb_config_82599()
566 	reg |= IXGBE_SECTX_DCB;  in ixgbe_dcb_config_82599()
567 	IXGBE_WRITE_REG(hw, IXGBE_SECTXMINIFG, reg);  in ixgbe_dcb_config_82599()