1/* 2 * Copyright 2013 Freescale Semiconductor, Inc. 3 * 4 * This program is free software; you can redistribute it and/or modify 5 * it under the terms of the GNU General Public License as published by 6 * the Free Software Foundation; either version 2 of the License, or 7 * (at your option) any later version. 8 */ 9 10#include "skeleton.dtsi" 11#include "vfxxx.dtsi" 12#include <dt-bindings/interrupt-controller/arm-gic.h> 13 14/ { 15 cpus { 16 #address-cells = <1>; 17 #size-cells = <0>; 18 19 a5_cpu: cpu@0 { 20 compatible = "arm,cortex-a5"; 21 device_type = "cpu"; 22 reg = <0x0>; 23 }; 24 }; 25 26 soc { 27 interrupt-parent = <&intc>; 28 29 aips-bus@40000000 { 30 31 intc: interrupt-controller@40002000 { 32 compatible = "arm,cortex-a9-gic"; 33 #interrupt-cells = <3>; 34 interrupt-controller; 35 reg = <0x40003000 0x1000>, 36 <0x40002100 0x100>; 37 }; 38 39 global_timer: timer@40002200 { 40 compatible = "arm,cortex-a9-global-timer"; 41 reg = <0x40002200 0x20>; 42 interrupts = <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>; 43 clocks = <&clks VF610_CLK_PLATFORM_BUS>; 44 }; 45 }; 46 }; 47}; 48 49&adc0 { 50 interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>; 51}; 52 53&adc1 { 54 interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>; 55}; 56 57&can0 { 58 interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>; 59}; 60 61&can1 { 62 interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>; 63}; 64 65&dspi0 { 66 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; 67}; 68 69&edma0 { 70 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>, 71 <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 72 interrupt-names = "edma-tx", "edma-err"; 73}; 74 75&edma1 { 76 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>, 77 <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; 78 interrupt-names = "edma-tx", "edma-err"; 79}; 80 81&esdhc1 { 82 interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>; 83}; 84 85&fec0 { 86 interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>; 87}; 88 89&fec1 { 90 interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>; 91}; 92 93&ftm { 94 interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>; 95}; 96 97&gpio0 { 98 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; 99}; 100 101&gpio1 { 102 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 103}; 104 105&gpio2 { 106 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; 107}; 108 109&gpio3 { 110 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; 111}; 112 113&gpio4 { 114 interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>; 115}; 116 117&i2c0 { 118 interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; 119}; 120 121&pit { 122 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>; 123}; 124 125&qspi0 { 126 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; 127}; 128 129&sai2 { 130 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; 131}; 132 133&snvsrtc { 134 interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>; 135}; 136 137&src { 138 interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>; 139}; 140 141&uart0 { 142 interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>; 143}; 144 145&uart1 { 146 interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>; 147}; 148 149&uart2 { 150 interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; 151}; 152 153&uart3 { 154 interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>; 155}; 156 157&uart4 { 158 interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>; 159}; 160 161&uart5 { 162 interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>; 163}; 164 165&usbdev0 { 166 interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>; 167}; 168 169&usbh1 { 170 interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>; 171}; 172 173&usbphy0 { 174 interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>; 175}; 176 177&usbphy1 { 178 interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>; 179}; 180 181&wdoga5 { 182 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; 183 status = "okay"; 184}; 185