1 /*
2 * Copyright (c) 2013-2014 Qlogic Corporation
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
16 * and ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
19 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
20 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
21 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
22 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
23 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
24 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
25 * POSSIBILITY OF SUCH DAMAGE.
26 */
27
28 /*
29 * File: ql_os.c
30 * Author : David C Somayajulu, Qlogic Corporation, Aliso Viejo, CA 92656.
31 */
32
33 #include <sys/cdefs.h>
34 __FBSDID("$FreeBSD$");
35
36
37 #include "ql_os.h"
38 #include "ql_hw.h"
39 #include "ql_def.h"
40 #include "ql_inline.h"
41 #include "ql_ver.h"
42 #include "ql_glbl.h"
43 #include "ql_dbg.h"
44 #include <sys/smp.h>
45
46 /*
47 * Some PCI Configuration Space Related Defines
48 */
49
50 #ifndef PCI_VENDOR_QLOGIC
51 #define PCI_VENDOR_QLOGIC 0x1077
52 #endif
53
54 #ifndef PCI_PRODUCT_QLOGIC_ISP8030
55 #define PCI_PRODUCT_QLOGIC_ISP8030 0x8030
56 #endif
57
58 #define PCI_QLOGIC_ISP8030 \
59 ((PCI_PRODUCT_QLOGIC_ISP8030 << 16) | PCI_VENDOR_QLOGIC)
60
61 /*
62 * static functions
63 */
64 static int qla_alloc_parent_dma_tag(qla_host_t *ha);
65 static void qla_free_parent_dma_tag(qla_host_t *ha);
66 static int qla_alloc_xmt_bufs(qla_host_t *ha);
67 static void qla_free_xmt_bufs(qla_host_t *ha);
68 static int qla_alloc_rcv_bufs(qla_host_t *ha);
69 static void qla_free_rcv_bufs(qla_host_t *ha);
70 static void qla_clear_tx_buf(qla_host_t *ha, qla_tx_buf_t *txb);
71
72 static void qla_init_ifnet(device_t dev, qla_host_t *ha);
73 static int qla_sysctl_get_stats(SYSCTL_HANDLER_ARGS);
74 static int qla_sysctl_get_link_status(SYSCTL_HANDLER_ARGS);
75 static void qla_release(qla_host_t *ha);
76 static void qla_dmamap_callback(void *arg, bus_dma_segment_t *segs, int nsegs,
77 int error);
78 static void qla_stop(qla_host_t *ha);
79 static int qla_send(qla_host_t *ha, struct mbuf **m_headp);
80 static void qla_tx_done(void *context, int pending);
81 static void qla_get_peer(qla_host_t *ha);
82 static void qla_error_recovery(void *context, int pending);
83
84 /*
85 * Hooks to the Operating Systems
86 */
87 static int qla_pci_probe (device_t);
88 static int qla_pci_attach (device_t);
89 static int qla_pci_detach (device_t);
90
91 static void qla_init(void *arg);
92 static int qla_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data);
93 static int qla_media_change(struct ifnet *ifp);
94 static void qla_media_status(struct ifnet *ifp, struct ifmediareq *ifmr);
95 static void qla_start(struct ifnet *ifp);
96
97 static device_method_t qla_pci_methods[] = {
98 /* Device interface */
99 DEVMETHOD(device_probe, qla_pci_probe),
100 DEVMETHOD(device_attach, qla_pci_attach),
101 DEVMETHOD(device_detach, qla_pci_detach),
102 { 0, 0 }
103 };
104
105 static driver_t qla_pci_driver = {
106 "ql", qla_pci_methods, sizeof (qla_host_t),
107 };
108
109 static devclass_t qla83xx_devclass;
110
111 DRIVER_MODULE(qla83xx, pci, qla_pci_driver, qla83xx_devclass, 0, 0);
112
113 MODULE_DEPEND(qla83xx, pci, 1, 1, 1);
114 MODULE_DEPEND(qla83xx, ether, 1, 1, 1);
115
116 MALLOC_DEFINE(M_QLA83XXBUF, "qla83xxbuf", "Buffers for qla83xx driver");
117
118 #define QL_STD_REPLENISH_THRES 0
119 #define QL_JUMBO_REPLENISH_THRES 32
120
121
122 static char dev_str[64];
123
124 /*
125 * Name: qla_pci_probe
126 * Function: Validate the PCI device to be a QLA80XX device
127 */
128 static int
qla_pci_probe(device_t dev)129 qla_pci_probe(device_t dev)
130 {
131 switch ((pci_get_device(dev) << 16) | (pci_get_vendor(dev))) {
132 case PCI_QLOGIC_ISP8030:
133 snprintf(dev_str, sizeof(dev_str), "%s v%d.%d.%d",
134 "Qlogic ISP 83xx PCI CNA Adapter-Ethernet Function",
135 QLA_VERSION_MAJOR, QLA_VERSION_MINOR,
136 QLA_VERSION_BUILD);
137 device_set_desc(dev, dev_str);
138 break;
139 default:
140 return (ENXIO);
141 }
142
143 if (bootverbose)
144 printf("%s: %s\n ", __func__, dev_str);
145
146 return (BUS_PROBE_DEFAULT);
147 }
148
149 static void
qla_add_sysctls(qla_host_t * ha)150 qla_add_sysctls(qla_host_t *ha)
151 {
152 device_t dev = ha->pci_dev;
153
154 SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev),
155 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
156 OID_AUTO, "stats", CTLTYPE_INT | CTLFLAG_RW,
157 (void *)ha, 0,
158 qla_sysctl_get_stats, "I", "Statistics");
159
160 SYSCTL_ADD_STRING(device_get_sysctl_ctx(dev),
161 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
162 OID_AUTO, "fw_version", CTLFLAG_RD,
163 ha->fw_ver_str, 0, "firmware version");
164
165 SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev),
166 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
167 OID_AUTO, "link_status", CTLTYPE_INT | CTLFLAG_RW,
168 (void *)ha, 0,
169 qla_sysctl_get_link_status, "I", "Link Status");
170
171 ha->dbg_level = 0;
172 SYSCTL_ADD_UINT(device_get_sysctl_ctx(dev),
173 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
174 OID_AUTO, "debug", CTLFLAG_RW,
175 &ha->dbg_level, ha->dbg_level, "Debug Level");
176
177 ha->std_replenish = QL_STD_REPLENISH_THRES;
178 SYSCTL_ADD_UINT(device_get_sysctl_ctx(dev),
179 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
180 OID_AUTO, "std_replenish", CTLFLAG_RW,
181 &ha->std_replenish, ha->std_replenish,
182 "Threshold for Replenishing Standard Frames");
183
184 SYSCTL_ADD_QUAD(device_get_sysctl_ctx(dev),
185 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
186 OID_AUTO, "ipv4_lro",
187 CTLFLAG_RD, &ha->ipv4_lro,
188 "number of ipv4 lro completions");
189
190 SYSCTL_ADD_QUAD(device_get_sysctl_ctx(dev),
191 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
192 OID_AUTO, "ipv6_lro",
193 CTLFLAG_RD, &ha->ipv6_lro,
194 "number of ipv6 lro completions");
195
196 SYSCTL_ADD_QUAD(device_get_sysctl_ctx(dev),
197 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
198 OID_AUTO, "tx_tso_frames",
199 CTLFLAG_RD, &ha->tx_tso_frames,
200 "number of Tx TSO Frames");
201
202 SYSCTL_ADD_QUAD(device_get_sysctl_ctx(dev),
203 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
204 OID_AUTO, "hw_vlan_tx_frames",
205 CTLFLAG_RD, &ha->hw_vlan_tx_frames,
206 "number of Tx VLAN Frames");
207
208 return;
209 }
210
211 static void
qla_watchdog(void * arg)212 qla_watchdog(void *arg)
213 {
214 qla_host_t *ha = arg;
215 qla_hw_t *hw;
216 struct ifnet *ifp;
217 uint32_t i;
218 qla_hw_tx_cntxt_t *hw_tx_cntxt;
219
220 hw = &ha->hw;
221 ifp = ha->ifp;
222
223 if (ha->flags.qla_watchdog_exit) {
224 ha->qla_watchdog_exited = 1;
225 return;
226 }
227 ha->qla_watchdog_exited = 0;
228
229 if (!ha->flags.qla_watchdog_pause) {
230 if (ql_hw_check_health(ha) || ha->qla_initiate_recovery ||
231 (ha->msg_from_peer == QL_PEER_MSG_RESET)) {
232 ha->qla_watchdog_paused = 1;
233 ha->flags.qla_watchdog_pause = 1;
234 ha->qla_initiate_recovery = 0;
235 ha->err_inject = 0;
236 taskqueue_enqueue(ha->err_tq, &ha->err_task);
237 } else {
238 for (i = 0; i < ha->hw.num_tx_rings; i++) {
239 hw_tx_cntxt = &hw->tx_cntxt[i];
240 if (qla_le32_to_host(*(hw_tx_cntxt->tx_cons)) !=
241 hw_tx_cntxt->txr_comp) {
242 taskqueue_enqueue(ha->tx_tq,
243 &ha->tx_task);
244 break;
245 }
246 }
247
248 if ((ifp->if_snd.ifq_head != NULL) && QL_RUNNING(ifp)) {
249 taskqueue_enqueue(ha->tx_tq, &ha->tx_task);
250 }
251 ha->qla_watchdog_paused = 0;
252 }
253
254 } else {
255 ha->qla_watchdog_paused = 1;
256 }
257
258 ha->watchdog_ticks = ha->watchdog_ticks++ % 1000;
259 callout_reset(&ha->tx_callout, QLA_WATCHDOG_CALLOUT_TICKS,
260 qla_watchdog, ha);
261 }
262
263 /*
264 * Name: qla_pci_attach
265 * Function: attaches the device to the operating system
266 */
267 static int
qla_pci_attach(device_t dev)268 qla_pci_attach(device_t dev)
269 {
270 qla_host_t *ha = NULL;
271 uint32_t rsrc_len;
272 int i;
273
274 QL_DPRINT2(ha, (dev, "%s: enter\n", __func__));
275
276 if ((ha = device_get_softc(dev)) == NULL) {
277 device_printf(dev, "cannot get softc\n");
278 return (ENOMEM);
279 }
280
281 memset(ha, 0, sizeof (qla_host_t));
282
283 if (pci_get_device(dev) != PCI_PRODUCT_QLOGIC_ISP8030) {
284 device_printf(dev, "device is not ISP8030\n");
285 return (ENXIO);
286 }
287
288 ha->pci_func = pci_get_function(dev);
289
290 ha->pci_dev = dev;
291
292 pci_enable_busmaster(dev);
293
294 ha->reg_rid = PCIR_BAR(0);
295 ha->pci_reg = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &ha->reg_rid,
296 RF_ACTIVE);
297
298 if (ha->pci_reg == NULL) {
299 device_printf(dev, "unable to map any ports\n");
300 goto qla_pci_attach_err;
301 }
302
303 rsrc_len = (uint32_t) bus_get_resource_count(dev, SYS_RES_MEMORY,
304 ha->reg_rid);
305
306 mtx_init(&ha->hw_lock, "qla83xx_hw_lock", MTX_NETWORK_LOCK, MTX_DEF);
307
308 mtx_init(&ha->tx_lock, "qla83xx_tx_lock", MTX_NETWORK_LOCK, MTX_DEF);
309
310 qla_add_sysctls(ha);
311 ql_hw_add_sysctls(ha);
312
313 ha->flags.lock_init = 1;
314
315 ha->reg_rid1 = PCIR_BAR(2);
316 ha->pci_reg1 = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
317 &ha->reg_rid1, RF_ACTIVE);
318
319 ha->msix_count = pci_msix_count(dev);
320
321 if (ha->msix_count < (ha->hw.num_sds_rings + 1)) {
322 device_printf(dev, "%s: msix_count[%d] not enough\n", __func__,
323 ha->msix_count);
324 goto qla_pci_attach_err;
325 }
326
327 QL_DPRINT2(ha, (dev, "%s: ha %p pci_func 0x%x rsrc_count 0x%08x"
328 " msix_count 0x%x pci_reg %p\n", __func__, ha,
329 ha->pci_func, rsrc_len, ha->msix_count, ha->pci_reg));
330
331 ha->msix_count = ha->hw.num_sds_rings + 1;
332
333 if (pci_alloc_msix(dev, &ha->msix_count)) {
334 device_printf(dev, "%s: pci_alloc_msi[%d] failed\n", __func__,
335 ha->msix_count);
336 ha->msix_count = 0;
337 goto qla_pci_attach_err;
338 }
339
340 ha->mbx_irq_rid = 1;
341 ha->mbx_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ,
342 &ha->mbx_irq_rid,
343 (RF_ACTIVE | RF_SHAREABLE));
344 if (ha->mbx_irq == NULL) {
345 device_printf(dev, "could not allocate mbx interrupt\n");
346 goto qla_pci_attach_err;
347 }
348 if (bus_setup_intr(dev, ha->mbx_irq, (INTR_TYPE_NET | INTR_MPSAFE),
349 NULL, ql_mbx_isr, ha, &ha->mbx_handle)) {
350 device_printf(dev, "could not setup mbx interrupt\n");
351 goto qla_pci_attach_err;
352 }
353
354
355 for (i = 0; i < ha->hw.num_sds_rings; i++) {
356 ha->irq_vec[i].sds_idx = i;
357 ha->irq_vec[i].ha = ha;
358 ha->irq_vec[i].irq_rid = 2 + i;
359
360 ha->irq_vec[i].irq = bus_alloc_resource_any(dev, SYS_RES_IRQ,
361 &ha->irq_vec[i].irq_rid,
362 (RF_ACTIVE | RF_SHAREABLE));
363
364 if (ha->irq_vec[i].irq == NULL) {
365 device_printf(dev, "could not allocate interrupt\n");
366 goto qla_pci_attach_err;
367 }
368 if (bus_setup_intr(dev, ha->irq_vec[i].irq,
369 (INTR_TYPE_NET | INTR_MPSAFE),
370 NULL, ql_isr, &ha->irq_vec[i],
371 &ha->irq_vec[i].handle)) {
372 device_printf(dev, "could not setup interrupt\n");
373 goto qla_pci_attach_err;
374 }
375 }
376
377 printf("%s: mp__ncpus %d sds %d rds %d msi-x %d\n", __func__, mp_ncpus,
378 ha->hw.num_sds_rings, ha->hw.num_rds_rings, ha->msix_count);
379
380 /* initialize hardware */
381 if (ql_init_hw(ha)) {
382 device_printf(dev, "%s: ql_init_hw failed\n", __func__);
383 goto qla_pci_attach_err;
384 }
385
386 device_printf(dev, "%s: firmware[%d.%d.%d.%d]\n", __func__,
387 ha->fw_ver_major, ha->fw_ver_minor, ha->fw_ver_sub,
388 ha->fw_ver_build);
389 snprintf(ha->fw_ver_str, sizeof(ha->fw_ver_str), "%d.%d.%d.%d",
390 ha->fw_ver_major, ha->fw_ver_minor, ha->fw_ver_sub,
391 ha->fw_ver_build);
392
393 ql_read_mac_addr(ha);
394
395 /* allocate parent dma tag */
396 if (qla_alloc_parent_dma_tag(ha)) {
397 device_printf(dev, "%s: qla_alloc_parent_dma_tag failed\n",
398 __func__);
399 goto qla_pci_attach_err;
400 }
401
402 /* alloc all dma buffers */
403 if (ql_alloc_dma(ha)) {
404 device_printf(dev, "%s: ql_alloc_dma failed\n", __func__);
405 goto qla_pci_attach_err;
406 }
407 qla_get_peer(ha);
408
409 /* create the o.s ethernet interface */
410 qla_init_ifnet(dev, ha);
411
412 ha->flags.qla_watchdog_active = 1;
413 ha->flags.qla_watchdog_pause = 1;
414
415
416 TASK_INIT(&ha->tx_task, 0, qla_tx_done, ha);
417 ha->tx_tq = taskqueue_create_fast("qla_txq", M_NOWAIT,
418 taskqueue_thread_enqueue, &ha->tx_tq);
419 taskqueue_start_threads(&ha->tx_tq, 1, PI_NET, "%s txq",
420 device_get_nameunit(ha->pci_dev));
421
422 callout_init(&ha->tx_callout, TRUE);
423 ha->flags.qla_callout_init = 1;
424
425 /* create ioctl device interface */
426 if (ql_make_cdev(ha)) {
427 device_printf(dev, "%s: ql_make_cdev failed\n", __func__);
428 goto qla_pci_attach_err;
429 }
430
431 callout_reset(&ha->tx_callout, QLA_WATCHDOG_CALLOUT_TICKS,
432 qla_watchdog, ha);
433
434 TASK_INIT(&ha->err_task, 0, qla_error_recovery, ha);
435 ha->err_tq = taskqueue_create_fast("qla_errq", M_NOWAIT,
436 taskqueue_thread_enqueue, &ha->err_tq);
437 taskqueue_start_threads(&ha->err_tq, 1, PI_NET, "%s errq",
438 device_get_nameunit(ha->pci_dev));
439
440 QL_DPRINT2(ha, (dev, "%s: exit 0\n", __func__));
441 return (0);
442
443 qla_pci_attach_err:
444
445 qla_release(ha);
446
447 QL_DPRINT2(ha, (dev, "%s: exit ENXIO\n", __func__));
448 return (ENXIO);
449 }
450
451 /*
452 * Name: qla_pci_detach
453 * Function: Unhooks the device from the operating system
454 */
455 static int
qla_pci_detach(device_t dev)456 qla_pci_detach(device_t dev)
457 {
458 qla_host_t *ha = NULL;
459 struct ifnet *ifp;
460
461 QL_DPRINT2(ha, (dev, "%s: enter\n", __func__));
462
463 if ((ha = device_get_softc(dev)) == NULL) {
464 device_printf(dev, "cannot get softc\n");
465 return (ENOMEM);
466 }
467
468 ifp = ha->ifp;
469
470 (void)QLA_LOCK(ha, __func__, 0);
471 qla_stop(ha);
472 QLA_UNLOCK(ha, __func__);
473
474 qla_release(ha);
475
476 QL_DPRINT2(ha, (dev, "%s: exit\n", __func__));
477
478 return (0);
479 }
480
481 /*
482 * SYSCTL Related Callbacks
483 */
484 static int
qla_sysctl_get_stats(SYSCTL_HANDLER_ARGS)485 qla_sysctl_get_stats(SYSCTL_HANDLER_ARGS)
486 {
487 int err, ret = 0;
488 qla_host_t *ha;
489
490 err = sysctl_handle_int(oidp, &ret, 0, req);
491
492 if (err || !req->newptr)
493 return (err);
494
495 if (ret == 1) {
496 ha = (qla_host_t *)arg1;
497 ql_get_stats(ha);
498 }
499 return (err);
500 }
501 static int
qla_sysctl_get_link_status(SYSCTL_HANDLER_ARGS)502 qla_sysctl_get_link_status(SYSCTL_HANDLER_ARGS)
503 {
504 int err, ret = 0;
505 qla_host_t *ha;
506
507 err = sysctl_handle_int(oidp, &ret, 0, req);
508
509 if (err || !req->newptr)
510 return (err);
511
512 if (ret == 1) {
513 ha = (qla_host_t *)arg1;
514 ql_hw_link_status(ha);
515 }
516 return (err);
517 }
518
519 /*
520 * Name: qla_release
521 * Function: Releases the resources allocated for the device
522 */
523 static void
qla_release(qla_host_t * ha)524 qla_release(qla_host_t *ha)
525 {
526 device_t dev;
527 int i;
528
529 dev = ha->pci_dev;
530
531 if (ha->err_tq) {
532 taskqueue_drain(ha->err_tq, &ha->err_task);
533 taskqueue_free(ha->err_tq);
534 }
535
536 if (ha->tx_tq) {
537 taskqueue_drain(ha->tx_tq, &ha->tx_task);
538 taskqueue_free(ha->tx_tq);
539 }
540
541 ql_del_cdev(ha);
542
543 if (ha->flags.qla_watchdog_active) {
544 ha->flags.qla_watchdog_exit = 1;
545
546 while (ha->qla_watchdog_exited == 0)
547 qla_mdelay(__func__, 1);
548 }
549
550 if (ha->flags.qla_callout_init)
551 callout_stop(&ha->tx_callout);
552
553 if (ha->ifp != NULL)
554 ether_ifdetach(ha->ifp);
555
556 ql_free_dma(ha);
557 qla_free_parent_dma_tag(ha);
558
559 if (ha->mbx_handle)
560 (void)bus_teardown_intr(dev, ha->mbx_irq, ha->mbx_handle);
561
562 if (ha->mbx_irq)
563 (void) bus_release_resource(dev, SYS_RES_IRQ, ha->mbx_irq_rid,
564 ha->mbx_irq);
565
566 for (i = 0; i < ha->hw.num_sds_rings; i++) {
567
568 if (ha->irq_vec[i].handle) {
569 (void)bus_teardown_intr(dev, ha->irq_vec[i].irq,
570 ha->irq_vec[i].handle);
571 }
572
573 if (ha->irq_vec[i].irq) {
574 (void)bus_release_resource(dev, SYS_RES_IRQ,
575 ha->irq_vec[i].irq_rid,
576 ha->irq_vec[i].irq);
577 }
578 }
579
580 if (ha->msix_count)
581 pci_release_msi(dev);
582
583 if (ha->flags.lock_init) {
584 mtx_destroy(&ha->tx_lock);
585 mtx_destroy(&ha->hw_lock);
586 }
587
588 if (ha->pci_reg)
589 (void) bus_release_resource(dev, SYS_RES_MEMORY, ha->reg_rid,
590 ha->pci_reg);
591
592 if (ha->pci_reg1)
593 (void) bus_release_resource(dev, SYS_RES_MEMORY, ha->reg_rid1,
594 ha->pci_reg1);
595 }
596
597 /*
598 * DMA Related Functions
599 */
600
601 static void
qla_dmamap_callback(void * arg,bus_dma_segment_t * segs,int nsegs,int error)602 qla_dmamap_callback(void *arg, bus_dma_segment_t *segs, int nsegs, int error)
603 {
604 *((bus_addr_t *)arg) = 0;
605
606 if (error) {
607 printf("%s: bus_dmamap_load failed (%d)\n", __func__, error);
608 return;
609 }
610
611 *((bus_addr_t *)arg) = segs[0].ds_addr;
612
613 return;
614 }
615
616 int
ql_alloc_dmabuf(qla_host_t * ha,qla_dma_t * dma_buf)617 ql_alloc_dmabuf(qla_host_t *ha, qla_dma_t *dma_buf)
618 {
619 int ret = 0;
620 device_t dev;
621 bus_addr_t b_addr;
622
623 dev = ha->pci_dev;
624
625 QL_DPRINT2(ha, (dev, "%s: enter\n", __func__));
626
627 ret = bus_dma_tag_create(
628 ha->parent_tag,/* parent */
629 dma_buf->alignment,
630 ((bus_size_t)(1ULL << 32)),/* boundary */
631 BUS_SPACE_MAXADDR, /* lowaddr */
632 BUS_SPACE_MAXADDR, /* highaddr */
633 NULL, NULL, /* filter, filterarg */
634 dma_buf->size, /* maxsize */
635 1, /* nsegments */
636 dma_buf->size, /* maxsegsize */
637 0, /* flags */
638 NULL, NULL, /* lockfunc, lockarg */
639 &dma_buf->dma_tag);
640
641 if (ret) {
642 device_printf(dev, "%s: could not create dma tag\n", __func__);
643 goto ql_alloc_dmabuf_exit;
644 }
645 ret = bus_dmamem_alloc(dma_buf->dma_tag,
646 (void **)&dma_buf->dma_b,
647 (BUS_DMA_ZERO | BUS_DMA_COHERENT | BUS_DMA_NOWAIT),
648 &dma_buf->dma_map);
649 if (ret) {
650 bus_dma_tag_destroy(dma_buf->dma_tag);
651 device_printf(dev, "%s: bus_dmamem_alloc failed\n", __func__);
652 goto ql_alloc_dmabuf_exit;
653 }
654
655 ret = bus_dmamap_load(dma_buf->dma_tag,
656 dma_buf->dma_map,
657 dma_buf->dma_b,
658 dma_buf->size,
659 qla_dmamap_callback,
660 &b_addr, BUS_DMA_NOWAIT);
661
662 if (ret || !b_addr) {
663 bus_dma_tag_destroy(dma_buf->dma_tag);
664 bus_dmamem_free(dma_buf->dma_tag, dma_buf->dma_b,
665 dma_buf->dma_map);
666 ret = -1;
667 goto ql_alloc_dmabuf_exit;
668 }
669
670 dma_buf->dma_addr = b_addr;
671
672 ql_alloc_dmabuf_exit:
673 QL_DPRINT2(ha, (dev, "%s: exit ret 0x%08x tag %p map %p b %p sz 0x%x\n",
674 __func__, ret, (void *)dma_buf->dma_tag,
675 (void *)dma_buf->dma_map, (void *)dma_buf->dma_b,
676 dma_buf->size));
677
678 return ret;
679 }
680
681 void
ql_free_dmabuf(qla_host_t * ha,qla_dma_t * dma_buf)682 ql_free_dmabuf(qla_host_t *ha, qla_dma_t *dma_buf)
683 {
684 bus_dmamem_free(dma_buf->dma_tag, dma_buf->dma_b, dma_buf->dma_map);
685 bus_dma_tag_destroy(dma_buf->dma_tag);
686 }
687
688 static int
qla_alloc_parent_dma_tag(qla_host_t * ha)689 qla_alloc_parent_dma_tag(qla_host_t *ha)
690 {
691 int ret;
692 device_t dev;
693
694 dev = ha->pci_dev;
695
696 /*
697 * Allocate parent DMA Tag
698 */
699 ret = bus_dma_tag_create(
700 bus_get_dma_tag(dev), /* parent */
701 1,((bus_size_t)(1ULL << 32)),/* alignment, boundary */
702 BUS_SPACE_MAXADDR, /* lowaddr */
703 BUS_SPACE_MAXADDR, /* highaddr */
704 NULL, NULL, /* filter, filterarg */
705 BUS_SPACE_MAXSIZE_32BIT,/* maxsize */
706 0, /* nsegments */
707 BUS_SPACE_MAXSIZE_32BIT,/* maxsegsize */
708 0, /* flags */
709 NULL, NULL, /* lockfunc, lockarg */
710 &ha->parent_tag);
711
712 if (ret) {
713 device_printf(dev, "%s: could not create parent dma tag\n",
714 __func__);
715 return (-1);
716 }
717
718 ha->flags.parent_tag = 1;
719
720 return (0);
721 }
722
723 static void
qla_free_parent_dma_tag(qla_host_t * ha)724 qla_free_parent_dma_tag(qla_host_t *ha)
725 {
726 if (ha->flags.parent_tag) {
727 bus_dma_tag_destroy(ha->parent_tag);
728 ha->flags.parent_tag = 0;
729 }
730 }
731
732 /*
733 * Name: qla_init_ifnet
734 * Function: Creates the Network Device Interface and Registers it with the O.S
735 */
736
737 static void
qla_init_ifnet(device_t dev,qla_host_t * ha)738 qla_init_ifnet(device_t dev, qla_host_t *ha)
739 {
740 struct ifnet *ifp;
741
742 QL_DPRINT2(ha, (dev, "%s: enter\n", __func__));
743
744 ifp = ha->ifp = if_alloc(IFT_ETHER);
745
746 if (ifp == NULL)
747 panic("%s: cannot if_alloc()\n", device_get_nameunit(dev));
748
749 if_initname(ifp, device_get_name(dev), device_get_unit(dev));
750
751 #if __FreeBSD_version >= 1000000
752 if_initbaudrate(ifp, IF_Gbps(10));
753 ifp->if_capabilities = IFCAP_LINKSTATE;
754 #else
755 ifp->if_mtu = ETHERMTU;
756 ifp->if_baudrate = (1 * 1000 * 1000 *1000);
757
758 #endif /* #if __FreeBSD_version >= 1000000 */
759
760 ifp->if_init = qla_init;
761 ifp->if_softc = ha;
762 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
763 ifp->if_ioctl = qla_ioctl;
764 ifp->if_start = qla_start;
765
766 IFQ_SET_MAXLEN(&ifp->if_snd, qla_get_ifq_snd_maxlen(ha));
767 ifp->if_snd.ifq_drv_maxlen = qla_get_ifq_snd_maxlen(ha);
768 IFQ_SET_READY(&ifp->if_snd);
769
770 ha->max_frame_size = ifp->if_mtu + ETHER_HDR_LEN + ETHER_CRC_LEN;
771
772 ether_ifattach(ifp, qla_get_mac_addr(ha));
773
774 ifp->if_capabilities = IFCAP_HWCSUM |
775 IFCAP_TSO4 |
776 IFCAP_JUMBO_MTU;
777
778 ifp->if_capabilities |= IFCAP_VLAN_HWTAGGING | IFCAP_VLAN_MTU;
779 ifp->if_capabilities |= IFCAP_VLAN_HWTSO;
780
781 ifp->if_capenable = ifp->if_capabilities;
782
783 ifp->if_data.ifi_hdrlen = sizeof(struct ether_vlan_header);
784
785 ifmedia_init(&ha->media, IFM_IMASK, qla_media_change, qla_media_status);
786
787 ifmedia_add(&ha->media, (IFM_ETHER | qla_get_optics(ha) | IFM_FDX), 0,
788 NULL);
789 ifmedia_add(&ha->media, (IFM_ETHER | IFM_AUTO), 0, NULL);
790
791 ifmedia_set(&ha->media, (IFM_ETHER | IFM_AUTO));
792
793 QL_DPRINT2(ha, (dev, "%s: exit\n", __func__));
794
795 return;
796 }
797
798 static void
qla_init_locked(qla_host_t * ha)799 qla_init_locked(qla_host_t *ha)
800 {
801 struct ifnet *ifp = ha->ifp;
802
803 qla_stop(ha);
804
805 if (qla_alloc_xmt_bufs(ha) != 0)
806 return;
807
808 if (qla_alloc_rcv_bufs(ha) != 0)
809 return;
810
811 bcopy(IF_LLADDR(ha->ifp), ha->hw.mac_addr, ETHER_ADDR_LEN);
812
813 ifp->if_hwassist = CSUM_TCP | CSUM_UDP | CSUM_TSO;
814
815 ha->flags.stop_rcv = 0;
816 if (ql_init_hw_if(ha) == 0) {
817 ifp = ha->ifp;
818 ifp->if_drv_flags |= IFF_DRV_RUNNING;
819 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
820 ha->flags.qla_watchdog_pause = 0;
821 ha->hw_vlan_tx_frames = 0;
822 ha->tx_tso_frames = 0;
823 }
824
825 return;
826 }
827
828 static void
qla_init(void * arg)829 qla_init(void *arg)
830 {
831 qla_host_t *ha;
832
833 ha = (qla_host_t *)arg;
834
835 QL_DPRINT2(ha, (ha->pci_dev, "%s: enter\n", __func__));
836
837 (void)QLA_LOCK(ha, __func__, 0);
838 qla_init_locked(ha);
839 QLA_UNLOCK(ha, __func__);
840
841 QL_DPRINT2(ha, (ha->pci_dev, "%s: exit\n", __func__));
842 }
843
844 static int
qla_set_multi(qla_host_t * ha,uint32_t add_multi)845 qla_set_multi(qla_host_t *ha, uint32_t add_multi)
846 {
847 uint8_t mta[Q8_MAX_NUM_MULTICAST_ADDRS * Q8_MAC_ADDR_LEN];
848 struct ifmultiaddr *ifma;
849 int mcnt = 0;
850 struct ifnet *ifp = ha->ifp;
851 int ret = 0;
852
853 if_maddr_rlock(ifp);
854
855 TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) {
856
857 if (ifma->ifma_addr->sa_family != AF_LINK)
858 continue;
859
860 if (mcnt == Q8_MAX_NUM_MULTICAST_ADDRS)
861 break;
862
863 bcopy(LLADDR((struct sockaddr_dl *) ifma->ifma_addr),
864 &mta[mcnt * Q8_MAC_ADDR_LEN], Q8_MAC_ADDR_LEN);
865
866 mcnt++;
867 }
868
869 if_maddr_runlock(ifp);
870
871 if (QLA_LOCK(ha, __func__, 1) == 0) {
872 ret = ql_hw_set_multi(ha, mta, mcnt, add_multi);
873 QLA_UNLOCK(ha, __func__);
874 }
875
876 return (ret);
877 }
878
879 static int
qla_ioctl(struct ifnet * ifp,u_long cmd,caddr_t data)880 qla_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data)
881 {
882 int ret = 0;
883 struct ifreq *ifr = (struct ifreq *)data;
884 struct ifaddr *ifa = (struct ifaddr *)data;
885 qla_host_t *ha;
886
887 ha = (qla_host_t *)ifp->if_softc;
888
889 switch (cmd) {
890 case SIOCSIFADDR:
891 QL_DPRINT4(ha, (ha->pci_dev, "%s: SIOCSIFADDR (0x%lx)\n",
892 __func__, cmd));
893
894 if (ifa->ifa_addr->sa_family == AF_INET) {
895 ifp->if_flags |= IFF_UP;
896 if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) {
897 (void)QLA_LOCK(ha, __func__, 0);
898 qla_init_locked(ha);
899 QLA_UNLOCK(ha, __func__);
900 }
901 QL_DPRINT4(ha, (ha->pci_dev,
902 "%s: SIOCSIFADDR (0x%lx) ipv4 [0x%08x]\n",
903 __func__, cmd,
904 ntohl(IA_SIN(ifa)->sin_addr.s_addr)));
905
906 arp_ifinit(ifp, ifa);
907 } else {
908 ether_ioctl(ifp, cmd, data);
909 }
910 break;
911
912 case SIOCSIFMTU:
913 QL_DPRINT4(ha, (ha->pci_dev, "%s: SIOCSIFMTU (0x%lx)\n",
914 __func__, cmd));
915
916 if (ifr->ifr_mtu > QLA_MAX_MTU) {
917 ret = EINVAL;
918 } else {
919 (void) QLA_LOCK(ha, __func__, 0);
920 ifp->if_mtu = ifr->ifr_mtu;
921 ha->max_frame_size =
922 ifp->if_mtu + ETHER_HDR_LEN + ETHER_CRC_LEN;
923 if ((ifp->if_drv_flags & IFF_DRV_RUNNING)) {
924 ret = ql_set_max_mtu(ha, ha->max_frame_size,
925 ha->hw.rcv_cntxt_id);
926 }
927
928 if (ifp->if_mtu > ETHERMTU)
929 ha->std_replenish = QL_JUMBO_REPLENISH_THRES;
930 else
931 ha->std_replenish = QL_STD_REPLENISH_THRES;
932
933
934 QLA_UNLOCK(ha, __func__);
935
936 if (ret)
937 ret = EINVAL;
938 }
939
940 break;
941
942 case SIOCSIFFLAGS:
943 QL_DPRINT4(ha, (ha->pci_dev, "%s: SIOCSIFFLAGS (0x%lx)\n",
944 __func__, cmd));
945
946 (void)QLA_LOCK(ha, __func__, 0);
947
948 if (ifp->if_flags & IFF_UP) {
949 if ((ifp->if_drv_flags & IFF_DRV_RUNNING)) {
950 if ((ifp->if_flags ^ ha->if_flags) &
951 IFF_PROMISC) {
952 ret = ql_set_promisc(ha);
953 } else if ((ifp->if_flags ^ ha->if_flags) &
954 IFF_ALLMULTI) {
955 ret = ql_set_allmulti(ha);
956 }
957 } else {
958 qla_init_locked(ha);
959 ha->max_frame_size = ifp->if_mtu +
960 ETHER_HDR_LEN + ETHER_CRC_LEN;
961 ret = ql_set_max_mtu(ha, ha->max_frame_size,
962 ha->hw.rcv_cntxt_id);
963 }
964 } else {
965 if (ifp->if_drv_flags & IFF_DRV_RUNNING)
966 qla_stop(ha);
967 ha->if_flags = ifp->if_flags;
968 }
969
970 QLA_UNLOCK(ha, __func__);
971 break;
972
973 case SIOCADDMULTI:
974 QL_DPRINT4(ha, (ha->pci_dev,
975 "%s: %s (0x%lx)\n", __func__, "SIOCADDMULTI", cmd));
976
977 if (ifp->if_drv_flags & IFF_DRV_RUNNING) {
978 if (qla_set_multi(ha, 1))
979 ret = EINVAL;
980 }
981 break;
982
983 case SIOCDELMULTI:
984 QL_DPRINT4(ha, (ha->pci_dev,
985 "%s: %s (0x%lx)\n", __func__, "SIOCDELMULTI", cmd));
986
987 if (ifp->if_drv_flags & IFF_DRV_RUNNING) {
988 if (qla_set_multi(ha, 0))
989 ret = EINVAL;
990 }
991 break;
992
993 case SIOCSIFMEDIA:
994 case SIOCGIFMEDIA:
995 QL_DPRINT4(ha, (ha->pci_dev,
996 "%s: SIOCSIFMEDIA/SIOCGIFMEDIA (0x%lx)\n",
997 __func__, cmd));
998 ret = ifmedia_ioctl(ifp, ifr, &ha->media, cmd);
999 break;
1000
1001 case SIOCSIFCAP:
1002 {
1003 int mask = ifr->ifr_reqcap ^ ifp->if_capenable;
1004
1005 QL_DPRINT4(ha, (ha->pci_dev, "%s: SIOCSIFCAP (0x%lx)\n",
1006 __func__, cmd));
1007
1008 if (mask & IFCAP_HWCSUM)
1009 ifp->if_capenable ^= IFCAP_HWCSUM;
1010 if (mask & IFCAP_TSO4)
1011 ifp->if_capenable ^= IFCAP_TSO4;
1012 if (mask & IFCAP_VLAN_HWTAGGING)
1013 ifp->if_capenable ^= IFCAP_VLAN_HWTAGGING;
1014 if (mask & IFCAP_VLAN_HWTSO)
1015 ifp->if_capenable ^= IFCAP_VLAN_HWTSO;
1016
1017 if (!(ifp->if_drv_flags & IFF_DRV_RUNNING))
1018 qla_init(ha);
1019
1020 VLAN_CAPABILITIES(ifp);
1021 break;
1022 }
1023
1024 default:
1025 QL_DPRINT4(ha, (ha->pci_dev, "%s: default (0x%lx)\n",
1026 __func__, cmd));
1027 ret = ether_ioctl(ifp, cmd, data);
1028 break;
1029 }
1030
1031 return (ret);
1032 }
1033
1034 static int
qla_media_change(struct ifnet * ifp)1035 qla_media_change(struct ifnet *ifp)
1036 {
1037 qla_host_t *ha;
1038 struct ifmedia *ifm;
1039 int ret = 0;
1040
1041 ha = (qla_host_t *)ifp->if_softc;
1042
1043 QL_DPRINT2(ha, (ha->pci_dev, "%s: enter\n", __func__));
1044
1045 ifm = &ha->media;
1046
1047 if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER)
1048 ret = EINVAL;
1049
1050 QL_DPRINT2(ha, (ha->pci_dev, "%s: exit\n", __func__));
1051
1052 return (ret);
1053 }
1054
1055 static void
qla_media_status(struct ifnet * ifp,struct ifmediareq * ifmr)1056 qla_media_status(struct ifnet *ifp, struct ifmediareq *ifmr)
1057 {
1058 qla_host_t *ha;
1059
1060 ha = (qla_host_t *)ifp->if_softc;
1061
1062 QL_DPRINT2(ha, (ha->pci_dev, "%s: enter\n", __func__));
1063
1064 ifmr->ifm_status = IFM_AVALID;
1065 ifmr->ifm_active = IFM_ETHER;
1066
1067 ql_update_link_state(ha);
1068 if (ha->hw.link_up) {
1069 ifmr->ifm_status |= IFM_ACTIVE;
1070 ifmr->ifm_active |= (IFM_FDX | qla_get_optics(ha));
1071 }
1072
1073 QL_DPRINT2(ha, (ha->pci_dev, "%s: exit (%s)\n", __func__,\
1074 (ha->hw.link_up ? "link_up" : "link_down")));
1075
1076 return;
1077 }
1078
1079 static void
qla_start(struct ifnet * ifp)1080 qla_start(struct ifnet *ifp)
1081 {
1082 struct mbuf *m_head;
1083 qla_host_t *ha = (qla_host_t *)ifp->if_softc;
1084
1085 QL_DPRINT8(ha, (ha->pci_dev, "%s: enter\n", __func__));
1086
1087 if (!mtx_trylock(&ha->tx_lock)) {
1088 QL_DPRINT8(ha, (ha->pci_dev,
1089 "%s: mtx_trylock(&ha->tx_lock) failed\n", __func__));
1090 return;
1091 }
1092
1093 if ((ifp->if_drv_flags & (IFF_DRV_RUNNING | IFF_DRV_OACTIVE)) !=
1094 IFF_DRV_RUNNING) {
1095 QL_DPRINT8(ha,
1096 (ha->pci_dev, "%s: !IFF_DRV_RUNNING\n", __func__));
1097 QLA_TX_UNLOCK(ha);
1098 return;
1099 }
1100
1101 if (!ha->watchdog_ticks)
1102 ql_update_link_state(ha);
1103
1104 if (!ha->hw.link_up) {
1105 QL_DPRINT8(ha, (ha->pci_dev, "%s: link down\n", __func__));
1106 QLA_TX_UNLOCK(ha);
1107 return;
1108 }
1109
1110 while (ifp->if_snd.ifq_head != NULL) {
1111 IF_DEQUEUE(&ifp->if_snd, m_head);
1112
1113 if (m_head == NULL) {
1114 QL_DPRINT8(ha, (ha->pci_dev, "%s: m_head == NULL\n",
1115 __func__));
1116 break;
1117 }
1118
1119 if (qla_send(ha, &m_head)) {
1120 if (m_head == NULL)
1121 break;
1122 QL_DPRINT8(ha, (ha->pci_dev, "%s: PREPEND\n", __func__));
1123 ifp->if_drv_flags |= IFF_DRV_OACTIVE;
1124 IF_PREPEND(&ifp->if_snd, m_head);
1125 break;
1126 }
1127 /* Send a copy of the frame to the BPF listener */
1128 ETHER_BPF_MTAP(ifp, m_head);
1129 }
1130 QLA_TX_UNLOCK(ha);
1131 QL_DPRINT8(ha, (ha->pci_dev, "%s: exit\n", __func__));
1132 return;
1133 }
1134
1135 static int
qla_send(qla_host_t * ha,struct mbuf ** m_headp)1136 qla_send(qla_host_t *ha, struct mbuf **m_headp)
1137 {
1138 bus_dma_segment_t segs[QLA_MAX_SEGMENTS];
1139 bus_dmamap_t map;
1140 int nsegs;
1141 int ret = -1;
1142 uint32_t tx_idx;
1143 struct mbuf *m_head = *m_headp;
1144 uint32_t txr_idx = ha->txr_idx;
1145
1146 QL_DPRINT8(ha, (ha->pci_dev, "%s: enter\n", __func__));
1147
1148 /* check if flowid is set */
1149 if (M_HASHTYPE_GET(m_head) != M_HASHTYPE_NONE)
1150 txr_idx = m_head->m_pkthdr.flowid & (ha->hw.num_tx_rings - 1);
1151
1152 tx_idx = ha->hw.tx_cntxt[txr_idx].txr_next;
1153 map = ha->tx_ring[txr_idx].tx_buf[tx_idx].map;
1154
1155 ret = bus_dmamap_load_mbuf_sg(ha->tx_tag, map, m_head, segs, &nsegs,
1156 BUS_DMA_NOWAIT);
1157
1158 if (ret == EFBIG) {
1159
1160 struct mbuf *m;
1161
1162 QL_DPRINT8(ha, (ha->pci_dev, "%s: EFBIG [%d]\n", __func__,
1163 m_head->m_pkthdr.len));
1164
1165 m = m_defrag(m_head, M_NOWAIT);
1166 if (m == NULL) {
1167 ha->err_tx_defrag++;
1168 m_freem(m_head);
1169 *m_headp = NULL;
1170 device_printf(ha->pci_dev,
1171 "%s: m_defrag() = NULL [%d]\n",
1172 __func__, ret);
1173 return (ENOBUFS);
1174 }
1175 m_head = m;
1176 *m_headp = m_head;
1177
1178 if ((ret = bus_dmamap_load_mbuf_sg(ha->tx_tag, map, m_head,
1179 segs, &nsegs, BUS_DMA_NOWAIT))) {
1180
1181 ha->err_tx_dmamap_load++;
1182
1183 device_printf(ha->pci_dev,
1184 "%s: bus_dmamap_load_mbuf_sg failed0[%d, %d]\n",
1185 __func__, ret, m_head->m_pkthdr.len);
1186
1187 if (ret != ENOMEM) {
1188 m_freem(m_head);
1189 *m_headp = NULL;
1190 }
1191 return (ret);
1192 }
1193
1194 } else if (ret) {
1195
1196 ha->err_tx_dmamap_load++;
1197
1198 device_printf(ha->pci_dev,
1199 "%s: bus_dmamap_load_mbuf_sg failed1[%d, %d]\n",
1200 __func__, ret, m_head->m_pkthdr.len);
1201
1202 if (ret != ENOMEM) {
1203 m_freem(m_head);
1204 *m_headp = NULL;
1205 }
1206 return (ret);
1207 }
1208
1209 QL_ASSERT(ha, (nsegs != 0), ("qla_send: empty packet"));
1210
1211 bus_dmamap_sync(ha->tx_tag, map, BUS_DMASYNC_PREWRITE);
1212
1213 if (!(ret = ql_hw_send(ha, segs, nsegs, tx_idx, m_head, txr_idx))) {
1214
1215 ha->tx_ring[txr_idx].count++;
1216 ha->tx_ring[txr_idx].tx_buf[tx_idx].m_head = m_head;
1217 } else {
1218 if (ret == EINVAL) {
1219 if (m_head)
1220 m_freem(m_head);
1221 *m_headp = NULL;
1222 }
1223 }
1224
1225 QL_DPRINT8(ha, (ha->pci_dev, "%s: exit\n", __func__));
1226 return (ret);
1227 }
1228
1229 static void
qla_stop(qla_host_t * ha)1230 qla_stop(qla_host_t *ha)
1231 {
1232 struct ifnet *ifp = ha->ifp;
1233 device_t dev;
1234
1235 dev = ha->pci_dev;
1236
1237 ifp->if_drv_flags &= ~(IFF_DRV_OACTIVE | IFF_DRV_RUNNING);
1238
1239 ha->flags.qla_watchdog_pause = 1;
1240
1241 while (!ha->qla_watchdog_paused)
1242 qla_mdelay(__func__, 1);
1243
1244 ha->flags.stop_rcv = 1;
1245 ql_hw_stop_rcv(ha);
1246
1247 ql_del_hw_if(ha);
1248
1249 qla_free_xmt_bufs(ha);
1250 qla_free_rcv_bufs(ha);
1251
1252 return;
1253 }
1254
1255 /*
1256 * Buffer Management Functions for Transmit and Receive Rings
1257 */
1258 static int
qla_alloc_xmt_bufs(qla_host_t * ha)1259 qla_alloc_xmt_bufs(qla_host_t *ha)
1260 {
1261 int ret = 0;
1262 uint32_t i, j;
1263 qla_tx_buf_t *txb;
1264
1265 if (bus_dma_tag_create(NULL, /* parent */
1266 1, 0, /* alignment, bounds */
1267 BUS_SPACE_MAXADDR, /* lowaddr */
1268 BUS_SPACE_MAXADDR, /* highaddr */
1269 NULL, NULL, /* filter, filterarg */
1270 QLA_MAX_TSO_FRAME_SIZE, /* maxsize */
1271 QLA_MAX_SEGMENTS, /* nsegments */
1272 PAGE_SIZE, /* maxsegsize */
1273 BUS_DMA_ALLOCNOW, /* flags */
1274 NULL, /* lockfunc */
1275 NULL, /* lockfuncarg */
1276 &ha->tx_tag)) {
1277 device_printf(ha->pci_dev, "%s: tx_tag alloc failed\n",
1278 __func__);
1279 return (ENOMEM);
1280 }
1281
1282 for (i = 0; i < ha->hw.num_tx_rings; i++) {
1283 bzero((void *)ha->tx_ring[i].tx_buf,
1284 (sizeof(qla_tx_buf_t) * NUM_TX_DESCRIPTORS));
1285 }
1286
1287 for (j = 0; j < ha->hw.num_tx_rings; j++) {
1288 for (i = 0; i < NUM_TX_DESCRIPTORS; i++) {
1289
1290 txb = &ha->tx_ring[j].tx_buf[i];
1291
1292 if ((ret = bus_dmamap_create(ha->tx_tag,
1293 BUS_DMA_NOWAIT, &txb->map))) {
1294
1295 ha->err_tx_dmamap_create++;
1296 device_printf(ha->pci_dev,
1297 "%s: bus_dmamap_create failed[%d]\n",
1298 __func__, ret);
1299
1300 qla_free_xmt_bufs(ha);
1301
1302 return (ret);
1303 }
1304 }
1305 }
1306
1307 return 0;
1308 }
1309
1310 /*
1311 * Release mbuf after it sent on the wire
1312 */
1313 static void
qla_clear_tx_buf(qla_host_t * ha,qla_tx_buf_t * txb)1314 qla_clear_tx_buf(qla_host_t *ha, qla_tx_buf_t *txb)
1315 {
1316 QL_DPRINT2(ha, (ha->pci_dev, "%s: enter\n", __func__));
1317
1318 if (txb->m_head && txb->map) {
1319
1320 bus_dmamap_unload(ha->tx_tag, txb->map);
1321
1322 m_freem(txb->m_head);
1323 txb->m_head = NULL;
1324 }
1325
1326 if (txb->map)
1327 bus_dmamap_destroy(ha->tx_tag, txb->map);
1328
1329 QL_DPRINT2(ha, (ha->pci_dev, "%s: exit\n", __func__));
1330 }
1331
1332 static void
qla_free_xmt_bufs(qla_host_t * ha)1333 qla_free_xmt_bufs(qla_host_t *ha)
1334 {
1335 int i, j;
1336
1337 for (j = 0; j < ha->hw.num_tx_rings; j++) {
1338 for (i = 0; i < NUM_TX_DESCRIPTORS; i++)
1339 qla_clear_tx_buf(ha, &ha->tx_ring[j].tx_buf[i]);
1340 }
1341
1342 if (ha->tx_tag != NULL) {
1343 bus_dma_tag_destroy(ha->tx_tag);
1344 ha->tx_tag = NULL;
1345 }
1346
1347 for (i = 0; i < ha->hw.num_tx_rings; i++) {
1348 bzero((void *)ha->tx_ring[i].tx_buf,
1349 (sizeof(qla_tx_buf_t) * NUM_TX_DESCRIPTORS));
1350 }
1351 return;
1352 }
1353
1354
1355 static int
qla_alloc_rcv_std(qla_host_t * ha)1356 qla_alloc_rcv_std(qla_host_t *ha)
1357 {
1358 int i, j, k, r, ret = 0;
1359 qla_rx_buf_t *rxb;
1360 qla_rx_ring_t *rx_ring;
1361
1362 for (r = 0; r < ha->hw.num_rds_rings; r++) {
1363
1364 rx_ring = &ha->rx_ring[r];
1365
1366 for (i = 0; i < NUM_RX_DESCRIPTORS; i++) {
1367
1368 rxb = &rx_ring->rx_buf[i];
1369
1370 ret = bus_dmamap_create(ha->rx_tag, BUS_DMA_NOWAIT,
1371 &rxb->map);
1372
1373 if (ret) {
1374 device_printf(ha->pci_dev,
1375 "%s: dmamap[%d, %d] failed\n",
1376 __func__, r, i);
1377
1378 for (k = 0; k < r; k++) {
1379 for (j = 0; j < NUM_RX_DESCRIPTORS;
1380 j++) {
1381 rxb = &ha->rx_ring[k].rx_buf[j];
1382 bus_dmamap_destroy(ha->rx_tag,
1383 rxb->map);
1384 }
1385 }
1386
1387 for (j = 0; j < i; j++) {
1388 bus_dmamap_destroy(ha->rx_tag,
1389 rx_ring->rx_buf[j].map);
1390 }
1391 goto qla_alloc_rcv_std_err;
1392 }
1393 }
1394 }
1395
1396 qla_init_hw_rcv_descriptors(ha);
1397
1398
1399 for (r = 0; r < ha->hw.num_rds_rings; r++) {
1400
1401 rx_ring = &ha->rx_ring[r];
1402
1403 for (i = 0; i < NUM_RX_DESCRIPTORS; i++) {
1404 rxb = &rx_ring->rx_buf[i];
1405 rxb->handle = i;
1406 if (!(ret = ql_get_mbuf(ha, rxb, NULL))) {
1407 /*
1408 * set the physical address in the
1409 * corresponding descriptor entry in the
1410 * receive ring/queue for the hba
1411 */
1412 qla_set_hw_rcv_desc(ha, r, i, rxb->handle,
1413 rxb->paddr,
1414 (rxb->m_head)->m_pkthdr.len);
1415 } else {
1416 device_printf(ha->pci_dev,
1417 "%s: ql_get_mbuf [%d, %d] failed\n",
1418 __func__, r, i);
1419 bus_dmamap_destroy(ha->rx_tag, rxb->map);
1420 goto qla_alloc_rcv_std_err;
1421 }
1422 }
1423 }
1424 return 0;
1425
1426 qla_alloc_rcv_std_err:
1427 return (-1);
1428 }
1429
1430 static void
qla_free_rcv_std(qla_host_t * ha)1431 qla_free_rcv_std(qla_host_t *ha)
1432 {
1433 int i, r;
1434 qla_rx_buf_t *rxb;
1435
1436 for (r = 0; r < ha->hw.num_rds_rings; r++) {
1437 for (i = 0; i < NUM_RX_DESCRIPTORS; i++) {
1438 rxb = &ha->rx_ring[r].rx_buf[i];
1439 if (rxb->m_head != NULL) {
1440 bus_dmamap_unload(ha->rx_tag, rxb->map);
1441 bus_dmamap_destroy(ha->rx_tag, rxb->map);
1442 m_freem(rxb->m_head);
1443 rxb->m_head = NULL;
1444 }
1445 }
1446 }
1447 return;
1448 }
1449
1450 static int
qla_alloc_rcv_bufs(qla_host_t * ha)1451 qla_alloc_rcv_bufs(qla_host_t *ha)
1452 {
1453 int i, ret = 0;
1454
1455 if (bus_dma_tag_create(NULL, /* parent */
1456 1, 0, /* alignment, bounds */
1457 BUS_SPACE_MAXADDR, /* lowaddr */
1458 BUS_SPACE_MAXADDR, /* highaddr */
1459 NULL, NULL, /* filter, filterarg */
1460 MJUM9BYTES, /* maxsize */
1461 1, /* nsegments */
1462 MJUM9BYTES, /* maxsegsize */
1463 BUS_DMA_ALLOCNOW, /* flags */
1464 NULL, /* lockfunc */
1465 NULL, /* lockfuncarg */
1466 &ha->rx_tag)) {
1467
1468 device_printf(ha->pci_dev, "%s: rx_tag alloc failed\n",
1469 __func__);
1470
1471 return (ENOMEM);
1472 }
1473
1474 bzero((void *)ha->rx_ring, (sizeof(qla_rx_ring_t) * MAX_RDS_RINGS));
1475
1476 for (i = 0; i < ha->hw.num_sds_rings; i++) {
1477 ha->hw.sds[i].sdsr_next = 0;
1478 ha->hw.sds[i].rxb_free = NULL;
1479 ha->hw.sds[i].rx_free = 0;
1480 }
1481
1482 ret = qla_alloc_rcv_std(ha);
1483
1484 return (ret);
1485 }
1486
1487 static void
qla_free_rcv_bufs(qla_host_t * ha)1488 qla_free_rcv_bufs(qla_host_t *ha)
1489 {
1490 int i;
1491
1492 qla_free_rcv_std(ha);
1493
1494 if (ha->rx_tag != NULL) {
1495 bus_dma_tag_destroy(ha->rx_tag);
1496 ha->rx_tag = NULL;
1497 }
1498
1499 bzero((void *)ha->rx_ring, (sizeof(qla_rx_ring_t) * MAX_RDS_RINGS));
1500
1501 for (i = 0; i < ha->hw.num_sds_rings; i++) {
1502 ha->hw.sds[i].sdsr_next = 0;
1503 ha->hw.sds[i].rxb_free = NULL;
1504 ha->hw.sds[i].rx_free = 0;
1505 }
1506
1507 return;
1508 }
1509
1510 int
ql_get_mbuf(qla_host_t * ha,qla_rx_buf_t * rxb,struct mbuf * nmp)1511 ql_get_mbuf(qla_host_t *ha, qla_rx_buf_t *rxb, struct mbuf *nmp)
1512 {
1513 register struct mbuf *mp = nmp;
1514 struct ifnet *ifp;
1515 int ret = 0;
1516 uint32_t offset;
1517 bus_dma_segment_t segs[1];
1518 int nsegs;
1519
1520 QL_DPRINT2(ha, (ha->pci_dev, "%s: enter\n", __func__));
1521
1522 ifp = ha->ifp;
1523
1524 if (mp == NULL) {
1525
1526 mp = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR);
1527
1528 if (mp == NULL) {
1529 ha->err_m_getcl++;
1530 ret = ENOBUFS;
1531 device_printf(ha->pci_dev,
1532 "%s: m_getcl failed\n", __func__);
1533 goto exit_ql_get_mbuf;
1534 }
1535 mp->m_len = mp->m_pkthdr.len = MCLBYTES;
1536 } else {
1537 mp->m_len = mp->m_pkthdr.len = MCLBYTES;
1538 mp->m_data = mp->m_ext.ext_buf;
1539 mp->m_next = NULL;
1540 }
1541
1542 offset = (uint32_t)((unsigned long long)mp->m_data & 0x7ULL);
1543 if (offset) {
1544 offset = 8 - offset;
1545 m_adj(mp, offset);
1546 }
1547
1548 /*
1549 * Using memory from the mbuf cluster pool, invoke the bus_dma
1550 * machinery to arrange the memory mapping.
1551 */
1552 ret = bus_dmamap_load_mbuf_sg(ha->rx_tag, rxb->map,
1553 mp, segs, &nsegs, BUS_DMA_NOWAIT);
1554 rxb->paddr = segs[0].ds_addr;
1555
1556 if (ret || !rxb->paddr || (nsegs != 1)) {
1557 m_free(mp);
1558 rxb->m_head = NULL;
1559 device_printf(ha->pci_dev,
1560 "%s: bus_dmamap_load failed[%d, 0x%016llx, %d]\n",
1561 __func__, ret, (long long unsigned int)rxb->paddr,
1562 nsegs);
1563 ret = -1;
1564 goto exit_ql_get_mbuf;
1565 }
1566 rxb->m_head = mp;
1567 bus_dmamap_sync(ha->rx_tag, rxb->map, BUS_DMASYNC_PREREAD);
1568
1569 exit_ql_get_mbuf:
1570 QL_DPRINT2(ha, (ha->pci_dev, "%s: exit ret = 0x%08x\n", __func__, ret));
1571 return (ret);
1572 }
1573
1574 static void
qla_tx_done(void * context,int pending)1575 qla_tx_done(void *context, int pending)
1576 {
1577 qla_host_t *ha = context;
1578 struct ifnet *ifp;
1579
1580 ifp = ha->ifp;
1581
1582 if (!ifp)
1583 return;
1584
1585 if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) {
1586 QL_DPRINT8(ha, (ha->pci_dev, "%s: !IFF_DRV_RUNNING\n", __func__));
1587 return;
1588 }
1589 ql_hw_tx_done(ha);
1590
1591 qla_start(ha->ifp);
1592 }
1593
1594 static void
qla_get_peer(qla_host_t * ha)1595 qla_get_peer(qla_host_t *ha)
1596 {
1597 device_t *peers;
1598 int count, i, slot;
1599 int my_slot = pci_get_slot(ha->pci_dev);
1600
1601 if (device_get_children(device_get_parent(ha->pci_dev), &peers, &count))
1602 return;
1603
1604 for (i = 0; i < count; i++) {
1605 slot = pci_get_slot(peers[i]);
1606
1607 if ((slot >= 0) && (slot == my_slot) &&
1608 (pci_get_device(peers[i]) ==
1609 pci_get_device(ha->pci_dev))) {
1610 if (ha->pci_dev != peers[i])
1611 ha->peer_dev = peers[i];
1612 }
1613 }
1614 }
1615
1616 static void
qla_send_msg_to_peer(qla_host_t * ha,uint32_t msg_to_peer)1617 qla_send_msg_to_peer(qla_host_t *ha, uint32_t msg_to_peer)
1618 {
1619 qla_host_t *ha_peer;
1620
1621 if (ha->peer_dev) {
1622 if ((ha_peer = device_get_softc(ha->peer_dev)) != NULL) {
1623
1624 ha_peer->msg_from_peer = msg_to_peer;
1625 }
1626 }
1627 }
1628
1629 static void
qla_error_recovery(void * context,int pending)1630 qla_error_recovery(void *context, int pending)
1631 {
1632 qla_host_t *ha = context;
1633 uint32_t msecs_100 = 100;
1634 struct ifnet *ifp = ha->ifp;
1635
1636 (void)QLA_LOCK(ha, __func__, 0);
1637
1638 ha->flags.stop_rcv = 1;
1639
1640 ql_hw_stop_rcv(ha);
1641
1642 ifp->if_drv_flags &= ~(IFF_DRV_OACTIVE | IFF_DRV_RUNNING);
1643
1644 QLA_UNLOCK(ha, __func__);
1645
1646 if ((ha->pci_func & 0x1) == 0) {
1647
1648 if (!ha->msg_from_peer) {
1649 qla_send_msg_to_peer(ha, QL_PEER_MSG_RESET);
1650
1651 while ((ha->msg_from_peer != QL_PEER_MSG_ACK) &&
1652 msecs_100--)
1653 qla_mdelay(__func__, 100);
1654 }
1655
1656 ha->msg_from_peer = 0;
1657
1658 ql_minidump(ha);
1659
1660 (void) ql_init_hw(ha);
1661 qla_free_xmt_bufs(ha);
1662 qla_free_rcv_bufs(ha);
1663
1664 qla_send_msg_to_peer(ha, QL_PEER_MSG_ACK);
1665
1666 } else {
1667 if (ha->msg_from_peer == QL_PEER_MSG_RESET) {
1668
1669 ha->msg_from_peer = 0;
1670
1671 qla_send_msg_to_peer(ha, QL_PEER_MSG_ACK);
1672 } else {
1673 qla_send_msg_to_peer(ha, QL_PEER_MSG_RESET);
1674 }
1675
1676 while ((ha->msg_from_peer != QL_PEER_MSG_ACK) && msecs_100--)
1677 qla_mdelay(__func__, 100);
1678 ha->msg_from_peer = 0;
1679
1680 (void) ql_init_hw(ha);
1681 qla_free_xmt_bufs(ha);
1682 qla_free_rcv_bufs(ha);
1683 }
1684 (void)QLA_LOCK(ha, __func__, 0);
1685
1686 if (qla_alloc_xmt_bufs(ha) != 0) {
1687 QLA_UNLOCK(ha, __func__);
1688 return;
1689 }
1690
1691 if (qla_alloc_rcv_bufs(ha) != 0) {
1692 QLA_UNLOCK(ha, __func__);
1693 return;
1694 }
1695
1696 ha->flags.stop_rcv = 0;
1697 if (ql_init_hw_if(ha) == 0) {
1698 ifp = ha->ifp;
1699 ifp->if_drv_flags |= IFF_DRV_RUNNING;
1700 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
1701 ha->flags.qla_watchdog_pause = 0;
1702 }
1703
1704 QLA_UNLOCK(ha, __func__);
1705 }
1706
1707