1 /* $NetBSD: hpc_machdep.c,v 1.70 2003/09/16 08:18:22 agc Exp $ */
2
3 /*-
4 * Copyright (c) 1994-1998 Mark Brinicombe.
5 * Copyright (c) 1994 Brini.
6 * All rights reserved.
7 *
8 * This code is derived from software written for Brini by Mark Brinicombe
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by Brini.
21 * 4. The name of the company nor the name of the author may be used to
22 * endorse or promote products derived from this software without specific
23 * prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED
26 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
27 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
28 * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
29 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
30 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
31 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
35 * SUCH DAMAGE.
36 *
37 * RiscBSD kernel project
38 *
39 * machdep.c
40 *
41 * Machine dependant functions for kernel setup
42 *
43 * This file needs a lot of work.
44 *
45 * Created : 17/09/94
46 */
47
48 #include <sys/cdefs.h>
49 __FBSDID("$FreeBSD$");
50
51 #define _ARM32_BUS_DMA_PRIVATE
52 #include <sys/param.h>
53 #include <sys/systm.h>
54 #include <sys/sysproto.h>
55 #include <sys/signalvar.h>
56 #include <sys/imgact.h>
57 #include <sys/kernel.h>
58 #include <sys/ktr.h>
59 #include <sys/linker.h>
60 #include <sys/lock.h>
61 #include <sys/malloc.h>
62 #include <sys/mutex.h>
63 #include <sys/pcpu.h>
64 #include <sys/proc.h>
65 #include <sys/ptrace.h>
66 #include <sys/cons.h>
67 #include <sys/bio.h>
68 #include <sys/bus.h>
69 #include <sys/buf.h>
70 #include <sys/exec.h>
71 #include <sys/kdb.h>
72 #include <sys/msgbuf.h>
73 #include <machine/reg.h>
74 #include <machine/cpu.h>
75 #include <machine/physmem.h>
76
77 #include <vm/vm.h>
78 #include <vm/pmap.h>
79 #include <vm/vm_object.h>
80 #include <vm/vm_page.h>
81 #include <vm/vm_map.h>
82 #include <machine/devmap.h>
83 #include <machine/vmparam.h>
84 #include <machine/pcb.h>
85 #include <machine/undefined.h>
86 #include <machine/machdep.h>
87 #include <machine/metadata.h>
88 #include <machine/armreg.h>
89 #include <machine/bus.h>
90 #include <sys/reboot.h>
91
92 #include <arm/xscale/i80321/i80321reg.h>
93 #include <arm/xscale/i80321/i80321var.h>
94 #include <arm/xscale/i80321/iq80321reg.h>
95 #include <arm/xscale/i80321/obiovar.h>
96
97 #define KERNEL_PT_SYS 0 /* Page table for mapping proc0 zero page */
98 #define KERNEL_PT_IOPXS 1
99 #define KERNEL_PT_BEFOREKERN 2
100 #define KERNEL_PT_AFKERNEL 3 /* L2 table for mapping after kernel */
101 #define KERNEL_PT_AFKERNEL_NUM 9
102
103 /* this should be evenly divisable by PAGE_SIZE / L2_TABLE_SIZE_REAL (or 4) */
104 #define NUM_KERNEL_PTS (KERNEL_PT_AFKERNEL + KERNEL_PT_AFKERNEL_NUM)
105
106 struct pv_addr kernel_pt_table[NUM_KERNEL_PTS];
107
108 /* Physical and virtual addresses for some global pages */
109
110 struct pv_addr systempage;
111 struct pv_addr msgbufpv;
112 struct pv_addr irqstack;
113 struct pv_addr undstack;
114 struct pv_addr abtstack;
115 struct pv_addr kernelstack;
116 struct pv_addr minidataclean;
117
118 #define IQ80321_OBIO_BASE 0xfe800000UL
119 #define IQ80321_OBIO_SIZE 0x00100000UL
120 /* Static device mappings. */
121 static const struct arm_devmap_entry iq80321_devmap[] = {
122 /*
123 * Map the on-board devices VA == PA so that we can access them
124 * with the MMU on or off.
125 */
126 {
127 IQ80321_OBIO_BASE,
128 IQ80321_OBIO_BASE,
129 IQ80321_OBIO_SIZE,
130 VM_PROT_READ|VM_PROT_WRITE,
131 PTE_DEVICE,
132 },
133 {
134 IQ80321_IOW_VBASE,
135 VERDE_OUT_XLATE_IO_WIN0_BASE,
136 VERDE_OUT_XLATE_IO_WIN_SIZE,
137 VM_PROT_READ|VM_PROT_WRITE,
138 PTE_DEVICE,
139 },
140
141 {
142 IQ80321_80321_VBASE,
143 VERDE_PMMR_BASE,
144 VERDE_PMMR_SIZE,
145 VM_PROT_READ|VM_PROT_WRITE,
146 PTE_DEVICE,
147 },
148 {
149 0,
150 0,
151 0,
152 0,
153 0,
154 }
155 };
156
157 #define SDRAM_START 0xa0000000
158
159 extern vm_offset_t xscale_cache_clean_addr;
160
161 void *
initarm(struct arm_boot_params * abp)162 initarm(struct arm_boot_params *abp)
163 {
164 struct pv_addr kernel_l1pt;
165 struct pv_addr dpcpu;
166 int loop, i;
167 u_int l1pagetable;
168 vm_offset_t freemempos;
169 vm_offset_t freemem_pt;
170 vm_offset_t afterkern;
171 vm_offset_t freemem_after;
172 vm_offset_t lastaddr;
173 uint32_t memsize, memstart;
174
175 lastaddr = parse_boot_param(abp);
176 arm_physmem_kernaddr = abp->abp_physaddr;
177 set_cpufuncs();
178 pcpu_init(pcpup, 0, sizeof(struct pcpu));
179 PCPU_SET(curthread, &thread0);
180
181 /* Do basic tuning, hz etc */
182 init_param1();
183
184 freemempos = 0xa0200000;
185 /* Define a macro to simplify memory allocation */
186 #define valloc_pages(var, np) \
187 alloc_pages((var).pv_pa, (np)); \
188 (var).pv_va = (var).pv_pa + 0x20000000;
189
190 #define alloc_pages(var, np) \
191 freemempos -= (np * PAGE_SIZE); \
192 (var) = freemempos; \
193 memset((char *)(var), 0, ((np) * PAGE_SIZE));
194
195 while (((freemempos - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) != 0)
196 freemempos -= PAGE_SIZE;
197 valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE);
198 for (loop = 0; loop < NUM_KERNEL_PTS; ++loop) {
199 if (!(loop % (PAGE_SIZE / L2_TABLE_SIZE_REAL))) {
200 valloc_pages(kernel_pt_table[loop],
201 L2_TABLE_SIZE / PAGE_SIZE);
202 } else {
203 kernel_pt_table[loop].pv_pa = freemempos +
204 (loop % (PAGE_SIZE / L2_TABLE_SIZE_REAL)) *
205 L2_TABLE_SIZE_REAL;
206 kernel_pt_table[loop].pv_va =
207 kernel_pt_table[loop].pv_pa + 0x20000000;
208 }
209 }
210 freemem_pt = freemempos;
211 freemempos = 0xa0100000;
212 /*
213 * Allocate a page for the system page mapped to V0x00000000
214 * This page will just contain the system vectors and can be
215 * shared by all processes.
216 */
217 valloc_pages(systempage, 1);
218
219 /* Allocate dynamic per-cpu area. */
220 valloc_pages(dpcpu, DPCPU_SIZE / PAGE_SIZE);
221 dpcpu_init((void *)dpcpu.pv_va, 0);
222
223 /* Allocate stacks for all modes */
224 valloc_pages(irqstack, IRQ_STACK_SIZE);
225 valloc_pages(abtstack, ABT_STACK_SIZE);
226 valloc_pages(undstack, UND_STACK_SIZE);
227 valloc_pages(kernelstack, KSTACK_PAGES);
228 alloc_pages(minidataclean.pv_pa, 1);
229 valloc_pages(msgbufpv, round_page(msgbufsize) / PAGE_SIZE);
230 /*
231 * Allocate memory for the l1 and l2 page tables. The scheme to avoid
232 * wasting memory by allocating the l1pt on the first 16k memory was
233 * taken from NetBSD rpc_machdep.c. NKPT should be greater than 12 for
234 * this to work (which is supposed to be the case).
235 */
236
237 /*
238 * Now we start construction of the L1 page table
239 * We start by mapping the L2 page tables into the L1.
240 * This means that we can replace L1 mappings later on if necessary
241 */
242 l1pagetable = kernel_l1pt.pv_va;
243
244 /* Map the L2 pages tables in the L1 page table */
245 pmap_link_l2pt(l1pagetable, ARM_VECTORS_HIGH & ~(0x00100000 - 1),
246 &kernel_pt_table[KERNEL_PT_SYS]);
247 pmap_link_l2pt(l1pagetable, IQ80321_IOPXS_VBASE,
248 &kernel_pt_table[KERNEL_PT_IOPXS]);
249 pmap_link_l2pt(l1pagetable, KERNBASE,
250 &kernel_pt_table[KERNEL_PT_BEFOREKERN]);
251 pmap_map_chunk(l1pagetable, KERNBASE, SDRAM_START, 0x100000,
252 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
253 pmap_map_chunk(l1pagetable, KERNBASE + 0x100000, SDRAM_START + 0x100000,
254 0x100000, VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
255 pmap_map_chunk(l1pagetable, KERNBASE + 0x200000, SDRAM_START + 0x200000,
256 (((uint32_t)(lastaddr) - KERNBASE - 0x200000) + L1_S_SIZE) & ~(L1_S_SIZE - 1),
257 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
258 freemem_after = ((int)lastaddr + PAGE_SIZE) & ~(PAGE_SIZE - 1);
259 afterkern = round_page(((vm_offset_t)lastaddr + L1_S_SIZE) & ~(L1_S_SIZE
260 - 1));
261 for (i = 0; i < KERNEL_PT_AFKERNEL_NUM; i++) {
262 pmap_link_l2pt(l1pagetable, afterkern + i * 0x00100000,
263 &kernel_pt_table[KERNEL_PT_AFKERNEL + i]);
264 }
265 pmap_map_entry(l1pagetable, afterkern, minidataclean.pv_pa,
266 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
267
268
269 /* Map the Mini-Data cache clean area. */
270 xscale_setup_minidata(l1pagetable, afterkern,
271 minidataclean.pv_pa);
272
273 /* Map the vector page. */
274 pmap_map_entry(l1pagetable, ARM_VECTORS_HIGH, systempage.pv_pa,
275 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
276 arm_devmap_bootstrap(l1pagetable, iq80321_devmap);
277 /*
278 * Give the XScale global cache clean code an appropriately
279 * sized chunk of unmapped VA space starting at 0xff000000
280 * (our device mappings end before this address).
281 */
282 xscale_cache_clean_addr = 0xff000000U;
283
284 cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT);
285 setttb(kernel_l1pt.pv_pa);
286 cpu_tlb_flushID();
287 cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2));
288 /*
289 * Pages were allocated during the secondary bootstrap for the
290 * stacks for different CPU modes.
291 * We must now set the r13 registers in the different CPU modes to
292 * point to these stacks.
293 * Since the ARM stacks use STMFD etc. we must set r13 to the top end
294 * of the stack memory.
295 */
296 set_stackptrs(0);
297
298 /*
299 * We must now clean the cache again....
300 * Cleaning may be done by reading new data to displace any
301 * dirty data in the cache. This will have happened in setttb()
302 * but since we are boot strapping the addresses used for the read
303 * may have just been remapped and thus the cache could be out
304 * of sync. A re-clean after the switch will cure this.
305 * After booting there are no gross relocations of the kernel thus
306 * this problem will not occur after initarm().
307 */
308 cpu_idcache_wbinv_all();
309 cpu_setup("");
310
311 /*
312 * Fetch the SDRAM start/size from the i80321 SDRAM configration
313 * registers.
314 */
315 i80321_calibrate_delay();
316 i80321_sdram_bounds(obio_bs_tag, IQ80321_80321_VBASE + VERDE_MCU_BASE,
317 &memstart, &memsize);
318 physmem = memsize / PAGE_SIZE;
319 cninit();
320
321 undefined_init();
322
323 init_proc0(kernelstack.pv_va);
324
325 /* Enable MMU, I-cache, D-cache, write buffer. */
326
327 arm_vector_init(ARM_VECTORS_HIGH, ARM_VEC_ALL);
328 pmap_curmaxkvaddr = afterkern + PAGE_SIZE;
329 vm_max_kernel_address = 0xd0000000;
330 pmap_bootstrap(pmap_curmaxkvaddr, &kernel_l1pt);
331 msgbufp = (void*)msgbufpv.pv_va;
332 msgbufinit(msgbufp, msgbufsize);
333 mutex_init();
334
335 /*
336 * Add the physical ram we have available.
337 *
338 * Exclude the kernel (and all the things we allocated which immediately
339 * follow the kernel) from the VM allocation pool but not from crash
340 * dumps. virtual_avail is a global variable which tracks the kva we've
341 * "allocated" while setting up pmaps.
342 *
343 * Prepare the list of physical memory available to the vm subsystem.
344 */
345 arm_physmem_hardware_region(SDRAM_START, memsize);
346 arm_physmem_exclude_region(abp->abp_physaddr,
347 virtual_avail - KERNVIRTADDR, EXFLAG_NOALLOC);
348 arm_physmem_init_kernel_globals();
349
350 init_param2(physmem);
351 kdb_init();
352 return ((void *)(kernelstack.pv_va + USPACE_SVC_STACK_TOP -
353 sizeof(struct pcb)));
354 }
355
356 extern int
machdep_pci_route_interrupt(device_t pcib,device_t dev,int pin)357 machdep_pci_route_interrupt(device_t pcib, device_t dev, int pin)
358 {
359 int bus;
360 int device;
361 int func;
362 uint32_t busno;
363 struct i80321_pci_softc *sc = device_get_softc(pcib);
364 bus = pci_get_bus(dev);
365 device = pci_get_slot(dev);
366 func = pci_get_function(dev);
367 busno = bus_space_read_4(sc->sc_st, sc->sc_atu_sh, ATU_PCIXSR);
368 busno = PCIXSR_BUSNO(busno);
369 if (busno == 0xff)
370 busno = 0;
371 if (bus != busno)
372 goto no_mapping;
373 switch (device) {
374 /* IQ31244 PCI */
375 case 1: /* PCIX-PCIX bridge */
376 /*
377 * The S-ATA chips are behind the bridge, and all of
378 * the S-ATA interrupts are wired together.
379 */
380 return (ICU_INT_XINT(2));
381 case 2: /* PCI slot */
382 /* All pins are wired together. */
383 return (ICU_INT_XINT(3));
384 case 3: /* i82546 dual Gig-E */
385 if (pin == 1 || pin == 2)
386 return (ICU_INT_XINT(0));
387 goto no_mapping;
388 /* IQ80321 PCI */
389 case 4: /* i82544 Gig-E */
390 case 8: /*
391 * Apparently you can set the device for the ethernet adapter
392 * to 8 with a jumper, so handle that as well
393 */
394 if (pin == 1)
395 return (ICU_INT_XINT(0));
396 goto no_mapping;
397 case 6: /* S-PCI-X slot */
398 if (pin == 1)
399 return (ICU_INT_XINT(2));
400 if (pin == 2)
401 return (ICU_INT_XINT(3));
402 goto no_mapping;
403 default:
404 no_mapping:
405 printf("No mapping for %d/%d/%d/%c\n", bus, device, func, pin);
406
407 }
408 return (0);
409
410 }
411