1 /*-
2 * Copyright (c) 1994-1998 Mark Brinicombe.
3 * Copyright (c) 1994 Brini.
4 * All rights reserved.
5 *
6 * This code is derived from software written for Brini by Mark Brinicombe
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. All advertising materials mentioning features or use of this software
17 * must display the following acknowledgement:
18 * This product includes software developed by Brini.
19 * 4. The name of the company nor the name of the author may be used to
20 * endorse or promote products derived from this software without specific
21 * prior written permission.
22 *
23 * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED
24 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
25 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
26 * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
27 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
29 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
30 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
31 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
32 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33 * SUCH DAMAGE.
34 *
35 * RiscBSD kernel project
36 *
37 * machdep.c
38 *
39 * Machine dependant functions for kernel setup
40 *
41 * This file needs a lot of work.
42 *
43 * Created : 17/09/94
44 */
45
46 #include "opt_ddb.h"
47
48 #include <sys/cdefs.h>
49 __FBSDID("$FreeBSD$");
50
51 #define _ARM32_BUS_DMA_PRIVATE
52 #include <sys/param.h>
53 #include <sys/systm.h>
54 #include <sys/sysproto.h>
55 #include <sys/signalvar.h>
56 #include <sys/imgact.h>
57 #include <sys/kernel.h>
58 #include <sys/ktr.h>
59 #include <sys/linker.h>
60 #include <sys/lock.h>
61 #include <sys/malloc.h>
62 #include <sys/mutex.h>
63 #include <sys/pcpu.h>
64 #include <sys/proc.h>
65 #include <sys/ptrace.h>
66 #include <sys/cons.h>
67 #include <sys/bio.h>
68 #include <sys/bus.h>
69 #include <sys/buf.h>
70 #include <sys/exec.h>
71 #include <sys/kdb.h>
72 #include <sys/msgbuf.h>
73 #include <machine/physmem.h>
74 #include <machine/reg.h>
75 #include <machine/cpu.h>
76
77 #include <vm/vm.h>
78 #include <vm/pmap.h>
79 #include <vm/vm_object.h>
80 #include <vm/vm_page.h>
81 #include <vm/vm_map.h>
82 #include <machine/devmap.h>
83 #include <machine/vmparam.h>
84 #include <machine/pcb.h>
85 #include <machine/undefined.h>
86 #include <machine/machdep.h>
87 #include <machine/metadata.h>
88 #include <machine/armreg.h>
89 #include <machine/bus.h>
90 #include <sys/reboot.h>
91
92 #include <arm/samsung/s3c2xx0/s3c24x0var.h>
93 #include <arm/samsung/s3c2xx0/s3c2410reg.h>
94 #include <arm/samsung/s3c2xx0/s3c2xx0board.h>
95
96 /* Page table for mapping proc0 zero page */
97 #define KERNEL_PT_SYS 0
98 #define KERNEL_PT_KERN 1
99 #define KERNEL_PT_KERN_NUM 44
100 /* L2 table for mapping after kernel */
101 #define KERNEL_PT_AFKERNEL KERNEL_PT_KERN + KERNEL_PT_KERN_NUM
102 #define KERNEL_PT_AFKERNEL_NUM 5
103
104 /* this should be evenly divisable by PAGE_SIZE / L2_TABLE_SIZE_REAL (or 4) */
105 #define NUM_KERNEL_PTS (KERNEL_PT_AFKERNEL + KERNEL_PT_AFKERNEL_NUM)
106
107 extern int s3c2410_pclk;
108
109 struct pv_addr kernel_pt_table[NUM_KERNEL_PTS];
110
111 /* Physical and virtual addresses for some global pages */
112
113 struct pv_addr systempage;
114 struct pv_addr msgbufpv;
115 struct pv_addr irqstack;
116 struct pv_addr undstack;
117 struct pv_addr abtstack;
118 struct pv_addr kernelstack;
119
120 #define _A(a) ((a) & ~L1_S_OFFSET)
121 #define _S(s) (((s) + L1_S_SIZE - 1) & ~(L1_S_SIZE-1))
122
123 /* Static device mappings. */
124 static const struct arm_devmap_entry s3c24x0_devmap[] = {
125 /*
126 * Map the devices we need early on.
127 */
128 {
129 _A(S3C24X0_CLKMAN_BASE),
130 _A(S3C24X0_CLKMAN_PA_BASE),
131 _S(S3C24X0_CLKMAN_SIZE),
132 VM_PROT_READ|VM_PROT_WRITE,
133 PTE_DEVICE,
134 },
135 {
136 _A(S3C24X0_GPIO_BASE),
137 _A(S3C24X0_GPIO_PA_BASE),
138 _S(S3C2410_GPIO_SIZE),
139 VM_PROT_READ|VM_PROT_WRITE,
140 PTE_DEVICE,
141 },
142 {
143 _A(S3C24X0_INTCTL_BASE),
144 _A(S3C24X0_INTCTL_PA_BASE),
145 _S(S3C24X0_INTCTL_SIZE),
146 VM_PROT_READ|VM_PROT_WRITE,
147 PTE_DEVICE,
148 },
149 {
150 _A(S3C24X0_TIMER_BASE),
151 _A(S3C24X0_TIMER_PA_BASE),
152 _S(S3C24X0_TIMER_SIZE),
153 VM_PROT_READ|VM_PROT_WRITE,
154 PTE_DEVICE,
155 },
156 {
157 _A(S3C24X0_UART0_BASE),
158 _A(S3C24X0_UART0_PA_BASE),
159 _S(S3C24X0_UART_PA_BASE(3) - S3C24X0_UART0_PA_BASE),
160 VM_PROT_READ|VM_PROT_WRITE,
161 PTE_DEVICE,
162 },
163 {
164 _A(S3C24X0_WDT_BASE),
165 _A(S3C24X0_WDT_PA_BASE),
166 _S(S3C24X0_WDT_SIZE),
167 VM_PROT_READ|VM_PROT_WRITE,
168 PTE_DEVICE,
169 },
170 {
171 0,
172 0,
173 0,
174 0,
175 0,
176 }
177 };
178
179 #undef _A
180 #undef _S
181
182 #define ioreg_read32(a) (*(volatile uint32_t *)(a))
183 #define ioreg_write32(a,v) (*(volatile uint32_t *)(a)=(v))
184
185 struct arm32_dma_range s3c24x0_range = {
186 .dr_sysbase = 0,
187 .dr_busbase = 0,
188 .dr_len = 0,
189 };
190
191 struct arm32_dma_range *
bus_dma_get_range(void)192 bus_dma_get_range(void)
193 {
194
195 if (s3c24x0_range.dr_len == 0) {
196 s3c24x0_range.dr_sysbase = dump_avail[0];
197 s3c24x0_range.dr_busbase = dump_avail[0];
198 s3c24x0_range.dr_len = dump_avail[1] - dump_avail[0];
199 }
200 return (&s3c24x0_range);
201 }
202
203 int
bus_dma_get_range_nb(void)204 bus_dma_get_range_nb(void)
205 {
206 return (1);
207 }
208
209 void *
initarm(struct arm_boot_params * abp)210 initarm(struct arm_boot_params *abp)
211 {
212 struct pv_addr kernel_l1pt;
213 int loop;
214 u_int l1pagetable;
215 vm_offset_t freemempos;
216 vm_offset_t afterkern;
217 vm_offset_t lastaddr;
218
219 int i;
220 uint32_t memsize;
221
222 boothowto = 0; /* Likely not needed */
223 lastaddr = parse_boot_param(abp);
224 arm_physmem_kernaddr = abp->abp_physaddr;
225 i = 0;
226 set_cpufuncs();
227 cpufuncs.cf_sleep = s3c24x0_sleep;
228
229 pcpu0_init();
230
231 /* Do basic tuning, hz etc */
232 init_param1();
233
234 #define KERNEL_TEXT_BASE (KERNBASE)
235 freemempos = (lastaddr + PAGE_MASK) & ~PAGE_MASK;
236 /* Define a macro to simplify memory allocation */
237 #define valloc_pages(var, np) \
238 alloc_pages((var).pv_va, (np)); \
239 (var).pv_pa = (var).pv_va + (abp->abp_physaddr - KERNVIRTADDR);
240
241 #define alloc_pages(var, np) \
242 (var) = freemempos; \
243 freemempos += (np * PAGE_SIZE); \
244 memset((char *)(var), 0, ((np) * PAGE_SIZE));
245
246 while (((freemempos - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) != 0)
247 freemempos += PAGE_SIZE;
248 valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE);
249 for (loop = 0; loop < NUM_KERNEL_PTS; ++loop) {
250 if (!(loop % (PAGE_SIZE / L2_TABLE_SIZE_REAL))) {
251 valloc_pages(kernel_pt_table[loop],
252 L2_TABLE_SIZE / PAGE_SIZE);
253 } else {
254 kernel_pt_table[loop].pv_va = freemempos -
255 (loop % (PAGE_SIZE / L2_TABLE_SIZE_REAL)) *
256 L2_TABLE_SIZE_REAL;
257 kernel_pt_table[loop].pv_pa =
258 kernel_pt_table[loop].pv_va - KERNVIRTADDR +
259 abp->abp_physaddr;
260 }
261 }
262 /*
263 * Allocate a page for the system page mapped to V0x00000000
264 * This page will just contain the system vectors and can be
265 * shared by all processes.
266 */
267 valloc_pages(systempage, 1);
268
269 /* Allocate stacks for all modes */
270 valloc_pages(irqstack, IRQ_STACK_SIZE);
271 valloc_pages(abtstack, ABT_STACK_SIZE);
272 valloc_pages(undstack, UND_STACK_SIZE);
273 valloc_pages(kernelstack, KSTACK_PAGES);
274 valloc_pages(msgbufpv, round_page(msgbufsize) / PAGE_SIZE);
275 /*
276 * Now we start construction of the L1 page table
277 * We start by mapping the L2 page tables into the L1.
278 * This means that we can replace L1 mappings later on if necessary
279 */
280 l1pagetable = kernel_l1pt.pv_va;
281
282 /* Map the L2 pages tables in the L1 page table */
283 pmap_link_l2pt(l1pagetable, ARM_VECTORS_HIGH,
284 &kernel_pt_table[KERNEL_PT_SYS]);
285 for (i = 0; i < KERNEL_PT_KERN_NUM; i++)
286 pmap_link_l2pt(l1pagetable, KERNBASE + i * L1_S_SIZE,
287 &kernel_pt_table[KERNEL_PT_KERN + i]);
288 pmap_map_chunk(l1pagetable, KERNBASE, PHYSADDR,
289 (((uint32_t)(lastaddr) - KERNBASE) + PAGE_SIZE) & ~(PAGE_SIZE - 1),
290 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
291 afterkern = round_page((lastaddr + L1_S_SIZE) & ~(L1_S_SIZE
292 - 1));
293 for (i = 0; i < KERNEL_PT_AFKERNEL_NUM; i++) {
294 pmap_link_l2pt(l1pagetable, afterkern + i * L1_S_SIZE,
295 &kernel_pt_table[KERNEL_PT_AFKERNEL + i]);
296 }
297
298 /* Map the vector page. */
299 pmap_map_entry(l1pagetable, ARM_VECTORS_HIGH, systempage.pv_pa,
300 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
301 /* Map the stack pages */
302 pmap_map_chunk(l1pagetable, irqstack.pv_va, irqstack.pv_pa,
303 IRQ_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
304 pmap_map_chunk(l1pagetable, abtstack.pv_va, abtstack.pv_pa,
305 ABT_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
306 pmap_map_chunk(l1pagetable, undstack.pv_va, undstack.pv_pa,
307 UND_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
308 pmap_map_chunk(l1pagetable, kernelstack.pv_va, kernelstack.pv_pa,
309 KSTACK_PAGES * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
310
311 pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa,
312 L1_TABLE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
313 pmap_map_chunk(l1pagetable, msgbufpv.pv_va, msgbufpv.pv_pa,
314 msgbufsize, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
315
316
317 for (loop = 0; loop < NUM_KERNEL_PTS; ++loop) {
318 pmap_map_chunk(l1pagetable, kernel_pt_table[loop].pv_va,
319 kernel_pt_table[loop].pv_pa, L2_TABLE_SIZE,
320 VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
321 }
322
323 arm_devmap_bootstrap(l1pagetable, s3c24x0_devmap);
324
325 cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT);
326 setttb(kernel_l1pt.pv_pa);
327 cpu_tlb_flushID();
328 cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2));
329
330 /*
331 * Pages were allocated during the secondary bootstrap for the
332 * stacks for different CPU modes.
333 * We must now set the r13 registers in the different CPU modes to
334 * point to these stacks.
335 * Since the ARM stacks use STMFD etc. we must set r13 to the top end
336 * of the stack memory.
337 */
338
339 cpu_control(CPU_CONTROL_MMU_ENABLE, CPU_CONTROL_MMU_ENABLE);
340 set_stackptrs(0);
341
342 /*
343 * We must now clean the cache again....
344 * Cleaning may be done by reading new data to displace any
345 * dirty data in the cache. This will have happened in setttb()
346 * but since we are boot strapping the addresses used for the read
347 * may have just been remapped and thus the cache could be out
348 * of sync. A re-clean after the switch will cure this.
349 * After booting there are no gross relocations of the kernel thus
350 * this problem will not occur after initarm().
351 */
352 cpu_idcache_wbinv_all();
353 cpu_setup("");
354
355 /* Disable all peripheral interrupts */
356 ioreg_write32(S3C24X0_INTCTL_BASE + INTCTL_INTMSK, ~0);
357 memsize = board_init();
358 /* Find pclk for uart */
359 switch(ioreg_read32(S3C24X0_GPIO_BASE + GPIO_GSTATUS1) >> 16) {
360 case 0x3241:
361 s3c2410_clock_freq2(S3C24X0_CLKMAN_BASE, NULL, NULL,
362 &s3c2410_pclk);
363 break;
364 case 0x3244:
365 s3c2440_clock_freq2(S3C24X0_CLKMAN_BASE, NULL, NULL,
366 &s3c2410_pclk);
367 break;
368 }
369 cninit();
370
371 undefined_init();
372
373 init_proc0(kernelstack.pv_va);
374
375 arm_vector_init(ARM_VECTORS_HIGH, ARM_VEC_ALL);
376
377 pmap_curmaxkvaddr = afterkern + 0x100000 * (KERNEL_PT_KERN_NUM - 1);
378 vm_max_kernel_address = KERNVIRTADDR + 3 * memsize;
379 pmap_bootstrap(freemempos, &kernel_l1pt);
380 msgbufp = (void*)msgbufpv.pv_va;
381 msgbufinit(msgbufp, msgbufsize);
382 mutex_init();
383
384 /*
385 * Add the physical ram we have available.
386 *
387 * Exclude the kernel, and all the things we allocated which immediately
388 * follow the kernel, from the VM allocation pool but not from crash
389 * dumps. virtual_avail is a global variable which tracks the kva we've
390 * "allocated" while setting up pmaps.
391 *
392 * Prepare the list of physical memory available to the vm subsystem.
393 */
394 arm_physmem_hardware_region(PHYSADDR, memsize);
395 arm_physmem_exclude_region(abp->abp_physaddr,
396 virtual_avail - KERNVIRTADDR, EXFLAG_NOALLOC);
397 arm_physmem_init_kernel_globals();
398
399 init_param2(physmem);
400 kdb_init();
401
402 return ((void *)(kernelstack.pv_va + USPACE_SVC_STACK_TOP -
403 sizeof(struct pcb)));
404 }
405