1 /*-
2 * Copyright (c) 2005 Olivier Houchard. All rights reserved.
3 * Copyright (c) 2010 Greg Ansley. All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 */
26
27 #include <sys/cdefs.h>
28 __FBSDID("$FreeBSD$");
29
30 #include <sys/param.h>
31 #include <sys/systm.h>
32 #include <sys/bus.h>
33 #include <sys/kernel.h>
34 #include <sys/malloc.h>
35 #include <sys/module.h>
36
37 #define _ARM32_BUS_DMA_PRIVATE
38 #include <machine/bus.h>
39
40 #include <arm/at91/at91var.h>
41 #include <arm/at91/at91reg.h>
42 #include <arm/at91/at91soc.h>
43 #include <arm/at91/at91_aicreg.h>
44 #include <arm/at91/at91sam9260reg.h>
45 #include <arm/at91/at91_pitreg.h>
46 #include <arm/at91/at91_pmcreg.h>
47 #include <arm/at91/at91_pmcvar.h>
48 #include <arm/at91/at91_rstreg.h>
49
50 /*
51 * Standard priority levels for the system. 0 is lowest and 7 is highest.
52 * These values are the ones Atmel uses for its Linux port
53 */
54 static const int at91_irq_prio[32] =
55 {
56 7, /* Advanced Interrupt Controller */
57 7, /* System Peripherals */
58 1, /* Parallel IO Controller A */
59 1, /* Parallel IO Controller B */
60 1, /* Parallel IO Controller C */
61 0, /* Analog-to-Digital Converter */
62 5, /* USART 0 */
63 5, /* USART 1 */
64 5, /* USART 2 */
65 0, /* Multimedia Card Interface */
66 2, /* USB Device Port */
67 6, /* Two-Wire Interface */
68 5, /* Serial Peripheral Interface 0 */
69 5, /* Serial Peripheral Interface 1 */
70 5, /* Serial Synchronous Controller */
71 0, /* (reserved) */
72 0, /* (reserved) */
73 0, /* Timer Counter 0 */
74 0, /* Timer Counter 1 */
75 0, /* Timer Counter 2 */
76 2, /* USB Host port */
77 3, /* Ethernet */
78 0, /* Image Sensor Interface */
79 5, /* USART 3 */
80 5, /* USART 4 */
81 5, /* USART 5 */
82 0, /* Timer Counter 3 */
83 0, /* Timer Counter 4 */
84 0, /* Timer Counter 5 */
85 0, /* Advanced Interrupt Controller IRQ0 */
86 0, /* Advanced Interrupt Controller IRQ1 */
87 0, /* Advanced Interrupt Controller IRQ2 */
88 };
89
90 static const uint32_t at91_pio_base[] = {
91 AT91SAM9260_PIOA_BASE,
92 AT91SAM9260_PIOB_BASE,
93 AT91SAM9260_PIOC_BASE,
94 };
95
96 #define DEVICE(_name, _id, _unit) \
97 { \
98 _name, _unit, \
99 AT91SAM9260_ ## _id ##_BASE, \
100 AT91SAM9260_ ## _id ## _SIZE, \
101 AT91SAM9260_IRQ_ ## _id \
102 }
103
104 static const struct cpu_devs at91_devs[] =
105 {
106 DEVICE("at91_pmc", PMC, 0),
107 DEVICE("at91_wdt", WDT, 0),
108 DEVICE("at91_rst", RSTC, 0),
109 DEVICE("at91_pit", PIT, 0),
110 DEVICE("at91_pio", PIOA, 0),
111 DEVICE("at91_pio", PIOB, 1),
112 DEVICE("at91_pio", PIOC, 2),
113 DEVICE("at91_twi", TWI, 0),
114 DEVICE("at91_mci", MCI, 0),
115 DEVICE("uart", DBGU, 0),
116 DEVICE("uart", USART0, 1),
117 DEVICE("uart", USART1, 2),
118 DEVICE("uart", USART2, 3),
119 DEVICE("uart", USART3, 4),
120 DEVICE("uart", USART4, 5),
121 DEVICE("uart", USART5, 6),
122 DEVICE("spi", SPI0, 0),
123 DEVICE("spi", SPI1, 1),
124 DEVICE("ate", EMAC, 0),
125 DEVICE("macb", EMAC, 0),
126 DEVICE("nand", NAND, 0),
127 DEVICE("ohci", OHCI, 0),
128 { 0, 0, 0, 0, 0 }
129 };
130
131 /*
132 * The following is unused currently since we don't ever set the PLLA
133 * frequency of the device.
134 */
135 static uint32_t
at91_pll_outa(int freq)136 at91_pll_outa(int freq)
137 {
138 uint32_t outa = 0;
139
140 /*
141 * Set OUTA, per the data sheet. See Table 40-15 titled
142 * PLLA Characteristics in the SAM9260 doc.
143 */
144
145 if (freq > 155000000)
146 outa = 2 << 14;
147 return ((1 << 29) | outa);
148 }
149
150 static uint32_t
at91_pll_outb(int freq)151 at91_pll_outb(int freq)
152 {
153
154 return (1 << 14);
155 }
156
157 static void
at91_clock_init(void)158 at91_clock_init(void)
159 {
160 struct at91_pmc_clock *clk;
161
162 /* Update USB device port clock info */
163 clk = at91_pmc_clock_ref("udpck");
164 clk->pmc_mask = PMC_SCER_UDP_SAM9;
165 at91_pmc_clock_deref(clk);
166
167 /* Update USB host port clock info */
168 clk = at91_pmc_clock_ref("uhpck");
169 clk->pmc_mask = PMC_SCER_UHP_SAM9;
170 at91_pmc_clock_deref(clk);
171
172 /* Each SOC has different PLL contraints */
173 clk = at91_pmc_clock_ref("plla");
174 clk->pll_min_in = SAM9260_PLL_A_MIN_IN_FREQ; /* 1 MHz */
175 clk->pll_max_in = SAM9260_PLL_A_MAX_IN_FREQ; /* 32 MHz */
176 clk->pll_min_out = SAM9260_PLL_A_MIN_OUT_FREQ; /* 80 MHz */
177 clk->pll_max_out = SAM9260_PLL_A_MAX_OUT_FREQ; /* 240 MHz */
178 clk->pll_mul_shift = SAM9260_PLL_A_MUL_SHIFT;
179 clk->pll_mul_mask = SAM9260_PLL_A_MUL_MASK;
180 clk->pll_div_shift = SAM9260_PLL_A_DIV_SHIFT;
181 clk->pll_div_mask = SAM9260_PLL_A_DIV_MASK;
182 clk->set_outb = at91_pll_outa;
183 at91_pmc_clock_deref(clk);
184
185 /*
186 * Fudge MAX pll in frequence down below 3.0 MHz to ensure
187 * PMC alogrithm choose the divisor that causes the input clock
188 * to be near the optimal 2 MHz per datasheet. We know
189 * we are going to be using this for the USB clock at 96 MHz.
190 * Causes no extra frequency deviation for all recomended crystal
191 * values. See Note 1, table 40-16 SAM9260 doc.
192 */
193 clk = at91_pmc_clock_ref("pllb");
194 clk->pll_min_in = SAM9260_PLL_B_MIN_IN_FREQ; /* 1 MHz */
195 clk->pll_max_in = SAM9260_PLL_B_MAX_IN_FREQ; /* 5 MHz */
196 clk->pll_max_in = 2999999; /* ~3 MHz */
197 clk->pll_min_out = SAM9260_PLL_B_MIN_OUT_FREQ; /* 70 MHz */
198 clk->pll_max_out = SAM9260_PLL_B_MAX_OUT_FREQ; /* 130 MHz */
199 clk->pll_mul_shift = SAM9260_PLL_B_MUL_SHIFT;
200 clk->pll_mul_mask = SAM9260_PLL_B_MUL_MASK;
201 clk->pll_div_shift = SAM9260_PLL_B_DIV_SHIFT;
202 clk->pll_div_mask = SAM9260_PLL_B_DIV_MASK;
203 clk->set_outb = at91_pll_outb;
204 at91_pmc_clock_deref(clk);
205 }
206
207 static struct at91_soc_data soc_data = {
208 .soc_delay = at91_pit_delay,
209 .soc_reset = at91_rst_cpu_reset,
210 .soc_clock_init = at91_clock_init,
211 .soc_irq_prio = at91_irq_prio,
212 .soc_children = at91_devs,
213 .soc_pio_base = at91_pio_base,
214 .soc_pio_count = nitems(at91_pio_base),
215 };
216
217 AT91_SOC(AT91_T_SAM9260, &soc_data);
218