1 /*- 2 * Copyright (c) 2006 M. Warner Losh. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions 6 * are met: 7 * 1. Redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer. 9 * 2. Redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution. 12 * 13 * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND 14 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 15 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 16 * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE 17 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 18 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 19 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 20 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 21 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 22 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 23 * SUCH DAMAGE. 24 */ 25 26 /* $FreeBSD$ */ 27 28 #ifndef ARM_AT91_AT91_RTCREG_H 29 #define ARM_AT91_AT91_RTCREG_H 30 31 /* Registers */ 32 #define RTC_CR 0x00 /* RTC Control Register */ 33 #define RTC_MR 0x04 /* RTC Mode Register */ 34 #define RTC_TIMR 0x08 /* RTC Time Register */ 35 #define RTC_CALR 0x0c /* RTC Calendar Register */ 36 #define RTC_TIMALR 0x10 /* RTC Time Alarm Register */ 37 #define RTC_CALALR 0x14 /* RTC Calendar Alarm Register */ 38 #define RTC_SR 0x18 /* RTC Status Register */ 39 #define RTC_SCCR 0x1c /* RTC Status Command Clear Register */ 40 #define RTC_IER 0x20 /* RTC Interrupt Enable Register */ 41 #define RTC_IDR 0x24 /* RTC Interrupt Disable Register */ 42 #define RTC_IMR 0x28 /* RTC Interrupt Mask Register */ 43 #define RTC_VER 0x2c /* RTC Valid Entry Register */ 44 45 /* CR */ 46 #define RTC_CR_UPDTIM (0x1u << 0) /* Request update of time register */ 47 #define RTC_CR_UPDCAL (0x1u << 1) /* Request update of calendar reg. */ 48 49 /* TIMR */ 50 #define RTC_TIMR_SEC_M 0x7fUL 51 #define RTC_TIMR_SEC_S 0 52 #define RTC_TIMR_SEC(x) FROMBCD(((x) & RTC_TIMR_SEC_M) >> RTC_TIMR_SEC_S) 53 #define RTC_TIMR_MIN_M 0x7f00UL 54 #define RTC_TIMR_MIN_S 8 55 #define RTC_TIMR_MIN(x) FROMBCD(((x) & RTC_TIMR_MIN_M) >> RTC_TIMR_MIN_S) 56 #define RTC_TIMR_HR_M 0x3f0000UL 57 #define RTC_TIMR_HR_S 16 58 #define RTC_TIMR_HR(x) FROMBCD(((x) & RTC_TIMR_HR_M) >> RTC_TIMR_HR_S) 59 #define RTC_TIMR_MK(hr, min, sec) \ 60 ((TOBCD(hr) << RTC_TIMR_HR_S) | \ 61 (TOBCD(min) << RTC_TIMR_MIN_S) | \ 62 (TOBCD(sec) << RTC_TIMR_SEC_S)) 63 #define RTC_TIMR_PM (1UL << 22) 64 65 /* CALR */ 66 #define RTC_CALR_CEN_M 0x0000007fUL 67 #define RTC_CALR_CEN_S 0 68 #define RTC_CALR_CEN(x) FROMBCD(((x) & RTC_CALR_CEN_M) >> RTC_CALR_CEN_S) 69 #define RTC_CALR_YEAR_M 0x0000ff00UL 70 #define RTC_CALR_YEAR_S 8 71 #define RTC_CALR_YEAR(x) FROMBCD(((x) & RTC_CALR_YEAR_M) >> RTC_CALR_YEAR_S) 72 #define RTC_CALR_MON_M 0x001f0000UL 73 #define RTC_CALR_MON_S 16 74 #define RTC_CALR_MON(x) FROMBCD(((x) & RTC_CALR_MON_M) >> RTC_CALR_MON_S) 75 #define RTC_CALR_DOW_M 0x00d0000UL 76 #define RTC_CALR_DOW_S 21 77 #define RTC_CALR_DOW(x) FROMBCD(((x) & RTC_CALR_DOW_M) >> RTC_CALR_DOW_S) 78 #define RTC_CALR_DAY_M 0x3f000000UL 79 #define RTC_CALR_DAY_S 24 80 #define RTC_CALR_DAY(x) FROMBCD(((x) & RTC_CALR_DAY_M) >> RTC_CALR_DAY_S) 81 #define RTC_CALR_MK(yr, mon, day, dow) \ 82 ((TOBCD((yr) / 100) << RTC_CALR_CEN_S) | \ 83 (TOBCD((yr) % 100) << RTC_CALR_YEAR_S) | \ 84 (TOBCD(mon) << RTC_CALR_MON_S) | \ 85 (TOBCD(dow) << RTC_CALR_DOW_S) | \ 86 (TOBCD(day) << RTC_CALR_DAY_S)) 87 88 /* SR */ 89 90 #define RTC_SR_ACKUPD (0x1u << 0) /* Acknowledge for Update */ 91 #define RTC_SR_ALARM (0x1u << 1) /* Alarm Flag */ 92 #define RTC_SR_SECEV (0x1u << 2) /* Second Event */ 93 #define RTC_SR_TIMEV (0x1u << 3) /* Time Event */ 94 #define RTC_SR_CALEV (0x1u << 4) /* Calendar event */ 95 96 /* VER */ 97 98 #define RTC_VER_NVTIM (0x1 << 0) /* Non-valid time */ 99 #define RTC_VER_NVCAL (0x1 << 1) /* Non-valid calendar */ 100 #define RTC_VER_NVTIMALR (0x1 << 2) /* Non-valid time alarm */ 101 #define RTC_VER_NVCALALR (0x1 << 3) /* Non-valid calendar alarm */ 102 103 #endif /* ARM_AT91_AT91_RTCREG_H */ 104