1 /*-
2 * Copyright (c) 2012 Ganbold Tsagaankhuu <ganbold@freebsd.org>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 */
26
27 /*
28 * Allwinner A10 attachment driver for the USB Enhanced Host Controller.
29 */
30
31 #include <sys/cdefs.h>
32 __FBSDID("$FreeBSD$");
33
34 #include "opt_bus.h"
35
36 #include <sys/param.h>
37 #include <sys/systm.h>
38 #include <sys/bus.h>
39 #include <sys/rman.h>
40 #include <sys/condvar.h>
41 #include <sys/kernel.h>
42 #include <sys/module.h>
43 #include <sys/gpio.h>
44
45 #include <machine/bus.h>
46 #include <dev/ofw/ofw_bus.h>
47 #include <dev/ofw/ofw_bus_subr.h>
48
49 #include <dev/usb/usb.h>
50 #include <dev/usb/usbdi.h>
51
52 #include <dev/usb/usb_core.h>
53 #include <dev/usb/usb_busdma.h>
54 #include <dev/usb/usb_process.h>
55 #include <dev/usb/usb_util.h>
56
57 #include <dev/usb/usb_controller.h>
58 #include <dev/usb/usb_bus.h>
59 #include <dev/usb/controller/ehci.h>
60 #include <dev/usb/controller/ehcireg.h>
61
62 #include "gpio_if.h"
63
64 #include "a10_clk.h"
65
66 #define EHCI_HC_DEVSTR "Allwinner Integrated USB 2.0 controller"
67
68 #define SW_USB_PMU_IRQ_ENABLE 0x800
69
70 #define SW_SDRAM_REG_HPCR_USB1 (0x250 + ((1 << 2) * 4))
71 #define SW_SDRAM_REG_HPCR_USB2 (0x250 + ((1 << 2) * 5))
72 #define SW_SDRAM_BP_HPCR_ACCESS (1 << 0)
73
74 #define SW_ULPI_BYPASS (1 << 0)
75 #define SW_AHB_INCRX_ALIGN (1 << 8)
76 #define SW_AHB_INCR4 (1 << 9)
77 #define SW_AHB_INCR8 (1 << 10)
78 #define GPIO_USB1_PWR 230
79 #define GPIO_USB2_PWR 227
80
81 #define A10_READ_4(sc, reg) \
82 bus_space_read_4((sc)->sc_io_tag, (sc)->sc_io_hdl, reg)
83
84 #define A10_WRITE_4(sc, reg, data) \
85 bus_space_write_4((sc)->sc_io_tag, (sc)->sc_io_hdl, reg, data)
86
87 static device_attach_t a10_ehci_attach;
88 static device_detach_t a10_ehci_detach;
89
90 bs_r_1_proto(reversed);
91 bs_w_1_proto(reversed);
92
93 static int
a10_ehci_probe(device_t self)94 a10_ehci_probe(device_t self)
95 {
96
97 if (!ofw_bus_status_okay(self))
98 return (ENXIO);
99
100 if (!ofw_bus_is_compatible(self, "allwinner,usb-ehci"))
101 return (ENXIO);
102
103 device_set_desc(self, EHCI_HC_DEVSTR);
104
105 return (BUS_PROBE_DEFAULT);
106 }
107
108 static int
a10_ehci_attach(device_t self)109 a10_ehci_attach(device_t self)
110 {
111 ehci_softc_t *sc = device_get_softc(self);
112 bus_space_handle_t bsh;
113 device_t sc_gpio_dev;
114 int err;
115 int rid;
116 uint32_t reg_value = 0;
117
118 /* initialise some bus fields */
119 sc->sc_bus.parent = self;
120 sc->sc_bus.devices = sc->sc_devices;
121 sc->sc_bus.devices_max = EHCI_MAX_DEVICES;
122 sc->sc_bus.dma_bits = 32;
123
124 /* get all DMA memory */
125 if (usb_bus_mem_alloc_all(&sc->sc_bus,
126 USB_GET_DMA_TAG(self), &ehci_iterate_hw_softc)) {
127 return (ENOMEM);
128 }
129
130 sc->sc_bus.usbrev = USB_REV_2_0;
131
132 rid = 0;
133 sc->sc_io_res = bus_alloc_resource_any(self, SYS_RES_MEMORY, &rid, RF_ACTIVE);
134 if (!sc->sc_io_res) {
135 device_printf(self, "Could not map memory\n");
136 goto error;
137 }
138
139 sc->sc_io_tag = rman_get_bustag(sc->sc_io_res);
140 sc->sc_io_hdl = rman_get_bushandle(sc->sc_io_res);
141 bsh = rman_get_bushandle(sc->sc_io_res);
142
143 sc->sc_io_size = rman_get_size(sc->sc_io_res);
144
145 if (bus_space_subregion(sc->sc_io_tag, bsh, 0x00,
146 sc->sc_io_size, &sc->sc_io_hdl) != 0)
147 panic("%s: unable to subregion USB host registers",
148 device_get_name(self));
149
150 rid = 0;
151 sc->sc_irq_res = bus_alloc_resource_any(self, SYS_RES_IRQ, &rid,
152 RF_SHAREABLE | RF_ACTIVE);
153 if (sc->sc_irq_res == NULL) {
154 device_printf(self, "Could not allocate irq\n");
155 goto error;
156 }
157 sc->sc_bus.bdev = device_add_child(self, "usbus", -1);
158 if (!sc->sc_bus.bdev) {
159 device_printf(self, "Could not add USB device\n");
160 goto error;
161 }
162 device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus);
163 device_set_desc(sc->sc_bus.bdev, EHCI_HC_DEVSTR);
164
165 sprintf(sc->sc_vendor, "Allwinner");
166
167 /* Get the GPIO device, we need this to give power to USB */
168 sc_gpio_dev = devclass_get_device(devclass_find("gpio"), 0);
169 if (sc_gpio_dev == NULL) {
170 device_printf(self, "Error: failed to get the GPIO device\n");
171 goto error;
172 }
173
174 err = bus_setup_intr(self, sc->sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE,
175 NULL, (driver_intr_t *)ehci_interrupt, sc, &sc->sc_intr_hdl);
176 if (err) {
177 device_printf(self, "Could not setup irq, %d\n", err);
178 sc->sc_intr_hdl = NULL;
179 goto error;
180 }
181
182 sc->sc_flags |= EHCI_SCFLG_DONTRESET;
183
184 /* Enable clock for USB */
185 a10_clk_usb_activate();
186
187 /* Give power to USB */
188 GPIO_PIN_SETFLAGS(sc_gpio_dev, GPIO_USB2_PWR, GPIO_PIN_OUTPUT);
189 GPIO_PIN_SET(sc_gpio_dev, GPIO_USB2_PWR, GPIO_PIN_HIGH);
190
191 /* Give power to USB */
192 GPIO_PIN_SETFLAGS(sc_gpio_dev, GPIO_USB1_PWR, GPIO_PIN_OUTPUT);
193 GPIO_PIN_SET(sc_gpio_dev, GPIO_USB1_PWR, GPIO_PIN_HIGH);
194
195 /* Enable passby */
196 reg_value = A10_READ_4(sc, SW_USB_PMU_IRQ_ENABLE);
197 reg_value |= SW_AHB_INCR8; /* AHB INCR8 enable */
198 reg_value |= SW_AHB_INCR4; /* AHB burst type INCR4 enable */
199 reg_value |= SW_AHB_INCRX_ALIGN; /* AHB INCRX align enable */
200 reg_value |= SW_ULPI_BYPASS; /* ULPI bypass enable */
201 A10_WRITE_4(sc, SW_USB_PMU_IRQ_ENABLE, reg_value);
202
203 /* Configure port */
204 reg_value = A10_READ_4(sc, SW_SDRAM_REG_HPCR_USB2);
205 reg_value |= SW_SDRAM_BP_HPCR_ACCESS;
206 A10_WRITE_4(sc, SW_SDRAM_REG_HPCR_USB2, reg_value);
207
208 err = ehci_init(sc);
209 if (!err) {
210 err = device_probe_and_attach(sc->sc_bus.bdev);
211 }
212 if (err) {
213 device_printf(self, "USB init failed err=%d\n", err);
214 goto error;
215 }
216 return (0);
217
218 error:
219 a10_ehci_detach(self);
220 return (ENXIO);
221 }
222
223 static int
a10_ehci_detach(device_t self)224 a10_ehci_detach(device_t self)
225 {
226 ehci_softc_t *sc = device_get_softc(self);
227 device_t bdev;
228 int err;
229 uint32_t reg_value = 0;
230
231 if (sc->sc_bus.bdev) {
232 bdev = sc->sc_bus.bdev;
233 device_detach(bdev);
234 device_delete_child(self, bdev);
235 }
236 /* during module unload there are lots of children leftover */
237 device_delete_children(self);
238
239 if (sc->sc_irq_res && sc->sc_intr_hdl) {
240 /*
241 * only call ehci_detach() after ehci_init()
242 */
243 ehci_detach(sc);
244
245 err = bus_teardown_intr(self, sc->sc_irq_res, sc->sc_intr_hdl);
246
247 if (err)
248 /* XXX or should we panic? */
249 device_printf(self, "Could not tear down irq, %d\n",
250 err);
251 sc->sc_intr_hdl = NULL;
252 }
253
254 if (sc->sc_irq_res) {
255 bus_release_resource(self, SYS_RES_IRQ, 0, sc->sc_irq_res);
256 sc->sc_irq_res = NULL;
257 }
258 if (sc->sc_io_res) {
259 bus_release_resource(self, SYS_RES_MEMORY, 0,
260 sc->sc_io_res);
261 sc->sc_io_res = NULL;
262 }
263 usb_bus_mem_free_all(&sc->sc_bus, &ehci_iterate_hw_softc);
264
265 /* Disable configure port */
266 reg_value = A10_READ_4(sc, SW_SDRAM_REG_HPCR_USB2);
267 reg_value &= ~SW_SDRAM_BP_HPCR_ACCESS;
268 A10_WRITE_4(sc, SW_SDRAM_REG_HPCR_USB2, reg_value);
269
270 /* Disable passby */
271 reg_value = A10_READ_4(sc, SW_USB_PMU_IRQ_ENABLE);
272 reg_value &= ~SW_AHB_INCR8; /* AHB INCR8 disable */
273 reg_value &= ~SW_AHB_INCR4; /* AHB burst type INCR4 disable */
274 reg_value &= ~SW_AHB_INCRX_ALIGN; /* AHB INCRX align disable */
275 reg_value &= ~SW_ULPI_BYPASS; /* ULPI bypass disable */
276 A10_WRITE_4(sc, SW_USB_PMU_IRQ_ENABLE, reg_value);
277
278 /* Disable clock for USB */
279 a10_clk_usb_deactivate();
280
281 return (0);
282 }
283
284 static device_method_t ehci_methods[] = {
285 /* Device interface */
286 DEVMETHOD(device_probe, a10_ehci_probe),
287 DEVMETHOD(device_attach, a10_ehci_attach),
288 DEVMETHOD(device_detach, a10_ehci_detach),
289 DEVMETHOD(device_suspend, bus_generic_suspend),
290 DEVMETHOD(device_resume, bus_generic_resume),
291 DEVMETHOD(device_shutdown, bus_generic_shutdown),
292
293 DEVMETHOD_END
294 };
295
296 static driver_t ehci_driver = {
297 .name = "ehci",
298 .methods = ehci_methods,
299 .size = sizeof(ehci_softc_t),
300 };
301
302 static devclass_t ehci_devclass;
303
304 DRIVER_MODULE(ehci, simplebus, ehci_driver, ehci_devclass, 0, 0);
305 MODULE_DEPEND(ehci, usb, 1, 1, 1);
306