1 //===-- PPCSubtarget.h - Define Subtarget for the PPC ----------*- C++ -*--===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file declares the PowerPC specific subclass of TargetSubtargetInfo. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #ifndef POWERPCSUBTARGET_H 15 #define POWERPCSUBTARGET_H 16 17 #include "llvm/ADT/Triple.h" 18 #include "llvm/MC/MCInstrItineraries.h" 19 #include "llvm/Target/TargetSubtargetInfo.h" 20 #include <string> 21 22 #define GET_SUBTARGETINFO_HEADER 23 #include "PPCGenSubtargetInfo.inc" 24 25 // GCC #defines PPC on Linux but we use it as our namespace name 26 #undef PPC 27 28 namespace llvm { 29 class StringRef; 30 31 namespace PPC { 32 // -m directive values. 33 enum { 34 DIR_NONE, 35 DIR_32, 36 DIR_440, 37 DIR_601, 38 DIR_602, 39 DIR_603, 40 DIR_7400, 41 DIR_750, 42 DIR_970, 43 DIR_A2, 44 DIR_E500mc, 45 DIR_E5500, 46 DIR_PWR3, 47 DIR_PWR4, 48 DIR_PWR5, 49 DIR_PWR5X, 50 DIR_PWR6, 51 DIR_PWR6X, 52 DIR_PWR7, 53 DIR_64 54 }; 55 } 56 57 class GlobalValue; 58 class TargetMachine; 59 60 class PPCSubtarget : public PPCGenSubtargetInfo { 61 protected: 62 /// stackAlignment - The minimum alignment known to hold of the stack frame on 63 /// entry to the function and which must be maintained by every function. 64 unsigned StackAlignment; 65 66 /// Selected instruction itineraries (one entry per itinerary class.) 67 InstrItineraryData InstrItins; 68 69 /// Which cpu directive was used. 70 unsigned DarwinDirective; 71 72 /// Used by the ISel to turn in optimizations for POWER4-derived architectures 73 bool HasMFOCRF; 74 bool Has64BitSupport; 75 bool Use64BitRegs; 76 bool IsPPC64; 77 bool HasAltivec; 78 bool HasQPX; 79 bool HasVSX; 80 bool HasFCPSGN; 81 bool HasFSQRT; 82 bool HasFRE, HasFRES, HasFRSQRTE, HasFRSQRTES; 83 bool HasRecipPrec; 84 bool HasSTFIWX; 85 bool HasLFIWAX; 86 bool HasFPRND; 87 bool HasFPCVT; 88 bool HasISEL; 89 bool HasPOPCNTD; 90 bool HasLDBRX; 91 bool IsBookE; 92 bool DeprecatedMFTB; 93 bool DeprecatedDST; 94 bool HasLazyResolverStubs; 95 bool IsJITCodeModel; 96 bool IsLittleEndian; 97 98 /// TargetTriple - What processor and OS we're targeting. 99 Triple TargetTriple; 100 101 public: 102 /// This constructor initializes the data members to match that 103 /// of the specified triple. 104 /// 105 PPCSubtarget(const std::string &TT, const std::string &CPU, 106 const std::string &FS, bool is64Bit); 107 108 /// ParseSubtargetFeatures - Parses features string setting specified 109 /// subtarget options. Definition of function is auto generated by tblgen. 110 void ParseSubtargetFeatures(StringRef CPU, StringRef FS); 111 112 /// SetJITMode - This is called to inform the subtarget info that we are 113 /// producing code for the JIT. 114 void SetJITMode(); 115 116 /// getStackAlignment - Returns the minimum alignment known to hold of the 117 /// stack frame on entry to the function and which must be maintained by every 118 /// function for this subtarget. getStackAlignment()119 unsigned getStackAlignment() const { return StackAlignment; } 120 121 /// getDarwinDirective - Returns the -m directive specified for the cpu. 122 /// getDarwinDirective()123 unsigned getDarwinDirective() const { return DarwinDirective; } 124 125 /// getInstrItins - Return the instruction itineraies based on subtarget 126 /// selection. getInstrItineraryData()127 const InstrItineraryData &getInstrItineraryData() const { return InstrItins; } 128 129 /// \brief Reset the features for the PowerPC target. 130 virtual void resetSubtargetFeatures(const MachineFunction *MF); 131 private: 132 void initializeEnvironment(); 133 void resetSubtargetFeatures(StringRef CPU, StringRef FS); 134 135 public: 136 /// isPPC64 - Return true if we are generating code for 64-bit pointer mode. 137 /// isPPC64()138 bool isPPC64() const { return IsPPC64; } 139 140 /// has64BitSupport - Return true if the selected CPU supports 64-bit 141 /// instructions, regardless of whether we are in 32-bit or 64-bit mode. has64BitSupport()142 bool has64BitSupport() const { return Has64BitSupport; } 143 144 /// use64BitRegs - Return true if in 64-bit mode or if we should use 64-bit 145 /// registers in 32-bit mode when possible. This can only true if 146 /// has64BitSupport() returns true. use64BitRegs()147 bool use64BitRegs() const { return Use64BitRegs; } 148 149 /// hasLazyResolverStub - Return true if accesses to the specified global have 150 /// to go through a dyld lazy resolution stub. This means that an extra load 151 /// is required to get the address of the global. 152 bool hasLazyResolverStub(const GlobalValue *GV, 153 const TargetMachine &TM) const; 154 155 // isJITCodeModel - True if we're generating code for the JIT isJITCodeModel()156 bool isJITCodeModel() const { return IsJITCodeModel; } 157 158 // isLittleEndian - True if generating little-endian code isLittleEndian()159 bool isLittleEndian() const { return IsLittleEndian; } 160 161 // Specific obvious features. hasFCPSGN()162 bool hasFCPSGN() const { return HasFCPSGN; } hasFSQRT()163 bool hasFSQRT() const { return HasFSQRT; } hasFRE()164 bool hasFRE() const { return HasFRE; } hasFRES()165 bool hasFRES() const { return HasFRES; } hasFRSQRTE()166 bool hasFRSQRTE() const { return HasFRSQRTE; } hasFRSQRTES()167 bool hasFRSQRTES() const { return HasFRSQRTES; } hasRecipPrec()168 bool hasRecipPrec() const { return HasRecipPrec; } hasSTFIWX()169 bool hasSTFIWX() const { return HasSTFIWX; } hasLFIWAX()170 bool hasLFIWAX() const { return HasLFIWAX; } hasFPRND()171 bool hasFPRND() const { return HasFPRND; } hasFPCVT()172 bool hasFPCVT() const { return HasFPCVT; } hasAltivec()173 bool hasAltivec() const { return HasAltivec; } hasQPX()174 bool hasQPX() const { return HasQPX; } hasMFOCRF()175 bool hasMFOCRF() const { return HasMFOCRF; } hasISEL()176 bool hasISEL() const { return HasISEL; } hasPOPCNTD()177 bool hasPOPCNTD() const { return HasPOPCNTD; } hasLDBRX()178 bool hasLDBRX() const { return HasLDBRX; } isBookE()179 bool isBookE() const { return IsBookE; } isDeprecatedMFTB()180 bool isDeprecatedMFTB() const { return DeprecatedMFTB; } isDeprecatedDST()181 bool isDeprecatedDST() const { return DeprecatedDST; } 182 getTargetTriple()183 const Triple &getTargetTriple() const { return TargetTriple; } 184 185 /// isDarwin - True if this is any darwin platform. isDarwin()186 bool isDarwin() const { return TargetTriple.isMacOSX(); } 187 /// isBGP - True if this is a BG/P platform. isBGP()188 bool isBGP() const { return TargetTriple.getVendor() == Triple::BGP; } 189 /// isBGQ - True if this is a BG/Q platform. isBGQ()190 bool isBGQ() const { return TargetTriple.getVendor() == Triple::BGQ; } 191 isDarwinABI()192 bool isDarwinABI() const { return isDarwin(); } isSVR4ABI()193 bool isSVR4ABI() const { return !isDarwin(); } 194 195 /// enablePostRAScheduler - True at 'More' optimization. 196 bool enablePostRAScheduler(CodeGenOpt::Level OptLevel, 197 TargetSubtargetInfo::AntiDepBreakMode& Mode, 198 RegClassVector& CriticalPathRCs) const; 199 200 // Scheduling customization. 201 bool enableMachineScheduler() const; 202 void overrideSchedPolicy(MachineSchedPolicy &Policy, 203 MachineInstr *begin, 204 MachineInstr *end, 205 unsigned NumRegionInstrs) const; 206 bool useAA() const; 207 }; 208 } // End llvm namespace 209 210 #endif 211