1 /*        $NetBSD: rfreg.h,v 1.5 2019/10/29 03:49:59 christos Exp $   */
2 /*
3  * Copyright (c) 2002 Jochen Kunz.
4  * All rights reserved.
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  * 3. The name of Jochen Kunz may not be used to endorse or promote
15  *    products derived from this software without specific prior
16  *    written permission.
17  *
18  * THIS SOFTWARE IS PROVIDED BY JOCHEN KUNZ
19  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
20  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
21  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL JOCHEN KUNZ
22  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28  * POSSIBILITY OF SUCH DAMAGE.
29  */
30 
31 
32 
33 /* Registers in Uni/QBus I/O space. */
34 #define   RX2CS     0         /* Command and Status Register */
35 #define   RX2DB     2         /* Data Buffer Register */
36 /* RX2DB is depending on context: */
37 #define   RX2BA     2         /* Bus Address Register */
38 #define   RX2TA     2         /* Track Address Register */
39 #define   RX2SA     2         /* Sector Address Register */
40 #define   RX2WC     2         /* Word Count Register */
41 #define   RX2ES     2         /* Error and Status Register */
42 
43 
44 /* Bitdefinitions of CSR. */
45 #define   RX2CS_ERR 0x8000    /* Error                                RO */
46 #define   RX2CS_INIT          0x4000    /* Initialize                                     WO */
47 #define   RX2CS_UAEBH         0x2000    /* Unibus address extension high bit    WO */
48 #define   RX2CS_UAEBI         0x1000    /* Unibus address extension low bit     WO */
49 #define   RX2CS_RX02          0x0800    /* RX02                                           RO */
50 /*                            0x0400       Not Used                                       -- */
51 /*                            0x0200       Not Used                                       -- */
52 #define   RX2CS_DD  0x0100    /* Double Density                       R/W */
53 #define   RX2CS_TR  0x0080    /* Transfer Request                     RO */
54 #define   RX2CS_IE  0x0040    /* Interrupt Enable                     R/W */
55 #define   RX2CS_DONE          0x0020    /* Done                                           RO */
56 #define   RX2CS_US  0x0010    /* Unit Select                                    WO */
57 #define   RX2CS_FCH 0x0008    /* Function Code high bit               WO */
58 #define   RX2CS_FCM 0x0004    /* Function Code mid bit                WO */
59 #define   RX2CS_FCL 0x0002    /* Function Code low bit                WO */
60 #define   RX2CS_GO  0x0001    /* Go                                             WO */
61 #define   RX2CS_NU  0x0600    /* not used bits                        -- */
62 
63 
64 #define   RX2CS_UAEB          ( RX2CS_UAEBH | RX2CS_UAEBI )
65 #define   RX2CS_FC  ( RX2CS_FCH | RX2CS_FCM | RX2CS_FCL )
66 
67 
68 /* Commands of the controller and parameter cont. */
69 #define   RX2CS_FBUF          0x1       /* Fill Buffer, word count and bus address */
70 #define   RX2CS_EBUF          0x3       /* Empty Buffer, word count and bus address */
71 #define   RX2CS_WSEC          0x5       /* Write Sector, sector and track */
72 #define   RX2CS_RSEC          0x7       /* Read Sector, sector and track */
73 #define   RX2CS_SMD 0x9       /* Set Media Density, ??? */
74 #define   RX2CS_RSTAT         0xb       /* Read Status, no params */
75 #define   RX2CS_WDDS          0xd       /* Write Deleted Data Sector, sector and track */
76 #define   RX2CS_REC 0xf       /* Read Error Code, bus address */
77 #define   RX2CS_MASK          0xf
78 
79 
80 /* Track Address Register */
81 #define   RX2TA_MASK          0x7f
82 
83 
84 /* Sector Address Register */
85 #define   RX2SA_MASK          0x1f
86 
87 
88 /* Word Count Register */
89 #define   RX2WC_MASK          0x7f
90 
91 
92 /* Bitdefinitions of RX2ES. */
93 /*                            <15-12> Not Used              -- */
94 #define   RX2ES_NEM 0x0800    /* Non-Existend Memory        RO */
95 #define   RX2ES_WCO 0x0400    /* Word Count Overflow        RO */
96 /*                            0x0200       Not Used                   RO */
97 #define   RX2ES_US  0x0010    /* Unit Select                RO */
98 #define   RX2ES_RDY 0x0080    /* Ready            RO */
99 #define   RX2ES_DEL 0x0040    /* Deleted Data               RO */
100 #define   RX2ES_DD  0x0020    /* Double Density   RO */
101 #define   RX2ES_DE  0x0010    /* Density Error    RO */
102 #define   RX2ES_ACL 0x0008    /* AC Lost                    RO */
103 #define   RX2ES_ID  0x0004    /* Initialize Done  RO */
104 /*                            0x0002       Not Used                   -- */
105 #define   RX2ES_CRCE          0x0001    /* CRC Error                  RO */
106 #define   RX2ES_NU  0xF202    /* not used bits    -- */
107 
108 
109 #define   RX2_TRACKS          77        /* number of tracks */
110 #define   RX2_SECTORS         26        /* number of sectors / track */
111 #define   RX2_BYTE_SD         128       /* number of bytes / sector in single density */
112 #define   RX2_BYTE_DD         256       /* number of bytes / sector in double density */
113 #define   RX2_HEADS 1         /* number of heads */
114 
115