1 /* $NetBSD: onewire_bitbang.c,v 1.2 2019/11/30 23:04:12 ad Exp $ */
2 /* $OpenBSD: onewire_bitbang.c,v 1.1 2006/03/04 16:27:03 grange Exp $ */
3
4 /*-
5 * Copyright (c) 2019 The NetBSD Foundation, Inc.
6 * All rights reserved.
7 *
8 * This code is derived from software contributed to The NetBSD Foundation
9 * by Andrew Doran.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 * POSSIBILITY OF SUCH DAMAGE.
31 */
32
33 /*
34 * Copyright (c) 2006 Alexander Yurchenko <grange@openbsd.org>
35 *
36 * Permission to use, copy, modify, and distribute this software for any
37 * purpose with or without fee is hereby granted, provided that the above
38 * copyright notice and this permission notice appear in all copies.
39 *
40 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
41 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
42 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
43 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
44 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
45 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
46 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
47 */
48
49 #include <sys/cdefs.h>
50 __KERNEL_RCSID(0, "$NetBSD: onewire_bitbang.c,v 1.2 2019/11/30 23:04:12 ad Exp $");
51
52 /*
53 * 1-Wire bus bit-banging routines.
54 */
55
56 #include <sys/param.h>
57 #include <sys/systm.h>
58 #include <sys/device.h>
59 #include <sys/proc.h>
60
61 #include <dev/onewire/onewirevar.h>
62
63 /*
64 * Reset the bus. Sequence from DS18B20 datasheet:
65 *
66 * 1: Master pulls bus low for a minimum of 480us.
67 * 2: Bus pulled up by resistor. DS18B20 detects rising edge, waits 15-60us.
68 * 3: DS18B20 pulls bus low for 60-240us.
69 * 4: Bus pulled up by resistor. Master must wait at least 450us.
70 *
71 * 111111111112222233333444444444
72 *
73 * Vpu | +-+ +----->
74 * | / | /
75 * GND +----------+ +-----+
76 */
77 int
onewire_bb_reset(const struct onewire_bbops * ops,void * arg)78 onewire_bb_reset(const struct onewire_bbops *ops, void *arg)
79 {
80 int s, rv, i;
81
82 rv = 0;
83 s = splhigh();
84 ops->bb_tx(arg);
85 ops->bb_set(arg, 0);
86 delay(500);
87 ops->bb_set(arg, 1);
88 ops->bb_rx(arg);
89 for (i = 0; i < 240 / 5; i++) {
90 delay(5);
91 if ((rv = ops->bb_get(arg)) == 0)
92 break;
93 }
94 splx(s);
95
96 /*
97 * After a bus reset, we must wait for at least 450us before any
98 * further device access. There is no upper bound on this time, so
99 * rather than burning CPU, sleep for 1 tick.
100 */
101 KASSERT(2001 > hz);
102 (void)kpause("owreset", false, 1, NULL);
103
104 /*
105 * With a push-pull GPIO, bring the bus high to supply
106 * parasite-powered devices. With either PP or open drain,
107 * past this point on entry to onewire_bb_write_bit() and
108 * onewire_bb_read_bit() we assume that the line is set to
109 * output and not being held low.
110 */
111 s = splhigh();
112 ops->bb_tx(arg);
113 ops->bb_set(arg, 1);
114 splx(s);
115
116 return rv;
117 }
118
119 /*
120 * Onewire bit write.
121 *
122 * Method: pull the bus low. Then let the pull up resistor settle the bus.
123 * ZERO is signalled by the bus being held low for minimum 60us.
124 * ONE is signalled by the hold being much shorter (minimum 1us).
125 *
126 * In any eventuality, pad the entire transaction to the minimum 60us, plus
127 * an additional bit of recovery time before the next transaction
128 */
129 void
onewire_bb_write_bit(const struct onewire_bbops * ops,void * arg,int value)130 onewire_bb_write_bit(const struct onewire_bbops *ops, void *arg, int value)
131 {
132 int s, d1, d2;
133
134 if (value) {
135 d1 = 2;
136 d2 = 62;
137 } else {
138 d1 = 62;
139 d2 = 2;
140 }
141
142 s = splhigh();
143 ops->bb_set(arg, 0);
144 delay(d1);
145 ops->bb_set(arg, 1);
146 splx(s);
147 /* Timing no longer critical. */
148 delay(d2);
149 }
150
151 /*
152 * Onewire bit read.
153 *
154 * Method: pull the bus low for at least 1us. Then let the pull up resistor
155 * settle the bus. ZERO is signalled by the bus being pulled low again by
156 * the slave at some point between 15-45us of transaction start. ONE is
157 * signalled by the bus not being pulled low.
158 *
159 * In any eventuality, pad the entire transaction to the minimum 60us, plus
160 * an additional bit of recovery time before the next transaction.
161 */
162 int
onewire_bb_read_bit(const struct onewire_bbops * ops,void * arg)163 onewire_bb_read_bit(const struct onewire_bbops *ops, void *arg)
164 {
165 int s, rv, us;
166
167 s = splhigh();
168 ops->bb_set(arg, 0);
169 delay(2);
170 ops->bb_set(arg, 1);
171 ops->bb_rx(arg);
172 for (us = 62; us >= 60 - 45; us -= 5) {
173 delay(5);
174 if ((rv = ops->bb_get(arg)) == 0) {
175 break;
176 }
177 }
178 splx(s);
179 /* Timing no longer critical, and no further need to poll. */
180 if (us > 0) {
181 delay(us);
182 }
183 ops->bb_tx(arg);
184 ops->bb_set(arg, 1);
185 return rv;
186 }
187