1 /* $NetBSD: gphyterreg.h,v 1.2 2008/04/28 20:23:53 martin Exp $ */ 2 3 /*- 4 * Copyright (c) 2001 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #ifndef _DEV_MII_GPHYTERREG_H_ 33 #define _DEV_MII_GPHYTERREG_H_ 34 35 /* 36 * DP83861 registers. 37 */ 38 39 /* 40 * A quick node about "non-compliant mode": When set to 1, the 41 * DP83861 will auto-negotiate with both BCM5400 PHYs before rev. 42 * C5 and 802.3ab compliant PHYs. When set to 0, it will auto- 43 * negotiate *only* with 802.3ab compliant PHYs. We can change 44 * the setting, but the default comes from a strapping pin. 45 */ 46 47 #define MII_GPHYTER_STRAP 0x10 /* strap options */ 48 #define STRAP_PHYADDR 0xf800 /* PHY address (ro) */ 49 #define STRAP_NC_MODE 0x0400 /* non-compliant mode (rw) */ 50 #define STRAP_MAN_MS_ENABLE 0x0200 /* manual master/slave enable (ro) */ 51 #define STRAP_AN_ENABLE 0x0100 /* auto-negotiation enable (ro) */ 52 #define STRAP_MS_VAL 0x0080 /* 1 = master, 0 = slave */ 53 #define STRAP_ADV_1000HDX 0x0010 /* adv. 1000T-HDX */ 54 #define STRAP_ADV_1000FDX 0x0008 /* adv. 1000T-FDX */ 55 #define STRAP_ADV_100 0x0004 /* adv. 100TX-HDX and 100TX-FDX */ 56 #define STRAP_SPEED1 0x0002 /* speed bit 1 */ 57 #define STRAP_SPEED0 0x0001 /* speed bit 0 */ 58 59 60 #define MII_GPHYTER_PHY_SUP 0x11 /* PHY support */ 61 #define PHY_SUP_SPEED1 0x0010 /* speed bit 1 */ 62 #define PHY_SUP_SPEED0 0x0008 /* speed bit 0 */ 63 #define PHY_SUP_LINK 0x0004 /* 1 == link */ 64 #define PHY_SUP_DUPLEX 0x0002 /* 1 == full-duplex */ 65 #define PHY_SUP_10baseT 0x0001 /* 10baseT resolved */ 66 67 68 #define MII_GPHYTER_MDIX_SEL 0x15 /* MIDX select */ 69 #define MIDX_SEL_CROSSOVER 0x0001 /* 1 == cross-over A-B */ 70 71 72 #define MII_GPHYTER_EX_MEM 0x16 /* expanded memory access */ 73 #define EX_MEM_RE_TIME 0x0008 /* Re-time to MDC */ 74 #define EX_MEM_ACCESS 0x0004 /* enable expanded mem access */ 75 #define EX_MEM_ADDRCONTROL_16 0x0002 /* 16-bit access */ 76 #define EX_MEM_ADDRCONTROL_8 0x0001 /* 8-bit access */ 77 78 79 #define MII_GPHYTER_EX_MEM_DAT 0x1d /* expanded memory data */ 80 81 82 #define MII_GPHYTER_EX_MEM_ADDR 0x1e /* expanded memory address */ 83 84 85 #define GPHYTER_ISR0 0x810d /* interrupt status 0 */ 86 87 88 #define GPHYTER_ISR1 0x810e /* interrupt status 1 */ 89 90 91 #define GPHYTER_IRR0 0x810f /* interrupt reason 0 */ 92 93 94 #define GPHYTER_IRR1 0x8110 /* interrupt reason 1 */ 95 96 97 #define GPHYTER_RRR0 0x8111 /* raw reason 0 */ 98 99 100 #define GPHYTER_RRR1 0x8112 /* raw reason 1 */ 101 102 103 #define GPHYTER_IER0 0x8113 /* interrupt enable 0 */ 104 105 106 #define GPHYTER_IER1 0x8114 /* interrupt enable 1 */ 107 108 109 #define GPHYTER_ICLR0 0x8115 /* interrupt clear 0 */ 110 111 112 #define GPHYTER_ICLR1 0x8116 /* interrupt clear 1 */ 113 114 115 #define GPHYTER_ICTR 0x8117 /* interrupt control */ 116 117 118 #define GPHYTER_AN_THRESH 0x8118 /* AN_threshold value */ 119 120 121 #define GPHYTER_LINK_THRESH 0x8119 /* LINK_threshold value */ 122 123 124 #define GPHYTER_IEC_THRESH 0x811a /* IEC_threshold value */ 125 126 127 #endif /* _DEV_MII_GPHYTERREG_H_ */ 128