1 /* $NetBSD: espreg.h,v 1.3 2024/06/02 13:28:46 andvar Exp $ */ 2 3 /*- 4 * Copyright (c) 1997, 2001 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jaromir Dolecek. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 /* 33 * MCA NCR 53C90 86C01 DMA controller registers. 34 * 35 * Information got from Tymm Twillman <tymm@computer.org>'s 36 * Linux MCA NC53c90 driver drivers/scsi/mca_53c9x.c. 37 */ 38 39 #define N86C01_CARDID_LOW 0x00 /* CardId, lower byte */ 40 41 #define N86C01_CARDID_HIGH 0x01 /* CardId, high byte */ 42 43 #define N86C01_MODE_ENABLE 0x02 /* Mode enable register */ 44 #define N86C01_DATA_WIDTH 0x80 /* data width - 1=16 0=8 */ 45 #define N86C01_INTR_ENABLE 0x40 /* enable interrupts 1=enable*/ 46 #define N86C01_INTR_SELECT_MSK 0x30 /* IRQ select - see ADF */ 47 #define N86C01_IOADDR_MSK 0x0e /* Base Address - see ADF */ 48 #define N86C01_CARD_ENABLE 0x01 /* Card enable - 1=enabled */ 49 50 #define N86C01_DMA_CTRL 0x03 /* DMA control */ 51 #define N86C01_DMA_ENABLE 0x80 /* DMA enable - 1=enabled */ 52 #define N86C01_PREEMPT_CNT_MSK 0x60 53 /* Preemt Count Select - number of transfers to complete after 54 * the chip is preempted on MCA bus 55 * 0 0 = 0 56 * 0 1 = 1 57 * 1 0 = 3 58 * 1 1 = 7 59 */ 60 #define N86C01_FAIRNESS_EN 0x10 /* Fairness enable 1=enable */ 61 #define N86C01_DMA_ARB_MSK 0x0f /* DMA Arbitration lvl */ 62 63 #define N86C01_GENERAL 0x04 /* General purpose register */ 64 /* Bits 7,6 apply to SCSI Id selection in ADF, 5-3 user definable, 2-0 reserv*/ 65 66 #define N86C01_PIO 0x0a /* IO-based DMA, PIO */ 67 68 #define N86C01_STATUS 0x0c /* Status */ 69 #define N86C01_DMA_PEND 0x02 /* DMA pending 1=pending */ 70 #define N86C01_IRQ_PEND 0x01 /* IRQ pending 0=pending */ 71