1 /* $NetBSD: siopvar_common.h,v 1.40 2009/10/19 18:41:13 bouyer Exp $ */ 2 3 /* 4 * Copyright (c) 2000 Manuel Bouyer. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 * 26 */ 27 28 #include "opt_siop.h" 29 30 /* common struct and routines used by siop and esiop */ 31 32 #ifndef SIOP_DEFAULT_TARGET 33 #define SIOP_DEFAULT_TARGET 7 34 #endif 35 36 /* tables used by SCRIPT */ 37 typedef struct scr_table { 38 uint32_t count; 39 uint32_t addr; 40 } __packed scr_table_t; 41 42 /* Number of scatter/gather entries */ 43 #define SIOP_NSG (MAXPHYS/PAGE_SIZE + 1) /* XXX PAGE_SIZE */ 44 45 /* 46 * This structure interfaces the SCRIPT with the driver; it describes a full 47 * transfer. 48 * If you change something here, don't forget to update offsets in {s,es}iop.ss 49 */ 50 struct siop_common_xfer { 51 uint8_t msg_out[16]; /* 0 */ 52 uint8_t msg_in[16]; /* 16 */ 53 uint32_t status; /* 32 */ 54 uint32_t pad1; /* 36 */ 55 uint32_t id; /* 40 */ 56 uint32_t pad2; /* 44 */ 57 scr_table_t t_msgin; /* 48 */ 58 scr_table_t t_extmsgin; /* 56 */ 59 scr_table_t t_extmsgdata; /* 64 */ 60 scr_table_t t_msgout; /* 72 */ 61 scr_table_t cmd; /* 80 */ 62 scr_table_t t_status; /* 88 */ 63 scr_table_t data[SIOP_NSG]; /* 96 */ 64 } __packed; 65 66 /* status can hold the SCSI_* status values, and 2 additional values: */ 67 #define SCSI_SIOP_NOCHECK 0xfe /* don't check the scsi status */ 68 #define SCSI_SIOP_NOSTATUS 0xff /* device didn't report status */ 69 70 /* offset is initialised to SIOP_NOOFFSET, used to check if it was updated */ 71 #define SIOP_NOOFFSET 0xffffffff 72 73 /* 74 * This describes a command handled by the SCSI controller 75 */ 76 struct siop_common_cmd { 77 struct siop_common_softc *siop_sc; /* points back to our adapter */ 78 struct siop_common_target *siop_target; /* pointer to our target def */ 79 struct scsipi_xfer *xs; /* xfer from the upper level */ 80 struct siop_common_xfer *siop_tables; /* tables for this cmd */ 81 bus_addr_t dsa; /* DSA value to load */ 82 bus_dmamap_t dmamap_cmd; 83 bus_dmamap_t dmamap_data; 84 int status; 85 int flags; 86 int tag; /* tag used for tagged command queuing */ 87 int resid; /* valid when CMDFL_RESID is set */ 88 }; 89 90 /* status defs */ 91 #define CMDST_FREE 0 /* cmd slot is free */ 92 #define CMDST_READY 1 /* cmd slot is waiting for processing */ 93 #define CMDST_ACTIVE 2 /* cmd slot is being processed */ 94 #define CMDST_DONE 3 /* cmd slot has been processed */ 95 /* flags defs */ 96 #define CMDFL_TIMEOUT 0x0001 /* cmd timed out */ 97 #define CMDFL_TAG 0x0002 /* tagged cmd */ 98 #define CMDFL_RESID 0x0004 /* current offset in table is partial */ 99 100 /* per-target struct */ 101 struct siop_common_target { 102 int status; /* target status, see below */ 103 int flags; /* target flags, see below */ 104 uint32_t id; /* for SELECT FROM */ 105 int period; 106 int offset; 107 }; 108 109 /* target status */ 110 #define TARST_PROBING 0 /* target is being probed */ 111 #define TARST_ASYNC 1 /* target needs sync/wide negotiation */ 112 #define TARST_WIDE_NEG 2 /* target is doing wide negotiation */ 113 #define TARST_SYNC_NEG 3 /* target is doing sync negotiation */ 114 #define TARST_PPR_NEG 4 /* target is doing sync negotiation */ 115 #define TARST_OK 5 /* sync/wide agreement is valid */ 116 117 /* target flags */ 118 #define TARF_SYNC 0x01 /* target can do sync */ 119 #define TARF_WIDE 0x02 /* target can do wide */ 120 #define TARF_TAG 0x04 /* target can do tags */ 121 #define TARF_DT 0x08 /* target can do DT clocking */ 122 #define TARF_ISWIDE 0x10 /* target is wide */ 123 #define TARF_ISDT 0x20 /* target is doing DT clocking */ 124 125 /* Driver internal state */ 126 struct siop_common_softc { 127 device_t sc_dev; 128 struct scsipi_channel sc_chan; 129 struct scsipi_adapter sc_adapt; 130 int features; /* chip's features */ 131 int ram_size; 132 int maxburst; 133 int maxoff; 134 int clock_div; /* async. clock divider (scntl3) */ 135 int clock_period; /* clock period (ns * 10) */ 136 int st_minsync; /* min and max sync period, */ 137 int dt_minsync; 138 int st_maxsync; /* as sent in or PPR messages */ 139 int dt_maxsync; 140 int mode; /* current SE/LVD/HVD mode */ 141 bus_space_tag_t sc_rt; /* bus_space registers tag */ 142 bus_space_handle_t sc_rh; /* bus_space registers handle */ 143 bus_addr_t sc_raddr; /* register addresses */ 144 bus_space_tag_t sc_ramt; /* bus_space ram tag */ 145 bus_space_handle_t sc_ramh; /* bus_space ram handle */ 146 bus_dma_tag_t sc_dmat; /* bus DMA tag */ 147 void (*sc_reset)(struct siop_common_softc*); /* reset callback */ 148 bus_dmamap_t sc_scriptdma; /* DMA map for script */ 149 bus_addr_t sc_scriptaddr; /* on-board ram or physical address */ 150 uint32_t *sc_script; /* script location in memory */ 151 struct siop_common_target *targets[16]; /* per-target states */ 152 }; 153 154 /* features */ 155 #define SF_BUS_WIDE 0x00000001 /* wide bus */ 156 #define SF_BUS_ULTRA 0x00000002 /* Ultra (20MHz) bus */ 157 #define SF_BUS_ULTRA2 0x00000004 /* Ultra2 (40MHz) bus */ 158 #define SF_BUS_ULTRA3 0x00000008 /* Ultra3 (80MHz) bus */ 159 #define SF_BUS_DIFF 0x00000010 /* differential bus */ 160 161 #define SF_CHIP_LED0 0x00000100 /* led on GPIO0 */ 162 #define SF_CHIP_LEDC 0x00000200 /* led on GPIO0 with hardware control */ 163 #define SF_CHIP_DBLR 0x00000400 /* clock doubler or quadrupler */ 164 #define SF_CHIP_QUAD 0x00000800 /* clock quadrupler, with PPL */ 165 #define SF_CHIP_FIFO 0x00001000 /* large fifo */ 166 #define SF_CHIP_PF 0x00002000 /* Instructions prefetch */ 167 #define SF_CHIP_RAM 0x00004000 /* on-board RAM */ 168 #define SF_CHIP_LS 0x00008000 /* load/store instruction */ 169 #define SF_CHIP_10REGS 0x00010000 /* 10 scratch registers */ 170 #define SF_CHIP_DFBC 0x00020000 /* Use DFBC register */ 171 #define SF_CHIP_DT 0x00040000 /* DT clocking */ 172 #define SF_CHIP_GEBUG 0x00080000 /* SCSI gross error bug */ 173 #define SF_CHIP_AAIP 0x00100000 /* Always generate AIP regardless of SNCTL4*/ 174 #define SF_CHIP_BE 0x00200000 /* big-endian */ 175 #define SF_CHIP_USEPCIC 0x00400000 /* use PCI clock */ 176 177 #define SF_PCI_RL 0x01000000 /* PCI read line */ 178 #define SF_PCI_RM 0x02000000 /* PCI read multiple */ 179 #define SF_PCI_BOF 0x04000000 /* PCI burst opcode fetch */ 180 #define SF_PCI_CLS 0x08000000 /* PCI cache line size */ 181 #define SF_PCI_WRI 0x10000000 /* PCI write and invalidate */ 182 183 int siop_common_attach(struct siop_common_softc *); 184 void siop_common_reset(struct siop_common_softc *); 185 void siop_setuptables(struct siop_common_cmd *); 186 int siop_modechange(struct siop_common_softc *); 187 188 int siop_wdtr_neg(struct siop_common_cmd *); 189 int siop_sdtr_neg(struct siop_common_cmd *); 190 int siop_ppr_neg(struct siop_common_cmd *); 191 void siop_sdtr_msg(struct siop_common_cmd *, int, int, int); 192 void siop_wdtr_msg(struct siop_common_cmd *, int, int); 193 void siop_ppr_msg(struct siop_common_cmd *, int, int, int); 194 void siop_update_xfer_mode(struct siop_common_softc *, int); 195 int siop_iwr(struct siop_common_cmd *); 196 /* actions to take at return of siop_wdtr_neg(), siop_sdtr_neg() and siop_iwr */ 197 #define SIOP_NEG_NOP 0x0 198 #define SIOP_NEG_MSGOUT 0x1 199 #define SIOP_NEG_ACK 0x2 200 201 void siop_minphys(struct buf *); 202 int siop_ioctl(struct scsipi_channel *, u_long, 203 void *, int, struct proc *); 204 void siop_ma (struct siop_common_cmd *); 205 void siop_sdp(struct siop_common_cmd *, int); 206 void siop_update_resid(struct siop_common_cmd *, int); 207 void siop_clearfifo(struct siop_common_softc *); 208 void siop_resetbus(struct siop_common_softc *); 209 210 #define siop_htoc32(sc, x) \ 211 (((sc)->features & SF_CHIP_BE) ? htobe32((x)) : htole32((x))) 212 213 #define siop_ctoh32(sc, x) \ 214 (((sc)->features & SF_CHIP_BE) ? be32toh((x)) : le32toh((x))) 215