1 /*        $NetBSD: fmvreg.h,v 1.2 2024/07/20 20:53:53 andvar Exp $    */
2 
3 /*
4  * All Rights Reserved, Copyright (C) Fujitsu Limited 1995
5  *
6  * This software may be used, modified, copied, distributed, and sold,
7  * in both source and binary form provided that the above copyright,
8  * these terms and the following disclaimer are retained.  The name of
9  * the author and/or the contributor may not be used to endorse or
10  * promote products derived from this software without specific prior
11  * written permission.
12  *
13  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND THE CONTRIBUTOR ``AS IS'' AND
14  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
15  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
16  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR THE CONTRIBUTOR BE LIABLE
17  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
18  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
19  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
20  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
21  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
22  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
23  * SUCH DAMAGE.
24  */
25 
26 /*
27  * Hardware specification of various 86960/86965 based Ethernet cards.
28  * Contributed by M.S. <seki@sysrap.cs.fujitsu.co.jp>
29  */
30 
31 /*
32  * Registers on FMV-180 series' ISA bus interface ASIC.
33  * I'm not sure the following register names are appropriate.
34  * Doesn't it look silly, eh?  FIXME.
35  */
36 
37 #define FE_FMV0               16        /* Hardware status.           */
38 #define FE_FMV1               17        /* Hardware type?  Always 0   */
39 #define FE_FMV2               18        /* Hardware configuration.    */
40 #define FE_FMV3               19        /* Hardware enable.           */
41 #define FE_FMV4               20        /* Station address #1                   */
42 #define FE_FMV5               21        /* Station address #2                   */
43 #define FE_FMV6               22        /* Station address #3                   */
44 #define FE_FMV7               23        /* Station address #4                   */
45 #define FE_FMV8               24        /* Station address #5                   */
46 #define FE_FMV9               25        /* Station address #6                   */
47 #define FE_FMV10    26        /* Unknown; to be set to 0.   */
48 
49 /*
50  * FMV-180 series' ASIC register values.
51  */
52 
53 /* Magic value in FMV0 register.  */
54 #define FE_FMV0_MAGIC_MASK    0x78
55 #define FE_FMV0_MAGIC_VALUE   0x50
56 
57 /* Model identification.  */
58 #define FE_FMV0_MODEL                   0x07
59 #define FE_FMV0_MODEL_FMV181  0x05      /* FMV-181/181A               */
60 #define FE_FMV0_MODEL_FMV182  0x03      /* FMV-182/182A/184 */
61 #define FE_FMV0_MODEL_FMV183  0x04      /* FMV-183                    */
62 
63 /* Card type ID */
64 #define FE_FMV1_MAGIC_MASK    0xB0
65 #define FE_FMV1_MAGIC_VALUE   0x00
66 #define FE_FMV1_CARDID_REV    0x0F
67 #define FE_FMV1_CARDID_REV_A  0x01      /* FMV-181A/182A    */
68 #define FE_FMV1_CARDID_PNP    0x08      /* FMV-183/184                */
69 
70 /* I/O port address assignment.  */
71 #define FE_FMV2_ADDR                    0x07
72 #define FE_FMV2_ADDR_SHIFT    0
73 
74 /* Boot ROM address assignment.  */
75 #define FE_FMV2_ROM           0x38
76 #define FE_FMV2_ROM_SHIFT     3
77 
78 /* IRQ assignment.  */
79 #define FE_FMV2_IRQ           0xC0
80 #define FE_FMV2_IRQ_SHIFT     6
81 
82 /* Hardware(?) enable flag.  */
83 #define FE_FMV3_ENABLE_FLAG   0x80
84 
85 /* Extra bits in FMV3 register.  Always 0?  */
86 #define FE_FMV3_EXTRA_MASK    0x7F
87 #define FE_FMV3_EXTRA_VALUE   0x00
88