1 /* $NetBSD: twl4030.c,v 1.6 2021/01/27 03:10:21 thorpej Exp $ */
2
3 /*-
4 * Copyright (c) 2019 Jared McNeill <jmcneill@invisible.ca>
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
17 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
18 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
19 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26 * POSSIBILITY OF SUCH DAMAGE.
27 */
28
29 #include "opt_fdt.h"
30
31 #include <sys/cdefs.h>
32 __KERNEL_RCSID(0, "$NetBSD: twl4030.c,v 1.6 2021/01/27 03:10:21 thorpej Exp $");
33
34 #include <sys/param.h>
35 #include <sys/systm.h>
36 #include <sys/kernel.h>
37 #include <sys/device.h>
38 #include <sys/conf.h>
39 #include <sys/bus.h>
40 #include <sys/kmem.h>
41 #include <sys/gpio.h>
42
43 #include <dev/i2c/i2cvar.h>
44
45 #include <dev/fdt/fdtvar.h>
46
47 #define TWL_PIN_COUNT 16
48
49 /* TWL4030 is a multi-function IC. Each module is at a separate I2C address */
50 #define ADDR_USB 0x00
51 #define ADDR_INT 0x01
52 #define ADDR_AUX 0x02
53 #define ADDR_POWER 0x03
54
55 /* INTBR registers */
56 #define IDCODE_7_0 0x85
57 #define IDCODE_15_8 0x86
58 #define IDCODE_23_16 0x87
59 #define IDCODE_31_24 0x88
60
61 /* GPIO registers */
62 #define GPIOBASE 0x98
63 #define GPIODATAIN(pin) (GPIOBASE + 0x00 + (pin) / 8)
64 #define GPIODATADIR(pin) (GPIOBASE + 0x03 + (pin) / 8)
65 #define CLEARGPIODATAOUT(pin) (GPIOBASE + 0x09 + (pin) / 8)
66 #define SETGPIODATAOUT(pin) (GPIOBASE + 0x0c + (pin) / 8)
67 #define PIN_BIT(pin) __BIT((pin) % 8)
68 #define GPIOPUPDCTR(pin) (GPIOBASE + 0x13 + (n) / 4)
69 #define PUPD_BITS(pin) __BITS((pin) % 4 + 1, (pin) % 4)
70
71 /* POWER registers */
72 #define SECONDS_REG 0x1c
73 #define MINUTES_REG 0x1d
74 #define HOURS_REG 0x1e
75 #define DAYS_REG 0x1f
76 #define MONTHS_REG 0x20
77 #define YEARS_REG 0x21
78 #define WEEKS_REG 0x22
79 #define RTC_CTRL_REG 0x29
80 #define GET_TIME __BIT(6)
81 #define STOP_RTC __BIT(0)
82
83 struct twl_softc {
84 device_t sc_dev;
85 i2c_tag_t sc_i2c;
86 i2c_addr_t sc_addr;
87 int sc_phandle;
88
89 int sc_npins;
90
91 struct todr_chip_handle sc_todr;
92 };
93
94 struct twl_pin {
95 struct twl_softc *pin_sc;
96 int pin_num;
97 int pin_flags;
98 bool pin_actlo;
99 };
100
101 static const struct device_compatible_entry compat_data[] = {
102 { .compat = "ti,twl4030" },
103 DEVICE_COMPAT_EOL
104 };
105
106 #ifdef FDT
107 static const struct device_compatible_entry rtc_compat_data[] = {
108 { .compat = "ti,twl4030-rtc" },
109 DEVICE_COMPAT_EOL
110 };
111
112 static const struct device_compatible_entry gpio_compat_data[] = {
113 { .compat = "ti,twl4030-gpio" },
114 DEVICE_COMPAT_EOL
115 };
116 #endif
117
118 static uint8_t
twl_read(struct twl_softc * sc,uint8_t mod,uint8_t reg,int flags)119 twl_read(struct twl_softc *sc, uint8_t mod, uint8_t reg, int flags)
120 {
121 uint8_t val = 0;
122 int error;
123
124 error = iic_exec(sc->sc_i2c, I2C_OP_READ_WITH_STOP, sc->sc_addr + mod,
125 ®, 1, &val, 1, flags);
126 if (error != 0)
127 aprint_error_dev(sc->sc_dev, "error reading reg %#x: %d\n", reg, error);
128
129 return val;
130 }
131
132 static void
twl_write(struct twl_softc * sc,uint8_t mod,uint8_t reg,uint8_t val,int flags)133 twl_write(struct twl_softc *sc, uint8_t mod, uint8_t reg, uint8_t val, int flags)
134 {
135 uint8_t buf[2];
136 int error;
137
138 buf[0] = reg;
139 buf[1] = val;
140
141 error = iic_exec(sc->sc_i2c, I2C_OP_WRITE_WITH_STOP, sc->sc_addr + mod,
142 NULL, 0, buf, 2, flags);
143 if (error != 0)
144 aprint_error_dev(sc->sc_dev, "error writing reg %#x: %d\n", reg, error);
145 }
146
147 #define I2C_LOCK(sc) iic_acquire_bus((sc)->sc_i2c, I2C_F_POLL)
148 #define I2C_UNLOCK(sc) iic_release_bus((sc)->sc_i2c, I2C_F_POLL)
149
150 #define INT_READ(sc, reg) twl_read((sc), ADDR_INT, (reg), I2C_F_POLL)
151 #define INT_WRITE(sc, reg, val) twl_write((sc), ADDR_INT, (reg), (val), I2C_F_POLL)
152
153 #define POWER_READ(sc, reg) twl_read((sc), ADDR_POWER, (reg), I2C_F_POLL)
154 #define POWER_WRITE(sc, reg, val) twl_write((sc), ADDR_POWER, (reg), (val), I2C_F_POLL)
155
156 static void
twl_rtc_enable(struct twl_softc * sc,bool onoff)157 twl_rtc_enable(struct twl_softc *sc, bool onoff)
158 {
159 uint8_t rtc_ctrl;
160
161 rtc_ctrl = POWER_READ(sc, RTC_CTRL_REG);
162 if (onoff)
163 rtc_ctrl |= STOP_RTC; /* 1: RTC is running */
164 else
165 rtc_ctrl &= ~STOP_RTC; /* 0: RTC is frozen */
166 POWER_WRITE(sc, RTC_CTRL_REG, rtc_ctrl);
167 }
168
169 static int
twl_rtc_gettime(todr_chip_handle_t tch,struct clock_ymdhms * dt)170 twl_rtc_gettime(todr_chip_handle_t tch, struct clock_ymdhms *dt)
171 {
172 struct twl_softc *sc = tch->cookie;
173 uint8_t seconds_reg, minutes_reg, hours_reg,
174 days_reg, months_reg, years_reg, weeks_reg;
175
176 iic_acquire_bus(sc->sc_i2c, I2C_F_POLL);
177 seconds_reg = POWER_READ(sc, SECONDS_REG);
178 minutes_reg = POWER_READ(sc, MINUTES_REG);
179 hours_reg = POWER_READ(sc, HOURS_REG);
180 days_reg = POWER_READ(sc, DAYS_REG);
181 months_reg = POWER_READ(sc, MONTHS_REG);
182 years_reg = POWER_READ(sc, YEARS_REG);
183 weeks_reg = POWER_READ(sc, WEEKS_REG);
184 iic_release_bus(sc->sc_i2c, I2C_F_POLL);
185
186 dt->dt_sec = bcdtobin(seconds_reg);
187 dt->dt_min = bcdtobin(minutes_reg);
188 dt->dt_hour = bcdtobin(hours_reg);
189 dt->dt_day = bcdtobin(days_reg);
190 dt->dt_mon = bcdtobin(months_reg);
191 dt->dt_year = bcdtobin(years_reg) + 2000;
192 dt->dt_wday = bcdtobin(weeks_reg);
193
194 return 0;
195 }
196
197 static int
twl_rtc_settime(todr_chip_handle_t tch,struct clock_ymdhms * dt)198 twl_rtc_settime(todr_chip_handle_t tch, struct clock_ymdhms *dt)
199 {
200 struct twl_softc *sc = tch->cookie;
201
202 iic_acquire_bus(sc->sc_i2c, I2C_F_POLL);
203 twl_rtc_enable(sc, false);
204 POWER_WRITE(sc, SECONDS_REG, bintobcd(dt->dt_sec));
205 POWER_WRITE(sc, MINUTES_REG, bintobcd(dt->dt_min));
206 POWER_WRITE(sc, HOURS_REG, bintobcd(dt->dt_hour));
207 POWER_WRITE(sc, DAYS_REG, bintobcd(dt->dt_day));
208 POWER_WRITE(sc, MONTHS_REG, bintobcd(dt->dt_mon));
209 POWER_WRITE(sc, YEARS_REG, bintobcd(dt->dt_year % 100));
210 POWER_WRITE(sc, WEEKS_REG, bintobcd(dt->dt_wday));
211 twl_rtc_enable(sc, true);
212 iic_release_bus(sc->sc_i2c, I2C_F_POLL);
213
214 return 0;
215 }
216
217 #ifdef FDT
218 static int
twl_gpio_config(struct twl_softc * sc,int pin,int flags)219 twl_gpio_config(struct twl_softc *sc, int pin, int flags)
220 {
221 uint8_t dir;
222
223 KASSERT(pin >= 0 && pin < sc->sc_npins);
224
225 dir = INT_READ(sc, GPIODATADIR(pin));
226
227 switch (flags & (GPIO_PIN_INPUT|GPIO_PIN_OUTPUT)) {
228 case GPIO_PIN_INPUT:
229 dir &= ~PIN_BIT(pin);
230 break;
231 case GPIO_PIN_OUTPUT:
232 dir |= PIN_BIT(pin);
233 break;
234 default:
235 return EINVAL;
236 }
237
238 INT_WRITE(sc, GPIODATADIR(pin), dir);
239
240 return 0;
241 }
242
243 static void *
twl_gpio_acquire(device_t dev,const void * data,size_t len,int flags)244 twl_gpio_acquire(device_t dev, const void *data, size_t len, int flags)
245 {
246 struct twl_softc * const sc = device_private(dev);
247 struct twl_pin *gpin;
248 const u_int *gpio = data;
249 int error;
250
251 if (len != 12)
252 return NULL;
253
254 const uint8_t pin = be32toh(gpio[1]) & 0xff;
255 const bool actlo = (be32toh(gpio[2]) & __BIT(0)) != 0;
256
257 if (pin >= sc->sc_npins)
258 return NULL;
259
260 I2C_LOCK(sc);
261 error = twl_gpio_config(sc, pin, flags);
262 I2C_UNLOCK(sc);
263
264 if (error != 0) {
265 device_printf(dev, "bad pin %d config %#x\n", pin, flags);
266 return NULL;
267 }
268
269 gpin = kmem_zalloc(sizeof(*gpin), KM_SLEEP);
270 gpin->pin_sc = sc;
271 gpin->pin_num = pin;
272 gpin->pin_flags = flags;
273 gpin->pin_actlo = actlo;
274
275 return gpin;
276 }
277
278 static void
twl_gpio_release(device_t dev,void * priv)279 twl_gpio_release(device_t dev, void *priv)
280 {
281 struct twl_softc * const sc = device_private(dev);
282 struct twl_pin *gpin = priv;
283
284 I2C_LOCK(sc);
285 twl_gpio_config(sc, gpin->pin_num, GPIO_PIN_INPUT);
286 I2C_UNLOCK(sc);
287
288 kmem_free(gpin, sizeof(*gpin));
289 }
290
291 static int
twl_gpio_read(device_t dev,void * priv,bool raw)292 twl_gpio_read(device_t dev, void *priv, bool raw)
293 {
294 struct twl_softc * const sc = device_private(dev);
295 struct twl_pin *gpin = priv;
296 uint8_t gpio;
297 int val;
298
299 I2C_LOCK(sc);
300 gpio = INT_READ(sc, GPIODATAIN(gpin->pin_num));
301 I2C_UNLOCK(sc);
302
303 val = __SHIFTOUT(gpio, PIN_BIT(gpin->pin_num));
304 if (!raw && gpin->pin_actlo)
305 val = !val;
306
307 return val;
308 }
309
310 static void
twl_gpio_write(device_t dev,void * priv,int val,bool raw)311 twl_gpio_write(device_t dev, void *priv, int val, bool raw)
312 {
313 struct twl_softc * const sc = device_private(dev);
314 struct twl_pin *gpin = priv;
315
316 if (!raw && gpin->pin_actlo)
317 val = !val;
318
319 I2C_LOCK(sc);
320 if (val)
321 INT_WRITE(sc, SETGPIODATAOUT(gpin->pin_num), PIN_BIT(gpin->pin_num));
322 else
323 INT_WRITE(sc, CLEARGPIODATAOUT(gpin->pin_num), PIN_BIT(gpin->pin_num));
324 I2C_UNLOCK(sc);
325 }
326
327 static struct fdtbus_gpio_controller_func twl_gpio_funcs = {
328 .acquire = twl_gpio_acquire,
329 .release = twl_gpio_release,
330 .read = twl_gpio_read,
331 .write = twl_gpio_write,
332 };
333 #endif /* !FDT */
334
335 static void
twl_rtc_attach(struct twl_softc * sc,const int phandle)336 twl_rtc_attach(struct twl_softc *sc, const int phandle)
337 {
338 iic_acquire_bus(sc->sc_i2c, I2C_F_POLL);
339 twl_rtc_enable(sc, true);
340 iic_release_bus(sc->sc_i2c, I2C_F_POLL);
341
342 sc->sc_todr.todr_gettime_ymdhms = twl_rtc_gettime;
343 sc->sc_todr.todr_settime_ymdhms = twl_rtc_settime;
344 sc->sc_todr.cookie = sc;
345 #ifdef FDT
346 fdtbus_todr_attach(sc->sc_dev, phandle, &sc->sc_todr);
347 #else
348 todr_attach(&sc->sc_todr);
349 #endif
350 }
351
352 static void
twl_gpio_attach(struct twl_softc * sc,const int phandle)353 twl_gpio_attach(struct twl_softc *sc, const int phandle)
354 {
355 #ifdef FDT
356 fdtbus_register_gpio_controller(sc->sc_dev, phandle, &twl_gpio_funcs);
357 #endif
358 }
359
360 static int
twl_match(device_t parent,cfdata_t match,void * aux)361 twl_match(device_t parent, cfdata_t match, void *aux)
362 {
363 struct i2c_attach_args *ia = aux;
364 int match_result;
365
366 if (iic_use_direct_match(ia, match, compat_data, &match_result))
367 return match_result;
368
369 if (ia->ia_addr == 0x48)
370 return I2C_MATCH_ADDRESS_ONLY;
371
372 return 0;
373 }
374
375 static void
twl_attach(device_t parent,device_t self,void * aux)376 twl_attach(device_t parent, device_t self, void *aux)
377 {
378 struct twl_softc * const sc = device_private(self);
379 struct i2c_attach_args *ia = aux;
380 uint32_t idcode;
381
382 sc->sc_dev = self;
383 sc->sc_i2c = ia->ia_tag;
384 sc->sc_addr = ia->ia_addr;
385 sc->sc_phandle = ia->ia_cookie;
386 sc->sc_npins = TWL_PIN_COUNT;
387
388 aprint_naive("\n");
389 aprint_normal(": TWL4030");
390
391 #ifdef FDT
392 for (int child = OF_child(sc->sc_phandle); child; child = OF_peer(child)) {
393 if (of_compatible_match(child, gpio_compat_data)) {
394 aprint_normal(", GPIO");
395 twl_gpio_attach(sc, child);
396 } else if (of_compatible_match(child, rtc_compat_data)) {
397 aprint_normal(", RTC");
398 twl_rtc_attach(sc, child);
399 }
400 }
401 #else
402 aprint_normal("\n");
403 twl_gpio_attach(sc, -1);
404 twl_rtc_attach(sc, -1);
405 #endif
406
407 I2C_LOCK(sc);
408 idcode = INT_READ(sc, IDCODE_7_0);
409 idcode |= (uint32_t)INT_READ(sc, IDCODE_15_8) << 8;
410 idcode |= (uint32_t)INT_READ(sc, IDCODE_23_16) << 16;
411 idcode |= (uint32_t)INT_READ(sc, IDCODE_31_24) << 24;
412 I2C_UNLOCK(sc);
413
414 aprint_normal(", IDCODE 0x%08x\n", idcode);
415 }
416
417 CFATTACH_DECL_NEW(twl, sizeof(struct twl_softc),
418 twl_match, twl_attach, NULL, NULL);
419