1 /*        $NetBSD: em3027reg.h,v 1.1 2018/01/05 03:07:15 uwe Exp $ */
2 /*
3  * Copyright (c) 2018 Valery Ushakov
4  * All rights reserved.
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  *
15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
21  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
22  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25  */
26 
27 /*
28  * EM Microelectronic EM3027 RTC
29  */
30 #ifndef _EM3027REG_H_
31 #define _EM3027REG_H_
32 
33 #define EM3027_ADDR 0x56
34 
35 
36 /*
37  * Control Page: 0
38  */
39 #define EM3027_ONOFF                    0x00
40 #define   EM3027_ONOFF_CLKOUT           0x80      /* 0: IRQ, 1: CLK */
41 #define   EM3027_ONOFF_SR               0x10      /* self-recovery */
42 #define   EM3027_ONOFF_EEREF            0x08      /* EEPROM self-refresh */
43 #define   EM3027_ONOFF_TR               0x04      /* timer auto-reload */
44 #define   EM3027_ONOFF_TI               0x02      /* timer */
45 #define   EM3027_ONOFF_WA               0x01      /* watch */
46 
47 #define EM3027_IRQ_CTL                  0x01
48 #define EM3027_IRQ_FLAGS      0x02
49 
50 /* For both EM3027_IRQ_CTL and EM3027_IRQ_FLAGS */
51 #define   EM3027_IRQ_SR                           0x10      /* self-recovery */
52 #define   EM3027_IRQ_V2                           0x08      /* VLow2 */
53 #define   EM3027_IRQ_V1                           0x04      /* VLow1 */
54 #define   EM3027_IRQ_TINT               0x02      /* timer */
55 #define   EM3027_IRQ_AINT               0x01      /* alarm */
56 
57 #define EM3027_STATUS                   0x03
58 #define   EM3027_STATUS_EEBUSY                    0x80      /* r/o: write or self-refresh */
59 #define   EM3027_STATUS_POWER_ON        0x20
60 #define   EM3027_STATUS_RESET           0x10      /* after reset or recovery */
61 #define   EM3027_STATUS_VLOW2           0x08      /* voltage lost */
62 #define   EM3027_STATUS_VLOW1           0x04      /* voltage low */
63 
64 /* Request system reset */
65 #define EM3027_RESET                    0x04
66 #define   EM3027_RESET_SYSRES           0x10
67 
68 
69 /*
70  * Watch Page: 1
71  */
72 #define EM3027_WATCH_SEC      0x08      /* 0..59 */
73 #define EM3027_WATCH_MIN      0x09      /* 0..59 */
74 #define EM3027_WATCH_HOUR     0x0a      /* 0..23 or 1..12 */
75 #define   EM3027_WATCH_HOUR_S12                   0x40      /* select 12/24 hours */
76 #define   EM3027_WATCH_HOUR_PM                    0x20      /* am/pm if 12 hours */
77 #define EM3027_WATCH_DAY      0x0b      /* 1..31 */
78 #define EM3027_WATCH_WDAY     0x0c      /* 1..7 */
79 #define EM3027_WATCH_MON      0x0d      /* 1..12 */
80 #define EM3027_WATCH_YEAR     0x0e      /* 0..79 */
81 
82 
83 /*
84  * Alarm Page: 2
85  *
86  * Same format as watch registers except there's no S12 bit in the
87  * hours register and the upper bit (EM3027_ALARM_ENABLE) in each
88  * register selects it for comparison.
89  */
90 #define EM3027_ALARM_SEC      0x10
91 #define EM3027_ALARM_MIN      0x11
92 #define EM3027_ALARM_HOUR     0x12
93 #define EM3027_ALARM_DATE     0x13
94 #define EM3027_ALARM_DAYS     0x14
95 #define EM3027_ALARM_MON      0x15
96 #define EM3027_ALARM_YEAR     0x16
97 
98 /* MSB in each alarm register enables comparison */
99 #define   EM3027_ALARM_ENABLE           0x80
100 
101 
102 /*
103  * Timer Page: 3
104  */
105 #define EM3027_TIMER_LO                 0x18
106 #define EM3027_TIMER_HI                 0x19
107 
108 
109 /*
110  * Temperature Page: 4
111  */
112 #define EM3027_TEMP           0x20      /* -60..195C */
113 #define   EM3027_TEMP_BASE              (-60)
114 
115 
116 /*
117  * EEPROM Control Page: 6
118  */
119 #define EM3027_EEPROM_CTL     0x30
120 
121 /* Trickle charger resistors */
122 #define   EM3027_EEPROM_CHARGER_MASK    0xf0
123 #define   EM3027_EEPROM_R80K            0x80
124 #define   EM3027_EEPROM_R20K            0x40
125 #define   EM3027_EEPROM_R5K             0x20
126 #define   EM3027_EEPROM_R1_5K           0x10
127 
128 /* Frequency compensated for temperature (0x00 selects raw
129    uncompensated 32768KHz */
130 #define   EM3027_EEPROM_FREQ_MASK       0x0c
131 #define   EM3027_EEPROM_FREQ_1HZ        0x0c
132 #define   EM3027_EEPROM_FREQ_32HZ       0x08
133 #define   EM3027_EEPROM_FREQ_1024HZ     0x04
134 
135 #define   EM3027_EEPROM_THERM_ENABLE    0x02
136 #define   EM3027_EEPROM_THERM_PERIOD    0x01      /* 0: 1s, 1: 16s */
137 
138 #endif    /* _EM3027REG_H_ */
139