1 /* $NetBSD: uha_eisa.c,v 1.39 2021/01/27 04:35:15 thorpej Exp $ */
2
3 /*-
4 * Copyright (c) 1998 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Charles M. Hannum.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
30 */
31
32 #include <sys/cdefs.h>
33 __KERNEL_RCSID(0, "$NetBSD: uha_eisa.c,v 1.39 2021/01/27 04:35:15 thorpej Exp $");
34
35 #include "opt_ddb.h"
36
37 #include <sys/param.h>
38 #include <sys/systm.h>
39 #include <sys/device.h>
40 #include <sys/kernel.h>
41 #include <sys/proc.h>
42
43 #include <sys/bus.h>
44 #include <sys/intr.h>
45
46 #include <dev/scsipi/scsi_all.h>
47 #include <dev/scsipi/scsipi_all.h>
48 #include <dev/scsipi/scsiconf.h>
49
50 #include <dev/eisa/eisavar.h>
51 #include <dev/eisa/eisadevs.h>
52
53 #include <dev/ic/uhareg.h>
54 #include <dev/ic/uhavar.h>
55
56 #define UHA_EISA_SLOT_OFFSET 0xc80
57 #define UHA_EISA_IOSIZE 0x020
58
59 static int uha_eisa_match(device_t, cfdata_t, void *);
60 static void uha_eisa_attach(device_t, device_t, void *);
61
62 CFATTACH_DECL_NEW(uha_eisa, sizeof(struct uha_softc),
63 uha_eisa_match, uha_eisa_attach, NULL, NULL);
64
65 #ifndef DDB
66 #define Debugger() panic("should call debugger here (uha_eisa.c)")
67 #endif /* ! DDB */
68
69 static int u24_find(bus_space_tag_t, bus_space_handle_t,
70 struct uha_probe_data *);
71 static void u24_start_mbox(struct uha_softc *, struct uha_mscp *);
72 static int u24_poll(struct uha_softc *, struct scsipi_xfer *, int);
73 static int u24_intr(void *);
74 static void u24_init(struct uha_softc *);
75
76 static const struct device_compatible_entry compat_data[] = {
77 { .compat = "USC024?", .data = EISA_PRODUCT_USC0240 },
78 DEVICE_COMPAT_EOL
79 };
80
81 /*
82 * Check the slots looking for a board we recognise
83 * If we find one, note its address (slot) and call
84 * the actual probe routine to check it out.
85 */
86 static int
uha_eisa_match(device_t parent,cfdata_t match,void * aux)87 uha_eisa_match(device_t parent, cfdata_t match,
88 void *aux)
89 {
90 struct eisa_attach_args *ea = aux;
91 bus_space_tag_t iot = ea->ea_iot;
92 bus_space_handle_t ioh;
93 int rv;
94
95 if (!eisa_compatible_match(ea, compat_data))
96 return (0);
97
98 if (bus_space_map(iot, EISA_SLOT_ADDR(ea->ea_slot) +
99 UHA_EISA_SLOT_OFFSET, UHA_EISA_IOSIZE, 0, &ioh))
100 return (0);
101
102 rv = u24_find(iot, ioh, NULL);
103
104 bus_space_unmap(iot, ioh, UHA_EISA_IOSIZE);
105
106 return (rv);
107 }
108
109 /*
110 * Attach all the sub-devices we can find
111 */
112 static void
uha_eisa_attach(device_t parent,device_t self,void * aux)113 uha_eisa_attach(device_t parent, device_t self, void *aux)
114 {
115 struct eisa_attach_args *ea = aux;
116 struct uha_softc *sc = device_private(self);
117 const struct device_compatible_entry *dce;
118 bus_space_tag_t iot = ea->ea_iot;
119 bus_dma_tag_t dmat = ea->ea_dmat;
120 bus_space_handle_t ioh;
121 struct uha_probe_data upd;
122 eisa_chipset_tag_t ec = ea->ea_ec;
123 eisa_intr_handle_t ih;
124 const char *intrstr;
125 char intrbuf[EISA_INTRSTR_LEN];
126
127 dce = eisa_compatible_lookup(ea, compat_data);
128 KASSERT(dce != NULL);
129
130 printf(": %s\n", (const char *)dce->data);
131
132 if (bus_space_map(iot, EISA_SLOT_ADDR(ea->ea_slot) +
133 UHA_EISA_SLOT_OFFSET, UHA_EISA_IOSIZE, 0, &ioh))
134 panic("uha_eisa_attach: could not map I/O addresses");
135
136 sc->sc_dev = self;
137 sc->sc_iot = iot;
138 sc->sc_ioh = ioh;
139 sc->sc_dmat = dmat;
140 if (!u24_find(iot, ioh, &upd))
141 panic("uha_eisa_attach: u24_find failed!");
142
143 sc->sc_dmaflags = 0;
144
145 if (eisa_intr_map(ec, upd.sc_irq, &ih)) {
146 aprint_error_dev(sc->sc_dev, "couldn't map interrupt (%d)\n",
147 upd.sc_irq);
148 return;
149 }
150 intrstr = eisa_intr_string(ec, ih, intrbuf, sizeof(intrbuf));
151 sc->sc_ih = eisa_intr_establish(ec, ih, IST_LEVEL, IPL_BIO,
152 u24_intr, sc);
153 if (sc->sc_ih == NULL) {
154 aprint_error_dev(sc->sc_dev, "couldn't establish interrupt");
155 if (intrstr != NULL)
156 aprint_error(" at %s", intrstr);
157 aprint_error("\n");
158 return;
159 }
160 aprint_normal_dev(sc->sc_dev, "interrupting at %s\n", intrstr);
161
162 /* Save function pointers for later use. */
163 sc->start_mbox = u24_start_mbox;
164 sc->poll = u24_poll;
165 sc->init = u24_init;
166
167 uha_attach(sc, &upd);
168 }
169
170 static int
u24_find(bus_space_tag_t iot,bus_space_handle_t ioh,struct uha_probe_data * sc)171 u24_find(bus_space_tag_t iot, bus_space_handle_t ioh,
172 struct uha_probe_data *sc)
173 {
174 u_int8_t config0, config1, config2;
175 int irq, drq;
176 int resetcount = 4000; /* 4 secs? */
177
178 config0 = bus_space_read_1(iot, ioh, U24_CONFIG + 0);
179 config1 = bus_space_read_1(iot, ioh, U24_CONFIG + 1);
180 config2 = bus_space_read_1(iot, ioh, U24_CONFIG + 2);
181 if ((config0 & U24_MAGIC1) == 0 ||
182 (config1 & U24_MAGIC2) == 0)
183 return (0);
184
185 drq = -1;
186
187 switch (config0 & U24_IRQ_MASK) {
188 case U24_IRQ10:
189 irq = 10;
190 break;
191 case U24_IRQ11:
192 irq = 11;
193 break;
194 case U24_IRQ14:
195 irq = 14;
196 break;
197 case U24_IRQ15:
198 irq = 15;
199 break;
200 default:
201 printf("u24_find: illegal irq setting %x\n",
202 config0 & U24_IRQ_MASK);
203 return (0);
204 }
205
206 bus_space_write_1(iot, ioh, U24_LINT, UHA_ASRST);
207
208 while (--resetcount) {
209 if (bus_space_read_1(iot, ioh, U24_LINT))
210 break;
211 delay(1000); /* 1 mSec per loop */
212 }
213 if (!resetcount) {
214 printf("u24_find: board timed out during reset\n");
215 return (0);
216 }
217
218 /* if we want to fill in softc, do so now */
219 if (sc) {
220 sc->sc_irq = irq;
221 sc->sc_drq = drq;
222 sc->sc_scsi_dev = config2 & U24_HOSTID_MASK;
223 }
224
225 return (1);
226 }
227
228 static void
u24_start_mbox(struct uha_softc * sc,struct uha_mscp * mscp)229 u24_start_mbox(struct uha_softc *sc, struct uha_mscp *mscp)
230 {
231 bus_space_tag_t iot = sc->sc_iot;
232 bus_space_handle_t ioh = sc->sc_ioh;
233 int spincount = 100000; /* 1s should be enough */
234
235 while (--spincount) {
236 if ((bus_space_read_1(iot, ioh, U24_LINT) & U24_LDIP) == 0)
237 break;
238 delay(100);
239 }
240 if (!spincount) {
241 aprint_error_dev(sc->sc_dev,
242 "uha_start_mbox, board not responding\n");
243 Debugger();
244 }
245
246 bus_space_write_4(iot, ioh, U24_OGMPTR,
247 sc->sc_dmamap_mscp->dm_segs[0].ds_addr + UHA_MSCP_OFF(mscp));
248 if (mscp->flags & MSCP_ABORT)
249 bus_space_write_1(iot, ioh, U24_OGMCMD, 0x80);
250 else
251 bus_space_write_1(iot, ioh, U24_OGMCMD, 0x01);
252 bus_space_write_1(iot, ioh, U24_LINT, U24_OGMFULL);
253
254 if ((mscp->xs->xs_control & XS_CTL_POLL) == 0)
255 callout_reset(&mscp->xs->xs_callout,
256 mstohz(mscp->timeout), uha_timeout, mscp);
257 }
258
259 static int
u24_poll(struct uha_softc * sc,struct scsipi_xfer * xs,int count)260 u24_poll(struct uha_softc *sc, struct scsipi_xfer *xs, int count)
261 {
262 bus_space_tag_t iot = sc->sc_iot;
263 bus_space_handle_t ioh = sc->sc_ioh;
264
265 while (count) {
266 /*
267 * If we had interrupts enabled, would we
268 * have got an interrupt?
269 */
270 if (bus_space_read_1(iot, ioh, U24_SINT) & U24_SDIP)
271 u24_intr(sc);
272 if (xs->xs_status & XS_STS_DONE)
273 return (0);
274 delay(1000);
275 count--;
276 }
277 return (1);
278 }
279
280 static int
u24_intr(void * arg)281 u24_intr(void *arg)
282 {
283 struct uha_softc *sc = arg;
284 bus_space_tag_t iot = sc->sc_iot;
285 bus_space_handle_t ioh = sc->sc_ioh;
286 struct uha_mscp *mscp;
287 u_char uhastat;
288 u_long mboxval;
289
290 #ifdef UHADEBUG
291 printf("%s: uhaintr ", device_xname(sc->sc_dev));
292 #endif /*UHADEBUG */
293
294 if ((bus_space_read_1(iot, ioh, U24_SINT) & U24_SDIP) == 0)
295 return (0);
296
297 for (;;) {
298 /*
299 * First get all the information and then
300 * acknowledge the interrupt
301 */
302 uhastat = bus_space_read_1(iot, ioh, U24_SINT);
303 mboxval = bus_space_read_4(iot, ioh, U24_ICMPTR);
304 bus_space_write_1(iot, ioh, U24_SINT, U24_ICM_ACK);
305 bus_space_write_1(iot, ioh, U24_ICMCMD, 0);
306
307 #ifdef UHADEBUG
308 printf("status = 0x%x ", uhastat);
309 #else
310 __USE(uhastat);
311 #endif /*UHADEBUG*/
312
313 /*
314 * Process the completed operation
315 */
316 mscp = uha_mscp_phys_kv(sc, mboxval);
317 if (!mscp) {
318 printf("%s: BAD MSCP RETURNED!\n",
319 device_xname(sc->sc_dev));
320 continue; /* whatever it was, it'll timeout */
321 }
322 callout_stop(&mscp->xs->xs_callout);
323 uha_done(sc, mscp);
324
325 if ((bus_space_read_1(iot, ioh, U24_SINT) & U24_SDIP) == 0)
326 return (1);
327 }
328 }
329
330 static void
u24_init(struct uha_softc * sc)331 u24_init(struct uha_softc *sc)
332 {
333 bus_space_tag_t iot = sc->sc_iot;
334 bus_space_handle_t ioh = sc->sc_ioh;
335
336 /* free OGM and ICM */
337 bus_space_write_1(iot, ioh, U24_OGMCMD, 0);
338 bus_space_write_1(iot, ioh, U24_ICMCMD, 0);
339 /* make sure interrupts are enabled */
340 #ifdef UHADEBUG
341 printf("u24_init: lmask=%02x, smask=%02x\n",
342 bus_space_read_1(iot, ioh, U24_LMASK),
343 bus_space_read_1(iot, ioh, U24_SMASK));
344 #endif
345 bus_space_write_1(iot, ioh, U24_LMASK, 0xd2); /* XXX */
346 bus_space_write_1(iot, ioh, U24_SMASK, 0x92); /* XXX */
347 }
348