1 /*        $NetBSD: qduser.h,v 1.6 2024/09/14 21:38:28 andvar Exp $    */
2 /*-
3  * Copyright (c) 1982, 1986 The Regents of the University of California.
4  * All rights reserved.
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  * 3. Neither the name of the University nor the names of its contributors
15  *    may be used to endorse or promote products derived from this software
16  *    without specific prior written permission.
17  *
18  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
19  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
22  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28  * SUCH DAMAGE.
29  *
30  *        @(#)qduser.h        7.1 (Berkeley) 5/9/91
31  */
32 
33 /* derived from: @(#)qduser.h 6.1       (ULTRIX)  11/24/87       */
34 /************************************************************************
35  *                                                                                        *
36  *                            Copyright (c) 1986 by                                       *
37  *                  Digital Equipment Corporation, Maynard, MA                  *
38  *                            All rights reserved.                                        *
39  *                                                                                        *
40  *   This software is furnished under a license and may be used and   *
41  *   copied  only  in accordance with the terms of such license and   *
42  *   with the  inclusion  of  the  above  copyright  notice.   This   *
43  *   software  or  any  other copies thereof may not be provided or   *
44  *   otherwise made available to any other person.  No title to and   *
45  *   ownership of the software is hereby transferred.                           *
46  *                                                                                        *
47  *   The information in this software is subject to change  without   *
48  *   notice  and should not be construed as a commitment by Digital   *
49  *   Equipment Corporation.                                                     *
50  *                                                                                        *
51  *   Digital assumes no responsibility for the use  or  reliability   *
52  *   of its software on equipment which is not supplied by Digital.   *
53  *                                                                                        *
54  ************************************************************************/
55 
56 /***************************************************************************
57 *
58 *         QDUSER...
59 *         This file defines values shared between the driver and a client
60 *
61 ***************************************************************************/
62 
63 /***************************************************************************
64 *         revision history:
65 ****************************************************************************
66 *
67 * 21 jul 86  ram    fixed define of CURSOR_MIN_Y
68 * 25 nov 85  longo  added macro and bit defines for DMA error flags
69 * 11 nov 85  longo  renamed _vs_eventqueue to "qdinput" struct
70 * 23 oct 85  longo  added more defines to the DMA stuff
71 * 17 oct 85  longo  changed "struct rgb" chars to be unsigned
72 * 16 oct 85  longo  added new TABLET support definitions
73 * 15 oct 85  longo  re-wrote DMA queue access macros
74 * 08 oct 85  longo  added status flag manipulation macros to DMA stuff
75 * 02 oct 85  longo  added support for color map write buffer loading
76 * 26 sep 85  longo  removed adder sertup params from DMA request struct
77 * 23 sep 85  longo  added DMA queue access macros
78 * 30 aug 85  longo  fixed crock in "qdiobuf" struct compile-time sizing. Also
79 *                       removed DMAcontrol struct from DMA buffer for field test
80 * 26 aug 85  longo  put in conditional include of "qevent.h" for user prg's
81 * 18 jul 85  longo  changed semantics so that head is tail and tail is head
82 * 12 jul 85  longo  moved "mouse_report" struct and defs over to qd_data.c
83 * 11 jul 85  longo  added device coordinate to gate array cursor coordinate
84 *                       transformation macros
85 * 03 jul 85  longo  changed kernel typdef's for data types to long-hand
86 * 10 may 85  longo  created
87 *
88 ***************************************************************************/
89 
90 #ifndef _QDUSER_H_
91 #define _QDUSER_H_
92 
93 #ifdef KERNEL
94 #include "../include/qevent.h"                    /* include event struct defs */
95 #else
96 #include <vax/qevent.h>
97 #endif
98 
99 /*---------------------
100 * QDSS device map */
101 
102           struct qdmap {                          /* map of register blocks in QDSS */
103 
104               char *template;
105               char *adder;
106               char *dga;
107               char *duart;
108               char *memcsr;
109               char *red;
110               char *blue;
111               char *green;
112           };
113 
114 /*--------------------------------------------
115 * DGA CSR bit definitions and register map */
116 
117 #define DMADONE               0x8000              /* DMA done status */
118 #define SET_DONE_FIFO         0x4000              /* set DMADONE when FIFO empty.. */
119                                                   /* ..AND count = 0 */
120 
121 #define PTOB_ENB    0x0600              /* host-to-bitmap DMA xfer */
122 #define BTOP_ENB    0x0400              /* bitmap-to-host DMA xfer */
123 #define DL_ENB                0x0200              /* display list DMA xfer */
124 #define HALT                  0x0000              /* halt DGA */
125 
126 #define BYTE_DMA    0x0100              /* byte/word DMA xfer */
127 
128 #define DMA_ERR               0x0080              /* DMA error bits */
129 #define PARITY_ERR  0x0040              /* memory parity error in DMA */
130 #define BUS_ERR               0x0020              /* bus timeout error in DMA */
131 
132 #define GLOBAL_IE   0x0004              /* global interrupt enable */
133 #define DMA_IE                0x0002              /* DMA interrupt enable */
134 #define CURS_ENB    0x0001              /* cursor enable */
135 
136 /* QDSS memcsr bit definitions */
137 
138 #define   UNBLANK                       0x0020
139 #define SYNC_ON                         0x0008
140 
141           struct dga {
142 
143               unsigned short csr;
144               unsigned short adrs_lo;   /* destination address of bitmap to */
145               unsigned short adrs_hi;   /*   host DMA */
146               unsigned short bytcnt_lo; /* byte length of requested DMA */
147               unsigned short bytcnt_hi; /* (WO = bytcnt) (RO = fifo count) */
148               unsigned short fifo;      /* FIFO register */
149               unsigned short x_cursor;  /* cursor position registers */
150               unsigned short y_cursor;
151               unsigned short ivr;                 /* interrupt vector register */
152               unsigned short memadr;    /* memory base address register */
153           };
154 
155 /*-------------------------------------------------------------------------
156 * macros to transform device coordinates to hardware cursor coordinates */
157 
158 #define CURS_MIN_X  232       /* device coordinate x = 0 */
159 #define CURS_MIN_Y  16        /* device coordinate y = 0 */
160 
161 #define TRANX(x) ( -(((int)(x)+CURS_MIN_X) & ~0x0003) | \
162                        (((int)(x)+CURS_MIN_X) & 0x0003) )
163 
164 #define TRANY(y) ( -((y)+CURS_MIN_Y) )
165 
166 /*********************************************************************
167 *
168 *         EVENT QUEUE DEFINITIONS
169 *
170 **********************************************************************
171 * most of the event queue definitions are found in "qevent.h".  But a
172 * few things not found there are here.  */
173 
174 /* The event queue header */
175 
176 struct qdinput {
177 
178               struct _vs_eventqueue header;  /* event queue ring handling */
179 
180               /* for VS100 and QVSS compatibility reasons, additions to this
181               *  structure must be made below this point.  */
182 
183               struct _vs_cursor curs_pos;         /* current mouse position */
184               struct _vs_box curs_box;  /* cursor reporting box */
185 
186           };
187 
188 /* vse_key field.  definitions for mouse buttons */
189 
190 #define VSE_LEFT_BUTTON                 0
191 #define VSE_MIDDLE_BUTTON     1
192 #define VSE_RIGHT_BUTTON      2
193 
194 /* vse_key field.  definitions for mouse buttons */
195 
196 #define VSE_T_LEFT_BUTTON     0
197 #define VSE_T_FRONT_BUTTON    1
198 #define VSE_T_RIGHT_BUTTON    2
199 #define VSE_T_BACK_BUTTON     4
200 
201 #define VSE_T_BARREL_BUTTON   VSE_T_LEFT_BUTTON
202 #define VSE_T_TIP_BUTTON      VSE_T_FRONT_BUTTON
203 
204 /*--------------------------------------------------------------------------
205 *   These are the macros to be used for loading and extracting from the event
206 * queue.  It is presumed that the macro user will only use the access macros
207 * if the event queue is non-empty ( ISEMPTY(eq) == FALSE ), and that the
208 * driver will only load the event queue after checking that it is not full
209 * ( ISFULL(eq) == FALSE ).  ("eq" is a pointer to the event queue header.)
210 *
211 *   Before an event access session for a particular event, the macro users
212 * must use the xxxBEGIN macro, and the xxxEND macro after an event is through
213 * with.  As seen below, the xxxBEGIN and xxxEND macros maintain the event
214 * queue access mechanism.
215 *
216 * First, the macros to be used by the event queue reader
217 */
218 
219 #define ISEMPTY(eq)   ((eq)->header.head == (eq)->header.tail)
220 #define GETBEGIN(eq)            (&(eq)->header.events[(eq)->header.head])
221 
222 #define GET_X(event)            ((event)->vse_x)                 /* get x position */
223 #define GET_Y(event)            ((event)->vse_y)                 /* get y position */
224 #define GET_TIME(event)         ((event)->vse_time)              /* get time */
225 #define GET_TYPE(event)         ((event)->vse_type)              /* get entry type */
226 #define GET_KEY(event)          ((event)->vse_key)               /* get keycode */
227 #define GET_DIR(event)          ((event)->vse_direction)     /* get direction */
228 #define GET_DEVICE(event) ((event)->vse_device)        /* get device */
229 
230 #define GETEND(eq)        (++(eq)->header.head >= (eq)->header.size ? \
231                                  (eq)->header.head = 0 : 0 )
232 
233 /*------------------------------------------------
234 * macros to be used by the event queue loader  */
235 
236           /* ISFULL yields TRUE if queue is full */
237 
238 #define ISFULL(eq)  ((eq)->header.tail+1 == (eq)->header.head ||   \
239                                ((eq)->header.tail+1 == (eq)->header.size &&  \
240                                 (eq)->header.head == 0))
241 
242           /* get address of the billet for NEXT event */
243 
244 #define PUTBEGIN(eq)          (&(eq)->header.events[(eq)->header.tail])
245 
246 #define PUT_X(event, value)   ((event)->vse_x = value)    /* put X pos */
247 #define PUT_Y(event, value)             ((event)->vse_y = value)    /* put Y pos */
248 #define PUT_TIME(event, value)          ((event)->vse_time = value)   /* put time */
249 #define PUT_TYPE(event, value)          ((event)->vse_type = value) /* put type */
250 #define PUT_KEY(event, value) ((event)->vse_key = value) /* put input key */
251 #define PUT_DIR(event, value) ((event)->vse_direction = value) /* put dir */
252 #define PUT_DEVICE(event, value) ((event)->vse_device = value)   /* put dev */
253 
254 #define PUTEND(eq)     (++(eq)->header.tail >= (eq)->header.size ?  \
255                               (eq)->header.tail = 0 : 0)
256 
257 /******************************************************************
258 *
259 *         DMA I/O DEFINITIONS
260 *
261 ******************************************************************/
262 
263 /*---------------------------------------------------------------------
264 * The DMA request queue is implemented as a ring buffer of "DMAreq"
265   structures.  The queue is accessed using ring indices located in the
266   "DMAreq_header" structure.  Access is implemented using access macros
267   similar to the event queue access macros above.  */
268 
269           struct DMAreq {
270 
271               short DMAtype;            /* DMA type code (for QDSS) */
272               short DMAdone;            /* DMA done parameter */
273               char  *bufp;              /* virtual adrs of buffer */
274               int   length;           /* transfer buffer length */
275           };
276 
277 /* DMA type command codes */
278 
279 #define DISPLIST    1         /* display list DMA */
280 #define PTOB                  2         /* 1 plane Qbus to bitmap DMA */
281 #define BTOP                  3         /* 1 plane bitmap to Qbus DMA */
282 
283 /* DMA done notification code */
284 
285 #define FIFO_EMPTY  0x01      /* DONE when FIFO becomes empty */
286 #define COUNT_ZERO  0x02      /* DONE when count becomes zero */
287 #define WORD_PACK   0x04    /* program the gate array for word packing */
288 #define BYTE_PACK   0x08      /* program gate array for byte packing */
289 #define REQUEST_DONE          0x100     /* clear when driver has processed request */
290 #define HARD_ERROR  0x200   /* DMA hardware error occurred */
291 
292 /* DMA request queue is a ring buffer of request structures */
293 
294           struct DMAreq_header {
295 
296               int QBAreg;                   /* cookie Qbus map reg for this buffer */
297               short status;       /* master DMA status word */
298               int shared_size;              /* size of shared memory in bytes */
299               struct DMAreq *DMAreq;  /* start address of request queue */
300               int used;                     /* # of queue entries currently used */
301               int size;                     /* # of "DMAreq"'s in the request queue */
302               int oldest;                   /* index to oldest queue'd request */
303               int newest;                   /* index to newest queue'd request */
304           };
305 
306 /* bit definitions for DMAstatus word in DMAreq_header */
307 
308 #define   DMA_ACTIVE          0x0004              /* DMA in progress */
309 #define DMA_ERROR   0x0080              /* DMA hardware error */
310 #define DMA_IGNORE  0x0002              /* flag to ignore this interrupt */
311 
312 /*------------------------------------------
313 * macros for DMA request queue fiddling  */
314 
315           /* DMA status set/check macros */
316 
317 #define DMA_SETACTIVE(header)   ((header)->status |= DMA_ACTIVE)
318 #define DMA_CLRACTIVE(header) ((header)->status &= ~DMA_ACTIVE)
319 #define DMA_ISACTIVE(header)    ((header)->status & DMA_ACTIVE)
320 
321 #define DMA_SETERROR(header)    ((header)->status |= DMA_ERROR)
322 #define DMA_CLRERROR(header)    ((header)->status &= ~DMA_ERROR)
323 #define DMA_ISERROR(header)     ((header)->status & DMA_ERROR)
324 
325 #define DMA_SETIGNORE(header) ((header)->status |= DMA_IGNORE)
326 #define DMA_CLRIGNORE(header)   ((header)->status &= ~DMA_IGNORE)
327 #define DMA_ISIGNORE(header)    ((header)->status & DMA_IGNORE)
328 
329           /* yields TRUE if queue is empty (ISEMPTY) or full (ISFULL) */
330 
331 #define DMA_ISEMPTY(header)   ((header)->used == 0)
332 #define DMA_ISFULL(header)    ((header)->used >= (header)->size)
333 
334           /* returns address of the billet for next (PUT)
335            * or oldest (GET) request */
336 
337 #define DMA_PUTBEGIN(header)  (&(header)->DMAreq[(header)->newest])
338 #define DMA_GETBEGIN(header)            (&(header)->DMAreq[(header)->oldest])
339 
340           /* does queue access pointer maintenance */
341 
342 #define DMA_GETEND(header)      (++(header)->oldest >= (header)->size    \
343                                           ? (header)->oldest = 0 : 0);                     \
344                                         --(header)->used;
345 
346 #define DMA_PUTEND(header)              (++(header)->newest >= (header)->size    \
347                                           ? (header)->newest = 0 : 0);                     \
348                                         ++(header)->used;
349 
350 /******************************************************************
351 *
352 *         COLOR MAP WRITE BUFFER DEFINITIONS
353 *
354 ******************************************************************/
355 
356           struct rgb {
357 
358               unsigned char offset;     /* color map address for load */
359               unsigned char red;                  /* data for red map */
360               unsigned char green;      /* data for green map */
361               unsigned char blue;                 /* data for blue map */
362           };
363 
364           struct color_buf {
365 
366               char status;              /* load request/service status */
367               short count;              /* number of entries to br loaded */
368               struct rgb rgb[256];
369           };
370 
371 #define LOAD_COLOR_MAP        0x0001
372 
373 /******************************************************************
374 *
375 *         SCROLL ASSIST DEFINITIONS
376 *
377 ******************************************************************/
378 
379           struct scroll {
380 
381               short status;
382               short viper_constant;
383               short y_scroll_constant;
384               short y_offset;
385               short x_index_pending;
386               short y_index_pending;
387           };
388 
389 #define LOAD_REGS   0x0001
390 #define LOAD_INDEX  0x0002
391 
392 /******************************************************************
393 *
394 *         MOUSE/TABLET/KBD PROGRAMMING DEFINITIONS
395 *
396 ******************************************************************/
397 
398 /*-----------------------------------
399 * LK201 programming definitions  */
400 
401 #define LK_UPDOWN   0x86                /* bits for setting lk201 modes */
402 #define LK_AUTODOWN           0x82
403 #define LK_DOWN     0x80
404 #define LK_DEFAULTS           0xD3                /* reset (some) default settings */
405 #define LK_AR_ENABLE          0xE3                /* global auto repeat enable */
406 #define LK_CL_ENABLE          0x1B                /* keyclick enable */
407 #define LK_KBD_ENABLE         0x8B                /* keyboard enable */
408 #define LK_BELL_ENABLE        0x23                /* the bell */
409 #define LK_RING_BELL          0xA7                /* ring keyboard bell */
410 
411 #define LK_LED_ENABLE         0x13                /* light led */
412 #define LK_LED_DISABLE        0x11                /* turn off led */
413 #define LED_1                 0x81                /* led bits */
414 #define LED_2                 0x82
415 #define LED_3                 0x84
416 #define LED_4                 0x88
417 #define LED_ALL     0x8F
418 #define LK_LED_HOLD LED_4
419 #define LK_LED_LOCK LED_3
420 #define LK_LED_COMPOSE        LED_2
421 #define LK_LED_WAIT           LED_1
422 
423 #define LK_KDOWN_ERROR        0x3D                /* key down on powerup error */
424 #define LK_POWER_ERROR        0x3E                /* keyboard failure on powerup test */
425 #define LK_OUTPUT_ERROR       0xB5                /* keystrokes lost during inhibit */
426 #define LK_INPUT_ERROR        0xB6                /* garbage command to keyboard */
427 #define LK_LOWEST   0x56                /* lowest significant keycode */
428 #define LK_DIV6_START         0xAD                /* start of div 6 */
429 #define LK_DIV5_END 0xB2                /* end of div 5 */
430 
431 #define LAST_PARAM  0x80                /* "no more params" bit */
432 
433           struct prgkbd {
434 
435               short cmd;                          /* LK201 command opcode */
436               short param1;             /* 1st cmd parameter (can be null) */
437               short param2;             /* 2nd cmd parameter (can be null) */
438           };
439 
440 /*-------------------------
441 * "special" LK-201 keys */
442 
443 #define SHIFT                 174
444 #define LOCK                  176
445 #define REPEAT                180
446 #define CNTRL                 175
447 #define ALLUP                 179
448 
449 /*--------------------------------
450 * cursor programming structure */
451 
452           struct prg_cursor {
453 
454               unsigned short acc_factor;          /* cursor aceleration factor */
455               unsigned short threshold; /* threshold to trigger acc at */
456           };
457 
458 /*---------------------
459 * mouse definitions */
460 
461 #define INC_STREAM_MODE       'R'                 /* stream mode reports (55 hz) */
462 #define PROMPT_MODE 'D'                 /* report when prompted */
463 #define REQUEST_POS 'P'                 /* request position report */
464 #define SELF_TEST   'T'                 /* request self test */
465 
466 #define MOUSE_ID    0x2                 /* mouse ID in lo 4 bits */
467 
468 #define START_FRAME 0x80                /* start of report frame bit */
469 #define X_SIGN                0x10                /* position sign bits */
470 #define Y_SIGN                0x08
471 
472 #define RIGHT_BUTTON          0x01                /* mouse buttons */
473 #define MIDDLE_BUTTON         0x02
474 #define LEFT_BUTTON 0x04
475 
476           /* mouse report structure definition */
477 
478           struct mouse_report {
479 
480               char state;               /* buttons and sign bits */
481               short dx;                 /* delta X since last change */
482               short dy;                 /* delta Y since last change */
483               char bytcnt;    /* mouse report byte count */
484           };
485 
486 /*-----------------------------------------
487 * tablet command/interface definitions  */
488 
489 #define T_STREAM    'R'                 /* continuous stream report mode */
490 #define T_POINT               'D'                 /* enter report-on-request mode */
491 #define T_REQUEST   'P'                 /* request position report */
492 
493 #define T_BAUD                'B'                 /* increase baud to 9600 from 4800 */
494 #define T_RATE_55   'K'                 /* report rate: 55/sec */
495 #define T_RATE_72   'L'                 /* report rate: 72/sec */
496 #define T_RATE_120  'M'                 /* report rate: 120/sec (9600 only) */
497 
498 #define T_TEST                SELF_TEST /* do self test */
499 
500 #define TABLET_ID   0x4                 /* tablet ID in lo 4 bits */
501 
502 #define T_START_FRAME         0x80                /* start of report frame bit */
503 #define T_PROXIMITY 0x01                /* state pointer in proximity */
504 
505 #define T_LEFT_BUTTON         0x02                /* puck buttons */
506 #define T_FRONT_BUTTON        0x04
507 #define T_RIGHT_BUTTON        0x08
508 #define T_BACK_BUTTON         0x10
509 
510 #define T_BARREL_BUTTON T_LEFT_BUTTON             /* stylus buttons */
511 #define T_TIP_BUTTON          T_FRONT_BUTTON
512 
513 #endif /* _QDUSER_H_ */
514