1 /*        $NetBSD: if_ecreg.h,v 1.6 2008/04/28 20:23:37 martin Exp $  */
2 
3 /*
4  * Copyright (c) 2001 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by Matthew Fredette.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  *
19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29  * POSSIBILITY OF SUCH DAMAGE.
30  */
31 
32 /*
33  * 3Com Ethernet controller registers.
34  */
35 
36 #define   EC_BUF_SZ 2048
37 
38 #if __for_reference_only__
39 struct ec_regs {
40           uint16_t  ec_csr;             /* control/status register */
41           uint16_t  ec_backoff;         /* backoff seed */
42           uint8_t             ec_pad1[0x400 - (2 * sizeof(uint16_t))];
43           struct              ether_addr ec_arom; /* address ROM */
44           uint8_t             ec_pad2[0x200 - sizeof(struct ether_addr)];
45           struct              ether_addr ec_aram; /* address RAM */
46           uint8_t             ec_pad3[0x200 - sizeof(struct ether_addr)];
47           uint8_t             ec_tbuf[EC_BUF_SZ]; /* transmit buffer */
48           uint8_t             ec_abuf[EC_BUF_SZ]; /* receive buffer A */
49           uint8_t             ec_bbuf[EC_BUF_SZ]; /* receive buffer B */
50 };
51 #endif
52 
53 /* Register offsets. */
54 #define   ECREG_CSR (0)
55 #define   ECREG_BACKOFF       (2)
56 #define   ECREG_AROM          (1024)
57 #define   ECREG_ARAM          (1536)
58 #define   ECREG_TBUF          (2048)
59 #define ECREG_ABUF  (ECREG_TBUF + EC_BUF_SZ)
60 #define ECREG_BBUF  (ECREG_ABUF + EC_BUF_SZ)
61 #define   ECREG_BANK_SZ       (ECREG_BBUF + EC_BUF_SZ)
62 
63 /*
64  * Control/status register bits
65  */
66 #define   EC_CSR_BBSW         0x8000              /* B buffer empty (belongs to card) */
67 #define   EC_CSR_ABSW         0x4000              /* A buffer empty (belongs to card) */
68 #define   EC_CSR_TBSW         0x2000              /* T buffer full (belongs to card) */
69 #define   EC_CSR_JAM          0x1000              /* Ethernet jammed (collision) */
70 #define   EC_CSR_AMSW         0x0800              /* address RAM belongs to ether */
71 #define   EC_CSR_RBBA         0x0400              /* B buffer received before A */
72 #define   EC_CSR_RESET        0x0100              /* reset the card */
73 #define   EC_CSR_BINT         0x0080              /* B buffer interrupt enable */
74 #define   EC_CSR_AINT         0x0040              /* A buffer interrupt enable */
75 #define   EC_CSR_TINT         0x0020              /* T buffer interrupt enable */
76 #define   EC_CSR_JINT         0x0010              /* jam interrupt enable */
77 #define   EC_CSR_INTPA        0x00ff              /* mask for interrupt and PA fields */
78 #define   EC_CSR_PAMASK       0x000f              /* PA field */
79 
80 #define   EC_CSR_PA 0x0007              /* receive mine+broadcast-errors */
81 #define EC_CSR_PROMISC        0x0001              /* receive all-errors */
82 
83 /*
84  * Turns an EC_CSR_xINT value into an ECREG_xBUF value.
85  * NB: does not work with EC_CSR_TINT.
86  */
87 #define EC_CSR_INT_BUF(x) (((x) << 5) + 2048)
88 
89 /*
90  * Turns an EC_CSR_xINT value into an ECREG_xBSW value.
91  */
92 #define EC_CSR_INT_BSW(x) ((x) << 8)
93 
94 /*
95  * Receive status bits.  The first 16 bits of a receive
96  * buffer are a status word.
97  */
98 #define   EC_PKT_FCSERR                 0x8000              /* FCS error */
99 #define   EC_PKT_BROADCAST    0x4000              /* packet was broadcast */
100 #define   EC_PKT_RGERR                  0x2000              /* range error */
101 #define   EC_PKT_ADDRMATCH    0x1000              /* address match */
102 #define   EC_PKT_FRERR                  0x0800              /* framing error */
103 #define   EC_PKT_DOFF                   0x07ff              /* first free byte */
104 
105 #define   EC_PKT_MAXTDOFF     (EC_BUF_SZ - (ETHER_MIN_LEN - ETHER_CRC_LEN))     /* max xmit doff (min size) */
106 #define   EC_PKT_RDOFF        2                             /* packet offset in buffer */
107 #define   EC_PKT_MINRDOFF     (EC_PKT_RDOFF + (ETHER_MIN_LEN - ETHER_CRC_LEN))  /* min packet doff (min size) */
108 #define   EC_PKT_MAXRDOFF     (EC_BUF_SZ - EC_PKT_RDOFF)    /* max packet doff (max size) */
109