1 /* $NetBSD: clock.c,v 1.10 2010/03/02 21:52:32 matt Exp $ */
2
3 /*
4 * Copyright (C) 1995, 1996 Wolfgang Solfrank.
5 * Copyright (C) 1995, 1996 TooLs GmbH.
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. All advertising materials mentioning features or use of this software
17 * must display the following acknowledgement:
18 * This product includes software developed by TooLs GmbH.
19 * 4. The name of TooLs GmbH may not be used to endorse or promote products
20 * derived from this software without specific prior written permission.
21 *
22 * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
23 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
24 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
25 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
27 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
28 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
29 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
30 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
31 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 */
33
34 #include <lib/libsa/stand.h>
35 #include <dev/isa/isareg.h>
36 #include <dev/ic/i8253reg.h>
37 #include <powerpc/spr.h>
38 #include <powerpc/oea/spr.h>
39
40 #include "boot.h"
41
42 u_long ns_per_tick = NS_PER_TICK;
43
44 static inline u_quad_t mftb(void);
45 static inline void mfrtc(u_long *, u_long *);
46
47 static inline u_quad_t
mftb(void)48 mftb(void)
49 {
50 u_long scratch;
51 u_quad_t tb;
52
53 __asm volatile ("1: mftbu %0; mftb %0+1; mftbu %1; cmpw %0,%1; bne 1b"
54 : "=r"(tb), "=r"(scratch));
55 return (tb);
56 }
57
58 static inline void
mfrtc(u_long * up,u_long * lp)59 mfrtc(u_long *up, u_long *lp)
60 {
61 u_long scratch;
62
63 __asm volatile ("1: mfspr %0,%3; mfspr %1,%4; mfspr %2,%3;"
64 "cmpw %0,%2; bne 1b"
65 : "=r"(*up), "=r"(*lp), "=r"(scratch)
66 : "n"(SPR_RTCU_R), "n"(SPR_RTCL_R));
67 }
68
69 /*
70 * Wait for about n microseconds (at least!).
71 */
72 void
delay(u_int n)73 delay(u_int n)
74 {
75 u_quad_t tb;
76 u_long tbh, tbl, scratch;
77 unsigned int cpuvers;
78
79 __asm volatile ("mfpvr %0" : "=r"(cpuvers));
80 cpuvers >>= 16;
81
82 if (cpuvers == MPC601) {
83 mfrtc(&tbh, &tbl);
84 while (n >= 1000000) {
85 tbh++;
86 n -= 1000000;
87 }
88 tbl += n * 1000;
89 if (tbl >= 1000000000) {
90 tbh++;
91 tbl -= 1000000000;
92 }
93 __asm volatile ("1: mfspr %0,%3; cmplw %0,%1; blt 1b; bgt 2f;"
94 "mfspr %0,%4; cmplw %0,%2; blt 1b; 2:"
95 : "=&r"(scratch)
96 : "r"(tbh), "r"(tbl), "n"(SPR_RTCU_R), "n"(SPR_RTCL_R));
97 } else {
98 tb = mftb();
99 tb += (n * 1000 + ns_per_tick - 1) / ns_per_tick;
100 tbh = tb >> 32;
101 tbl = tb;
102 __asm volatile ("1: mftbu %0; cmpw %0,%1; blt 1b; bgt 2f;"
103 "mftb %0; cmpw %0,%2; blt 1b; 2:"
104 : "=&r"(scratch)
105 : "r"(tbh), "r"(tbl));
106 }
107 }
108