1 /* $NetBSD: pcib.c,v 1.11 2022/05/17 05:05:20 andvar Exp $ */
2
3 /*-
4 * Copyright (c) 1996, 1998 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
30 */
31
32 #include <sys/cdefs.h>
33 __KERNEL_RCSID(0, "$NetBSD: pcib.c,v 1.11 2022/05/17 05:05:20 andvar Exp $");
34
35 #include "isa.h"
36 #include "isadma.h"
37
38 #include <sys/types.h>
39 #include <sys/param.h>
40 #include <sys/systm.h>
41 #include <sys/device.h>
42
43 #include <sys/bus.h>
44
45 #include <dev/isa/isavar.h>
46
47 #include <dev/pci/pcivar.h>
48 #include <dev/pci/pcireg.h>
49
50 #include <dev/pci/pcidevs.h>
51
52 int pcibmatch(device_t, cfdata_t, void *);
53 void pcibattach(device_t, device_t, void *);
54
55 struct pcib_softc {
56 device_t sc_dev;
57 struct powerpc_isa_chipset *sc_chipset;
58 };
59
60 extern struct powerpc_isa_chipset genppc_ict;
61 extern struct genppc_pci_chipset *genppc_pct;
62
63 CFATTACH_DECL_NEW(pcib, sizeof(struct pcib_softc),
64 pcibmatch, pcibattach, NULL, NULL);
65
66 void pcib_callback(device_t);
67
68 int
pcibmatch(device_t parent,cfdata_t cf,void * aux)69 pcibmatch(device_t parent, cfdata_t cf, void *aux)
70 {
71 struct pci_attach_args *pa = aux;
72
73 /*
74 * Match PCI-ISA bridge.
75 */
76 if (PCI_CLASS(pa->pa_class) == PCI_CLASS_BRIDGE &&
77 PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_BRIDGE_ISA) {
78 return (1);
79 }
80
81 /*
82 * some special cases:
83 */
84 switch (PCI_VENDOR(pa->pa_id)) {
85 case PCI_VENDOR_INTEL:
86 switch (PCI_PRODUCT(pa->pa_id)) {
87 case PCI_PRODUCT_INTEL_SIO:
88 /*
89 * The Intel SIO identifies itself as a
90 * miscellaneous prehistoric.
91 */
92 return (1);
93 }
94 break;
95 }
96
97 return (0);
98 }
99
100 void
pcibattach(device_t parent,device_t self,void * aux)101 pcibattach(device_t parent, device_t self, void *aux)
102 {
103 struct pci_attach_args *pa = aux;
104 struct pcib_softc *sc = device_private(self);
105 char devinfo[256];
106 u_int32_t v;
107 int lvlmask = 0;
108 #ifdef prep
109 prop_bool_t rav;
110 #endif
111
112 sc->sc_dev = self;
113
114 /*
115 * Just print out a description and defer configuration
116 * until all PCI devices have been attached.
117 */
118 pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo, sizeof(devinfo));
119 aprint_normal(": %s (rev. 0x%02x)\n", devinfo,
120 PCI_REVISION(pa->pa_class));
121
122 v = pci_conf_read(pa->pa_pc, pa->pa_tag, 0x40);
123 if ((v & 0x20) == 0) {
124 aprint_verbose_dev(self, "PIRQ[0-3] not used\n");
125 } else {
126 v = pci_conf_read(pa->pa_pc, pa->pa_tag, 0x60);
127 if ((v & 0x80808080) == 0x80808080) {
128 aprint_verbose_dev(self, "PIRQ[0-3] disabled\n");
129 } else {
130 int i;
131 aprint_verbose("%s:", device_xname(self));
132 for (i = 0; i < 4; i++, v >>= 8) {
133 if ((v & 0x80) == 0 && (v & 0x0f) != 0) {
134 aprint_verbose(" PIRQ[%d]=%d", i,
135 v & 0x0f);
136 lvlmask |= (1 << (v & 0x0f));
137 }
138 }
139 aprint_verbose("\n");
140 }
141 }
142
143 /*
144 * If we have an 83C553F-G sitting on a RAVEN host bridge,
145 * then we need to rewire some interrupts.
146 * The IDE Interrupt Routing Control Register lives at 0x43,
147 * and defaults to 0xEF, which means the primary controller
148 * interrupts on ivr-14, and the secondary on ivr-15. We
149 * reset it to 0xEE to fire them both at ivr-14.
150 * We have to rewrite the interrupt map, because the bridge map told
151 * us that the interrupt is MPIC 0, which is the bridge intr for
152 * the 8259.
153 * Additionally, sometimes the PCI Interrupt Routing Control Register
154 * is improperly initialized, causing all sorts of weird interrupt
155 * issues on the machine. The manual says it should default to
156 * 0000h (index 45-44h) however it would appear that PPCBUG is
157 * setting it up differently. Reset it to 0000h.
158 */
159
160 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_SYMPHONY &&
161 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_SYMPHONY_83C553) {
162 v = pci_conf_read(pa->pa_pc, pa->pa_tag, 0x44) & 0xffff0000;
163 pci_conf_write(pa->pa_pc, pa->pa_tag, 0x44, v);
164 }
165
166 #ifdef prep
167 rav = prop_dictionary_get(device_properties(parent),
168 "prep-raven-pchb");
169
170 if (rav != NULL && prop_bool_true(rav) &&
171 PCI_VENDOR(pa->pa_id) == PCI_VENDOR_SYMPHONY &&
172 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_SYMPHONY_83C553) {
173
174 prop_dictionary_t dict, devsub;
175 prop_number_t pinsub;
176 struct genppc_pci_chipset_businfo *pbi;
177
178 v = pci_conf_read(pa->pa_pc, pa->pa_tag, 0x40) & 0x00ffffff;
179 v |= 0xee000000;
180 pci_conf_write(pa->pa_pc, pa->pa_tag, 0x40, v);
181
182 pbi = SIMPLEQ_FIRST(&genppc_pct->pc_pbi);
183 dict = prop_dictionary_get(pbi->pbi_properties,
184 "prep-pci-intrmap");
185 devsub = prop_dictionary_get(dict, "devfunc-11");
186 pinsub = prop_number_create_integer(14);
187 prop_dictionary_set(devsub, "pin-A", pinsub);
188 prop_object_release(pinsub);
189 aprint_verbose_dev(self, "setting pciide irq to 14\n");
190 /* irq 14 is level */
191 lvlmask = 0x0040;
192 }
193 #endif /* prep */
194
195 config_defer(self, pcib_callback);
196 }
197
198 void
pcib_callback(device_t self)199 pcib_callback(device_t self)
200 {
201 struct pcib_softc *sc = device_private(self);
202 #if NISA > 0
203 struct isabus_attach_args iba;
204
205 /*
206 * Attach the ISA bus behind this bridge.
207 */
208 memset(&iba, 0, sizeof(iba));
209 sc->sc_chipset = &genppc_ict;
210 iba.iba_ic = sc->sc_chipset;
211 iba.iba_iot = &genppc_isa_io_space_tag;
212 iba.iba_memt = &genppc_isa_mem_space_tag;
213 #if NISADMA > 0
214 iba.iba_dmat = &isa_bus_dma_tag;
215 #endif
216 config_found(sc->sc_dev, &iba, isabusprint, CFARGS_NONE);
217 #endif
218 }
219