1 /* $NetBSD: i82093reg.h,v 1.11 2017/11/13 11:45:54 nakayama Exp $ */ 2 3 #include <x86/i82093reg.h> 4 5 #ifdef _KERNEL 6 7 #if defined(_KERNEL_OPT) 8 #include "opt_multiprocessor.h" 9 #endif 10 11 #define ioapic_asm_ack(num) \ 12 movl _C_LABEL(local_apic_va),%eax ; \ 13 movl $0,LAPIC_EOI(%eax) 14 15 #define x2apic_asm_ack(num) \ 16 movl $(MSR_X2APIC_BASE + MSR_X2APIC_EOI),%ecx ; \ 17 xorl %eax,%eax ; \ 18 xorl %edx,%edx ; \ 19 wrmsr 20 21 #ifdef MULTIPROCESSOR 22 23 #define ioapic_asm_lock(num) \ 24 movl $1,%esi ;\ 25 77: \ 26 xchgl %esi,PIC_LOCK(%edi) ;\ 27 testl %esi,%esi ;\ 28 jne 77b 29 30 #define ioapic_asm_unlock(num) \ 31 movl $0,PIC_LOCK(%edi) 32 33 #else 34 35 #define ioapic_asm_lock(num) 36 #define ioapic_asm_unlock(num) 37 38 #endif /* MULTIPROCESSOR */ 39 40 #define ioapic_mask(num) \ 41 movl IS_PIC(%ebp),%edi ;\ 42 ioapic_asm_lock(num) ;\ 43 movl IS_PIN(%ebp),%esi ;\ 44 leal 0x10(%esi,%esi,1),%esi ;\ 45 movl PIC_IOAPIC(%edi),%edi ;\ 46 movl IOAPIC_SC_REG(%edi),%ebx ;\ 47 movl %esi, (%ebx) ;\ 48 movl IOAPIC_SC_DATA(%edi),%ebx ;\ 49 movl (%ebx),%esi ;\ 50 orl $IOAPIC_REDLO_MASK,%esi ;\ 51 andl $~IOAPIC_REDLO_RIRR,%esi ;\ 52 movl %esi,(%ebx) ;\ 53 movl IS_PIC(%ebp),%edi ;\ 54 ioapic_asm_unlock(num) 55 56 /* 57 * Since this is called just before the interrupt stub exits, AND 58 * because the apic ACK doesn't use any registers, all registers 59 * can be used here. 60 * XXX this is not obvious 61 */ 62 #define ioapic_unmask(num) \ 63 movl (%esp),%eax ;\ 64 cmpl $IREENT_MAGIC,(TF_ERR+4)(%eax) ;\ 65 jne 79f ;\ 66 movl IS_PIC(%ebp),%edi ;\ 67 ioapic_asm_lock(num) ;\ 68 movl IS_PIN(%ebp),%esi ;\ 69 leal 0x10(%esi,%esi,1),%esi ;\ 70 movl PIC_IOAPIC(%edi),%edi ;\ 71 movl IOAPIC_SC_REG(%edi),%ebx ;\ 72 movl IOAPIC_SC_DATA(%edi),%eax ;\ 73 movl %esi, (%ebx) ;\ 74 movl (%eax),%edx ;\ 75 andl $~(IOAPIC_REDLO_MASK|IOAPIC_REDLO_RIRR),%edx ;\ 76 movl %esi, (%ebx) ;\ 77 movl %edx,(%eax) ;\ 78 movl IS_PIC(%ebp),%edi ;\ 79 ioapic_asm_unlock(num) ;\ 80 79: 81 82 #endif 83