1 /*      $NetBSD: sacc_hpcarm.c,v 1.15 2023/12/20 14:50:02 thorpej Exp $         */
2 
3 /*-
4  * Copyright (c) 2001 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by IWAMOTO Toshihiro.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  *
19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29  * POSSIBILITY OF SUCH DAMAGE.
30  */
31 
32 /*
33  * Platform dependent part for SA-11[01]1 companion chip on hpcarm.
34  */
35 
36 #include <sys/cdefs.h>
37 __KERNEL_RCSID(0, "$NetBSD: sacc_hpcarm.c,v 1.15 2023/12/20 14:50:02 thorpej Exp $");
38 
39 #include <sys/param.h>
40 #include <sys/systm.h>
41 #include <sys/types.h>
42 #include <sys/conf.h>
43 #include <sys/device.h>
44 #include <sys/kernel.h>
45 #include <sys/uio.h>
46 #include <sys/bus.h>
47 
48 #include <machine/platid.h>
49 #include <machine/platid_mask.h>
50 
51 #include <arm/sa11x0/sa11x0_reg.h>
52 #include <arm/sa11x0/sa11x0_var.h>
53 #include <arm/sa11x0/sa11x0_gpioreg.h>
54 #include <arm/sa11x0/sa1111_reg.h>
55 #include <arm/sa11x0/sa1111_var.h>
56 
57 static void         sacc_attach(device_t, device_t, void *);
58 static int          sacc_intr(void *);
59 
60 struct platid_data sacc_platid_table[] = {
61           { &platid_mask_MACH_HP_JORNADA_7XX, (void *)1 },
62           { NULL, NULL }
63 };
64 
65 CFATTACH_DECL_NEW(sacc, sizeof(struct sacc_softc),
66     sacc_probe, sacc_attach, NULL, NULL);
67 
68 #ifdef INTR_DEBUG
69 #define DPRINTF(arg)          aprint_normal arg
70 #else
71 #define DPRINTF(arg)
72 #endif
73 
74 static void
sacc_attach(device_t parent,device_t self,void * aux)75 sacc_attach(device_t parent, device_t self, void *aux)
76 {
77           int i, gpiopin;
78           uint32_t skid;
79           struct sacc_softc *sc = device_private(self);
80           struct sa11x0_softc *psc = device_private(parent);
81           struct sa11x0_attach_args *sa = aux;
82           struct platid_data *p;
83 
84           aprint_normal("\n");
85 
86           sc->sc_dev = self;
87           sc->sc_iot = sa->sa_iot;
88           sc->sc_piot = psc->sc_iot;
89           sc->sc_gpioh = psc->sc_gpioh;
90 
91           p = platid_search_data(&platid, sacc_platid_table);
92           if (p == NULL)
93                     return;
94 
95           gpiopin = (int)p->data;
96           sc->sc_gpiomask = 1 << gpiopin;
97 
98           if (bus_space_map(sa->sa_iot, sa->sa_addr, sa->sa_size, 0,
99                                 &sc->sc_ioh)) {
100                     aprint_normal_dev(self, "unable to map registers\n");
101                     return;
102           }
103 
104           skid = bus_space_read_4(sc->sc_iot, sc->sc_ioh, SACCSBI_SKID);
105 
106           aprint_normal_dev(self, "SA-1111 rev %d.%d\n",
107                                 (skid & 0xf0) >> 4, skid & 0xf);
108 
109           for (i = 0; i < SACCIC_LEN; i++)
110                     sc->sc_intrhand[i] = NULL;
111 
112           /* initialize SA-1111 interrupt controller */
113           bus_space_write_4(sc->sc_iot, sc->sc_ioh, SACCIC_INTEN0, 0);
114           bus_space_write_4(sc->sc_iot, sc->sc_ioh, SACCIC_INTEN1, 0);
115           bus_space_write_4(sc->sc_iot, sc->sc_ioh, SACCIC_INTTSTSEL, 0);
116           bus_space_write_4(sc->sc_iot, sc->sc_ioh,
117                                 SACCIC_INTSTATCLR0, 0xffffffff);
118           bus_space_write_4(sc->sc_iot, sc->sc_ioh,
119                                 SACCIC_INTSTATCLR1, 0xffffffff);
120 
121           /* connect to SA-1110's GPIO intr */
122           sa11x0_intr_establish(0, gpiopin, 1, IPL_SERIAL, sacc_intr, sc);
123 
124           /* attach each devices */
125           config_search(self, NULL,
126               CFARGS(.search = sa1111_search));
127 }
128 
129 static int
sacc_intr(void * arg)130 sacc_intr(void *arg)
131 {
132           int i;
133           uint32_t mask;
134           struct sacc_intrvec intstat;
135           struct sacc_softc *sc = arg;
136           struct sacc_intrhand *ih;
137 
138           intstat.lo =
139               bus_space_read_4(sc->sc_iot, sc->sc_ioh, SACCIC_INTSTATCLR0);
140           intstat.hi =
141               bus_space_read_4(sc->sc_iot, sc->sc_ioh, SACCIC_INTSTATCLR1);
142           DPRINTF(("sacc_intr: %x %x\n", intstat.lo, intstat.hi));
143 
144           /* clear SA-1110's GPIO intr status */
145           bus_space_write_4(sc->sc_piot, sc->sc_gpioh,
146                                 SAGPIO_EDR, sc->sc_gpiomask);
147 
148           for (i = 0, mask = 1; i < 32; i++, mask <<= 1)
149                     if (intstat.lo & mask) {
150                               /*
151                                * Clear intr status before calling intr handlers.
152                                * This cause stray interrupts, but clearing
153                                * after calling intr handlers cause intr lossage.
154                                */
155                               bus_space_write_4(sc->sc_iot, sc->sc_ioh,
156                                                     SACCIC_INTSTATCLR0, 1 << i);
157 
158                               for (ih = sc->sc_intrhand[i]; ih; ih = ih->ih_next)
159                                         softint_schedule(ih->ih_soft);
160                     }
161           for (i = 0, mask = 1; i < SACCIC_LEN - 32; i++, mask <<= 1)
162                     if (intstat.hi & mask) {
163                               bus_space_write_4(sc->sc_iot, sc->sc_ioh,
164                                                     SACCIC_INTSTATCLR1, 1 << i);
165                               for (ih = sc->sc_intrhand[i + 32]; ih; ih = ih->ih_next)
166                                         softint_schedule(ih->ih_soft);
167                     }
168           return 1;
169 }
170