1 /*        $NetBSD: hilreg.h,v 1.2 2011/02/08 20:20:14 rmind Exp $     */
2 
3 /*
4  * Copyright (c) 1988 University of Utah.
5  * Copyright (c) 1990, 1993
6  *        The Regents of the University of California.  All rights reserved.
7  *
8  * This code is derived from software contributed to Berkeley by
9  * the Systems Programming Group of the University of Utah Computer
10  * Science Department.
11  *
12  * Redistribution and use in source and binary forms, with or without
13  * modification, are permitted provided that the following conditions
14  * are met:
15  * 1. Redistributions of source code must retain the above copyright
16  *    notice, this list of conditions and the following disclaimer.
17  * 2. Redistributions in binary form must reproduce the above copyright
18  *    notice, this list of conditions and the following disclaimer in the
19  *    documentation and/or other materials provided with the distribution.
20  * 3. Neither the name of the University nor the names of its contributors
21  *    may be used to endorse or promote products derived from this software
22  *    without specific prior written permission.
23  *
24  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
25  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
28  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
30  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
31  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
32  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
33  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
34  * SUCH DAMAGE.
35  *
36  * from: Utah $Hdr: hilreg.h 1.10 92/01/21$
37  *
38  *        @(#)hilreg.h        8.1 (Berkeley) 6/10/93
39  */
40 
41 #include <hp300/dev/iotypes.h>                    /* XXX */
42 
43 #ifdef hp300
44 struct    hil_dev {
45           char      hil_pad0;
46           vu_char   hil_data;
47           char      hil_pad1;
48           vu_char   hil_cmd;
49 };
50 
51 #define   HILADDR                       ((struct hil_dev *)IIOV(0x428000))
52 #define   BBCADDR                       ((struct hil_dev *)IIOV(0x420000))
53 #endif
54 
55 #ifdef hp800
56 #ifdef hp700
57 struct hil_dev {
58           vu_char   hil_rsthold;        /* (WO) reset hold (and Serial #3) */
59           vu_char   hil_resv1[2047];
60           vu_char   hil_data; /* send/receive data to/from 8042 */
61           vu_char   hil_cmd;  /* status/control to/from 8042 */
62           vu_char   hil_resv2[1022];
63           vu_char   hil_rstrel;         /* (WO) reset release (and Serial #3) */
64 
65 };
66 #else
67 struct    hil_dev {
68           vu_int hil_data;
69           vu_int hil_pad;
70           vu_int hil_cmd;
71 };
72 #endif
73 #endif
74 #define hil_stat hil_cmd
75 
76 #if defined(hp300) || defined(hp700)
77 #define READHILDATA(x)                  ((x)->hil_data)
78 #define READHILSTAT(x)                  ((x)->hil_stat)
79 #define READHILCMD(x)                   ((x)->hil_cmd)
80 #define WRITEHILDATA(x, y)    ((x)->hil_data = (y))
81 #define WRITEHILSTAT(x, y)    ((x)->hil_stat = (y))
82 #define WRITEHILCMD(x, y)     ((x)->hil_cmd  = (y))
83 #else
84 #define READHILDATA(x)                  ((x)->hil_data >> 24)
85 #define READHILSTAT(x)                  ((x)->hil_stat >> 24)
86 #define READHILCMD(x)                   ((x)->hil_cmd  >> 24)
87 #define WRITEHILDATA(x, y)    ((x)->hil_data = ((y) << 24))
88 #define WRITEHILSTAT(x, y)    ((x)->hil_stat = ((y) << 24))
89 #define WRITEHILCMD(x, y)     ((x)->hil_cmd  = ((y) << 24))
90 #endif
91 
92 #define   HIL_BUSY            0x02
93 #define   HIL_DATA_RDY                  0x01
94 
95 #define HILWAIT(hil_dev)      while ((READHILSTAT(hil_dev) & HIL_BUSY))
96 #define HILDATAWAIT(hil_dev)  while (!(READHILSTAT(hil_dev) & HIL_DATA_RDY))
97 
98 /* HIL status bits */
99 #define   HIL_POLLDATA        0x10                /* HIL poll data follows */
100 #define   HIL_COMMAND         0x08                /* Start of original command */
101 #define   HIL_ERROR 0x080               /* HIL error */
102 #define   HIL_RECONFIG        0x080               /* HIL has reconfigured */
103 #define   HIL_STATMASK        (HIL_DATA | HIL_COMMAND)
104 
105 #define   HIL_SSHIFT          4                   /* Bits to shift status over */
106 #define   HIL_SMASK 0xF                 /* Service request status mask */
107 #define   HIL_DEVMASK         0x07
108 
109 /* HIL status types */
110 #define   HIL_STATUS          0x5                 /* HIL status in data register */
111 #define   HIL_DATA  0x6                 /* HIL data in data register */
112 #define   HIL_CTRLSHIFT       0x8                 /* key + CTRL + SHIFT */
113 #define   HIL_CTRL  0x9                 /* key + CTRL */
114 #define   HIL_SHIFT 0xA                 /* key + SHIFT */
115 #define   HIL_KEY             0xB                 /* key only */
116 #define   HIL_68K             0x4                 /* Data from the 68k is ready */
117 
118 /* HIL commands */
119 #define   HIL_SETARD          0xA0                /* set auto-repeat delay */
120 #define   HIL_SETARR          0xA2                /* set auto-repeat rate */
121 #define   HIL_SETTONE         0xA3                /* set tone generator */
122 #define   HIL_CNMT  0xB2                /* clear nmi */
123 #define   HIL_INTON 0x5C                /* Turn on interrupts. */
124 #define   HIL_INTOFF          0x5D                /* Turn off interrupts. */
125 #define   HIL_TRIGGER         0xC5                /* trigger command */
126 #define   HIL_STARTCMD        0xE0                /* start loop command */
127 #define   HIL_TIMEOUT         0xFE                /* timeout */
128 #define   HIL_READTIME        0x13                /* Read real time register */
129 
130 /* Read/write various registers on the 8042. */
131 #define   HIL_READBUSY                  0x02      /* internal "busy" register */
132 #define   HIL_READKBDLANG               0x12      /* read keyboard language code */
133 #define   HIL_READKBDSADR               0xF9
134 #define   HIL_WRITEKBDSADR    0xE9
135 #define   HIL_READLPSTAT      0xFA
136 #define   HIL_WRITELPSTAT     0xEA
137 #define   HIL_READLPCTRL      0xFB
138 #define   HIL_WRITELPCTRL     0xEB
139 
140 /* BUSY bits */
141 #define   BSY_LOOPBUSY        0x04
142 
143 /* LPCTRL bits */
144 #define   LPC_AUTOPOLL        0x01      /* enable auto-polling */
145 #define   LPC_NOERROR         0x02      /* don't report errors */
146 #define   LPC_NORECONF        0x04      /* don't report reconfigure */
147 #define   LPC_KBDCOOK         0x10      /* cook all keyboards */
148 #define   LPC_RECONF          0x80      /* reconfigure the loop */
149 
150 /* LPSTAT bits */
151 #define   LPS_DEVMASK         0x07      /* number of loop devices */
152 #define   LPS_CONFGOOD        0x08      /* reconfiguration worked */
153 #define   LPS_CONFFAIL        0x80      /* reconfiguration failed */
154 
155 /* HIL packet headers */
156 #define   HIL_MOUSEDATA   0x2
157 #define   HIL_KBDDATA     0x40
158 
159 #define   HIL_MOUSEMOTION     0x02      /* mouse movement event */
160 #define   HIL_KBDBUTTON       0x40      /* keyboard button event */
161 #define   HIL_MOUSEBUTTON 0x40          /* mouse button event */
162 #define   HIL_BUTTONBOX   0x60          /* button box event */
163 #define   HIL_TABLET      0x02          /* tablet motion event */
164 #define   HIL_KNOBBOX     0x03          /* knob box motion data */
165 
166 /* For setting auto repeat on the keyboard */
167 #define   ar_format(x)        ~((x - 10) / 10)
168 #define   KBD_ARD             400       /* initial delay in msec (10 - 2560) */
169 #define   KBD_ARR             60        /* rate (10 - 2550 msec, 2551 == off) */
170 
171 #ifdef hp300
172 /* Magic */
173 #define   KBDNMISTAT          ((volatile char *)IIOV(0x478005))
174 #define   KBDNMI              0x04
175 #endif
176