1/*        $NetBSD: mainbus_io_asm.S,v 1.2 2013/08/18 06:29:29 matt Exp $        */
2
3/*
4 * Copyright (c) 1997 Mark Brinicombe.
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 *    notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 *    notice, this list of conditions and the following disclaimer in the
14 *    documentation and/or other materials provided with the distribution.
15 * 3. All advertising materials mentioning features or use of this software
16 *    must display the following acknowledgement:
17 *        This product includes software developed by Mark Brinicombe.
18 * 4. The name of the company nor the name of the author may be used to
19 *    endorse or promote products derived from this software without specific
20 *    prior written permission.
21 *
22 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
23 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
24 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
25 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
26 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
27 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32 * SUCH DAMAGE.
33 */
34
35#include <machine/asm.h>
36
37/*
38 * bus_space I/O functions for mainbus
39 */
40
41
42/*
43 * read single
44 */
45
46ENTRY(mainbus_bs_r_1)
47          ldrb      r0, [r1, r2, lsl #2]
48          RET
49END(mainbus_bs_r_1)
50
51ENTRY(mainbus_bs_r_2)
52          ldr       r0, [r1, r2, lsl #2]
53          bic       r0, r0, #0xff000000
54          bic       r0, r0, #0x00ff0000
55          RET
56END(mainbus_bs_r_2)
57
58ENTRY(mainbus_bs_r_4)
59          ldr       r0, [r1, r2, lsl #2]
60          RET
61END(mainbus_bs_r_4)
62
63/*
64 * write single
65 */
66
67ENTRY(mainbus_bs_w_1)
68          strb      r3, [r1, r2, lsl #2]
69          RET
70END(mainbus_bs_w_1)
71
72ENTRY(mainbus_bs_w_2)
73          mov       r3, r3, lsl #16
74          orr       r3, r3, r3, lsr #16
75          str       r3, [r1, r2, lsl #2]
76          RET
77END(mainbus_bs_w_2)
78
79ENTRY(mainbus_bs_w_4)
80          str       r3, [r1, r2, lsl #2]
81          RET
82END(mainbus_bs_w_4)
83
84/*
85 * read multiple
86 */
87
88ENTRY(mainbus_bs_rm_2)
89          add       r0, r1, r2, lsl #2
90          mov       r1, r3
91          ldr       r2, [sp, #0]
92          b         _C_LABEL(insw16)
93END(mainbus_bs_rm_2)
94
95/*
96 * write multiple
97 */
98
99ENTRY(mainbus_bs_wm_1)
100          add       r0, r1, r2, lsl #2
101          ldr       r2, [sp, #0]
102
103          /* Make sure that we have a positive length */
104          cmp       r2, #0x00000000
105          RETc(le)
106
107.Lmainbus_wm_1_loop:
108          ldrb      r1, [r3], #0x0001
109          str       r1, [r0]
110          subs      r2, r2, #0x00000001
111          bgt       .Lmainbus_wm_1_loop
112
113          RET
114END(mainbus_bs_wm_1)
115
116ENTRY(mainbus_bs_wm_2)
117          add       r0, r1, r2, lsl #2
118          mov       r1, r3
119          ldr       r2, [sp, #0]
120          b         _C_LABEL(outsw16)
121END(mainbus_bs_wm_2)
122