1 /*        $NetBSD: trap.h,v 1.10 2020/12/01 02:48:29 rin Exp $        */
2 
3 /*
4  * Copyright (c) 1995 Mark Brinicombe.
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  * 3. All advertising materials mentioning features or use of this software
16  *    must display the following acknowledgement:
17  *        This product includes software developed by Mark Brinicombe.
18  * 4. The name of the company nor the name of the author may be used to
19  *    endorse or promote products derived from this software without specific
20  *    prior written permission.
21  *
22  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
23  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
24  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
25  * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
26  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
27  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
28  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
29  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
30  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
31  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32  * SUCH DAMAGE.
33  *
34  * RiscBSD kernel project
35  *
36  * trap.h
37  *
38  * Various trap definitions
39  */
40 
41 #include <arm/cdefs.h>
42 
43 /*
44  * Instructions used for breakpoints.
45  *
46  * These are undefined instructions.
47  * Technically the userspace breakpoint could be a SWI but we want to
48  * keep this the same as IPKDB which needs an undefined instruction as
49  * a break point.
50  *
51  * Ideally ARM would define several standard instruction sequences for
52  * use as breakpoints.
53  *
54  * The BKPT instruction isn't much use to us, since its behaviour is
55  * unpredictable on ARMv3 and lower.
56  *
57  * The ARM ARM says that for maximum compatibility, we should use undefined
58  * instructions that look like 0x.7f...f. .
59  */
60 
61 #define GDB_BREAKPOINT                  0xe6000011          /* Used by GDB 4.x */
62 #define IPKDB_BREAKPOINT_DEAD 0xe6000010          /* was used by IPKDB */
63 #define GDB5_BREAKPOINT                 0xe7ffdefe          /* Used by GDB 5.0 */
64 #define GDB_THUMB_BREAKPOINT  0xdefe              /* Thumb in GDB */
65 #define KERNEL_BREAKPOINT     0xe7ffffff          /* Used by DDB */
66 
67 /*
68  * DTrace uses 0xe7fffef0 to 0xe7fffeff as breakpoints.
69  * The first byte is used to encode a cond value.
70  */
71 #define DTRACE_BREAKPOINT     0xe7fffef0
72 #define DTRACE_BREAKPOINT_MASK          0xfffffff0
73 #define DTRACE_IS_BREAKPOINT(insn)      ((insn & DTRACE_BREAKPOINT_MASK) == DTRACE_BREAKPOINT)
74 
75 #ifdef _ARM_ARCH_BE8
76 #define KBPT_ASM              ".word 0xfedeffe7"
77 #else
78 #define KBPT_ASM              ".word 0xe7ffdefe"
79 #endif
80 
81 #define USER_BREAKPOINT                 GDB_BREAKPOINT
82 
83 /* End of trap.h */
84