1 /* Xtensa configuration settings.
2    Copyright (C) 2001-2024 Free Software Foundation, Inc.
3    Contributed by Bob Wilson (bob.wilson@acm.org) at Tensilica.
4 
5    This program is free software; you can redistribute it and/or modify
6    it under the terms of the GNU General Public License as published by
7    the Free Software Foundation; either version 2, or (at your option)
8    any later version.
9 
10    This program is distributed in the hope that it will be useful, but
11    WITHOUT ANY WARRANTY; without even the implied warranty of
12    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
13    General Public License for more details.
14 
15    You should have received a copy of the GNU General Public License
16    along with this program; if not, write to the Free Software
17    Foundation, 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.  */
18 
19 #ifndef XTENSA_CONFIG_H
20 #define XTENSA_CONFIG_H
21 
22 /* The macros defined here match those with the same names in the Xtensa
23    compile-time HAL (Hardware Abstraction Layer).  Please refer to the
24    Xtensa System Software Reference Manual for documentation of these
25    macros.  */
26 
27 #undef XCHAL_HAVE_BE
28 #define XCHAL_HAVE_BE                             1
29 
30 #undef XCHAL_HAVE_DENSITY
31 #define XCHAL_HAVE_DENSITY              1
32 
33 #undef XCHAL_HAVE_CONST16
34 #define XCHAL_HAVE_CONST16              0
35 
36 #undef XCHAL_HAVE_ABS
37 #define XCHAL_HAVE_ABS                            1
38 
39 #undef XCHAL_HAVE_ADDX
40 #define XCHAL_HAVE_ADDX                           1
41 
42 #undef XCHAL_HAVE_L32R
43 #define XCHAL_HAVE_L32R                           1
44 
45 #undef XSHAL_USE_ABSOLUTE_LITERALS
46 #define XSHAL_USE_ABSOLUTE_LITERALS     0
47 
48 #undef XSHAL_HAVE_TEXT_SECTION_LITERALS
49 #define XSHAL_HAVE_TEXT_SECTION_LITERALS 1 /* Set if there is some memory that allows both code and literals.  */
50 
51 #undef XCHAL_HAVE_MAC16
52 #define XCHAL_HAVE_MAC16                0
53 
54 #undef XCHAL_HAVE_MUL16
55 #define XCHAL_HAVE_MUL16                1
56 
57 #undef XCHAL_HAVE_MUL32
58 #define XCHAL_HAVE_MUL32                1
59 
60 #undef XCHAL_HAVE_MUL32_HIGH
61 #define XCHAL_HAVE_MUL32_HIGH           0
62 
63 #undef XCHAL_HAVE_DIV32
64 #define XCHAL_HAVE_DIV32                1
65 
66 #undef XCHAL_HAVE_NSA
67 #define XCHAL_HAVE_NSA                            1
68 
69 #undef XCHAL_HAVE_MINMAX
70 #define XCHAL_HAVE_MINMAX               1
71 
72 #undef XCHAL_HAVE_SEXT
73 #define XCHAL_HAVE_SEXT                           1
74 
75 #undef XCHAL_HAVE_LOOPS
76 #define XCHAL_HAVE_LOOPS                1
77 
78 #undef XCHAL_HAVE_THREADPTR
79 #define XCHAL_HAVE_THREADPTR            1
80 
81 #undef XCHAL_HAVE_RELEASE_SYNC
82 #define XCHAL_HAVE_RELEASE_SYNC                   1
83 
84 #undef XCHAL_HAVE_S32C1I
85 #define XCHAL_HAVE_S32C1I               1
86 
87 #undef XCHAL_HAVE_BOOLEANS
88 #define XCHAL_HAVE_BOOLEANS             0
89 
90 #undef XCHAL_HAVE_FP
91 #define XCHAL_HAVE_FP                             0
92 
93 #undef XCHAL_HAVE_FP_DIV
94 #define XCHAL_HAVE_FP_DIV               0
95 
96 #undef XCHAL_HAVE_FP_RECIP
97 #define XCHAL_HAVE_FP_RECIP             0
98 
99 #undef XCHAL_HAVE_FP_SQRT
100 #define XCHAL_HAVE_FP_SQRT              0
101 
102 #undef XCHAL_HAVE_FP_RSQRT
103 #define XCHAL_HAVE_FP_RSQRT             0
104 
105 #undef XCHAL_HAVE_DFP_accel
106 #define XCHAL_HAVE_DFP_accel                      0
107 #undef XCHAL_HAVE_WINDOWED
108 #define XCHAL_HAVE_WINDOWED             1
109 
110 #undef XCHAL_NUM_AREGS
111 #define XCHAL_NUM_AREGS                           32
112 
113 #undef XCHAL_HAVE_WIDE_BRANCHES
114 #define XCHAL_HAVE_WIDE_BRANCHES        0
115 
116 #undef XCHAL_HAVE_PREDICTED_BRANCHES
117 #define XCHAL_HAVE_PREDICTED_BRANCHES   0
118 
119 
120 #undef XCHAL_ICACHE_SIZE
121 #define XCHAL_ICACHE_SIZE               16384
122 
123 #undef XCHAL_DCACHE_SIZE
124 #define XCHAL_DCACHE_SIZE               16384
125 
126 #undef XCHAL_ICACHE_LINESIZE
127 #define XCHAL_ICACHE_LINESIZE           32
128 
129 #undef XCHAL_DCACHE_LINESIZE
130 #define XCHAL_DCACHE_LINESIZE           32
131 
132 #undef XCHAL_ICACHE_LINEWIDTH
133 #define XCHAL_ICACHE_LINEWIDTH                    5
134 
135 #undef XCHAL_DCACHE_LINEWIDTH
136 #define XCHAL_DCACHE_LINEWIDTH                    5
137 
138 #undef XCHAL_DCACHE_IS_WRITEBACK
139 #define XCHAL_DCACHE_IS_WRITEBACK       1
140 
141 
142 #undef XCHAL_HAVE_MMU
143 #define XCHAL_HAVE_MMU                            1
144 
145 #undef XCHAL_MMU_MIN_PTE_PAGE_SIZE
146 #define XCHAL_MMU_MIN_PTE_PAGE_SIZE     12
147 
148 
149 #undef XCHAL_HAVE_DEBUG
150 #define XCHAL_HAVE_DEBUG                1
151 
152 #undef XCHAL_NUM_IBREAK
153 #define XCHAL_NUM_IBREAK                2
154 
155 #undef XCHAL_NUM_DBREAK
156 #define XCHAL_NUM_DBREAK                2
157 
158 #undef XCHAL_DEBUGLEVEL
159 #define XCHAL_DEBUGLEVEL                6
160 
161 
162 #undef XCHAL_MAX_INSTRUCTION_SIZE
163 #define XCHAL_MAX_INSTRUCTION_SIZE      3
164 
165 #undef XCHAL_INST_FETCH_WIDTH
166 #define XCHAL_INST_FETCH_WIDTH                    4
167 
168 
169 #undef XSHAL_ABI
170 #undef XTHAL_ABI_WINDOWED
171 #undef XTHAL_ABI_CALL0
172 #define XSHAL_ABI                       XTHAL_ABI_WINDOWED
173 #define XTHAL_ABI_WINDOWED              0
174 #define XTHAL_ABI_CALL0                           1
175 
176 #endif /* !XTENSA_CONFIG_H */
177