1 #define _FP_W_TYPE_SIZE 32 2 #define _FP_W_TYPE unsigned int 3 #define _FP_WS_TYPE signed int 4 #define _FP_I_TYPE int 5 6 #define __FP_FRAC_ADD_4(r3,r2,r1,r0,x3,x2,x1,x0,y3,y2,y1,y0) \ 7 __asm__ ("add{l} {%11,%3|%3,%11}\n\t" \ 8 "adc{l} {%9,%2|%2,%9}\n\t" \ 9 "adc{l} {%7,%1|%1,%7}\n\t" \ 10 "adc{l} {%5,%0|%0,%5}" \ 11 : "=r" ((USItype) (r3)), \ 12 "=&r" ((USItype) (r2)), \ 13 "=&r" ((USItype) (r1)), \ 14 "=&r" ((USItype) (r0)) \ 15 : "%0" ((USItype) (x3)), \ 16 "g" ((USItype) (y3)), \ 17 "%1" ((USItype) (x2)), \ 18 "g" ((USItype) (y2)), \ 19 "%2" ((USItype) (x1)), \ 20 "g" ((USItype) (y1)), \ 21 "%3" ((USItype) (x0)), \ 22 "g" ((USItype) (y0))) 23 #define __FP_FRAC_ADD_3(r2,r1,r0,x2,x1,x0,y2,y1,y0) \ 24 __asm__ ("add{l} {%8,%2|%2,%8}\n\t" \ 25 "adc{l} {%6,%1|%1,%6}\n\t" \ 26 "adc{l} {%4,%0|%0,%4}" \ 27 : "=r" ((USItype) (r2)), \ 28 "=&r" ((USItype) (r1)), \ 29 "=&r" ((USItype) (r0)) \ 30 : "%0" ((USItype) (x2)), \ 31 "g" ((USItype) (y2)), \ 32 "%1" ((USItype) (x1)), \ 33 "g" ((USItype) (y1)), \ 34 "%2" ((USItype) (x0)), \ 35 "g" ((USItype) (y0))) 36 #define __FP_FRAC_SUB_4(r3,r2,r1,r0,x3,x2,x1,x0,y3,y2,y1,y0) \ 37 __asm__ ("sub{l} {%11,%3|%3,%11}\n\t" \ 38 "sbb{l} {%9,%2|%2,%9}\n\t" \ 39 "sbb{l} {%7,%1|%1,%7}\n\t" \ 40 "sbb{l} {%5,%0|%0,%5}" \ 41 : "=r" ((USItype) (r3)), \ 42 "=&r" ((USItype) (r2)), \ 43 "=&r" ((USItype) (r1)), \ 44 "=&r" ((USItype) (r0)) \ 45 : "0" ((USItype) (x3)), \ 46 "g" ((USItype) (y3)), \ 47 "1" ((USItype) (x2)), \ 48 "g" ((USItype) (y2)), \ 49 "2" ((USItype) (x1)), \ 50 "g" ((USItype) (y1)), \ 51 "3" ((USItype) (x0)), \ 52 "g" ((USItype) (y0))) 53 #define __FP_FRAC_SUB_3(r2,r1,r0,x2,x1,x0,y2,y1,y0) \ 54 __asm__ ("sub{l} {%8,%2|%2,%8}\n\t" \ 55 "sbb{l} {%6,%1|%1,%6}\n\t" \ 56 "sbb{l} {%4,%0|%0,%4}" \ 57 : "=r" ((USItype) (r2)), \ 58 "=&r" ((USItype) (r1)), \ 59 "=&r" ((USItype) (r0)) \ 60 : "0" ((USItype) (x2)), \ 61 "g" ((USItype) (y2)), \ 62 "1" ((USItype) (x1)), \ 63 "g" ((USItype) (y1)), \ 64 "2" ((USItype) (x0)), \ 65 "g" ((USItype) (y0))) 66 #define __FP_FRAC_ADDI_4(x3,x2,x1,x0,i) \ 67 __asm__ ("add{l} {%4,%3|%3,%4}\n\t" \ 68 "adc{l} {$0,%2|%2,0}\n\t" \ 69 "adc{l} {$0,%1|%1,0}\n\t" \ 70 "adc{l} {$0,%0|%0,0}" \ 71 : "+r" ((USItype) (x3)), \ 72 "+&r" ((USItype) (x2)), \ 73 "+&r" ((USItype) (x1)), \ 74 "+&r" ((USItype) (x0)) \ 75 : "g" ((USItype) (i))) 76 77 78 #define _FP_MUL_MEAT_S(R,X,Y) \ 79 _FP_MUL_MEAT_1_wide(_FP_WFRACBITS_S,R,X,Y,umul_ppmm) 80 #define _FP_MUL_MEAT_D(R,X,Y) \ 81 _FP_MUL_MEAT_2_wide(_FP_WFRACBITS_D,R,X,Y,umul_ppmm) 82 #define _FP_MUL_MEAT_Q(R,X,Y) \ 83 _FP_MUL_MEAT_4_wide(_FP_WFRACBITS_Q,R,X,Y,umul_ppmm) 84 85 #define _FP_DIV_MEAT_S(R,X,Y) _FP_DIV_MEAT_1_loop(S,R,X,Y) 86 #define _FP_DIV_MEAT_D(R,X,Y) _FP_DIV_MEAT_2_udiv(D,R,X,Y) 87 #define _FP_DIV_MEAT_Q(R,X,Y) _FP_DIV_MEAT_4_udiv(Q,R,X,Y) 88 89 #define _FP_NANFRAC_H _FP_QNANBIT_H 90 #define _FP_NANFRAC_S _FP_QNANBIT_S 91 #define _FP_NANFRAC_D _FP_QNANBIT_D, 0 92 /* Even if XFmode is 12byte, we have to pad it to 93 16byte since soft-fp emulation is done in 16byte. */ 94 #define _FP_NANFRAC_E _FP_QNANBIT_E, 0, 0, 0 95 #define _FP_NANFRAC_Q _FP_QNANBIT_Q, 0, 0, 0 96 97 #ifndef _SOFT_FLOAT 98 #define FP_EX_SHIFT 0 99 100 #define _FP_DECL_EX \ 101 unsigned short _fcw __attribute__ ((unused)) = FP_RND_NEAREST; 102 103 #define FP_RND_NEAREST 0 104 #define FP_RND_ZERO 0xc00 105 #define FP_RND_PINF 0x800 106 #define FP_RND_MINF 0x400 107 108 #define FP_RND_MASK 0xc00 109 110 #define FP_INIT_ROUNDMODE \ 111 do { \ 112 __asm__ __volatile__ ("fnstcw\t%0" : "=m" (_fcw)); \ 113 } while (0) 114 #endif 115