1#------------------------------------------------------------------------------ 2# $File: ringdove,v 1.1 2022/08/16 12:04:30 christos Exp $ 3# ringdove: file(1) magic for RingdoveEDA data files 4 5# librnd and global 60 regex/128l ha:rnd-menu-v[0-9]+[\ \t\r\n]*[{] librnd menu system (lihata) 70 regex/128l ha:rnd-menu-patch-v[0-9]+[\ \t\r\n]*[{] librnd menu patch (lihata) 80 regex/128l ha:coraleda-project-v[0-9]+[\ \t\r\n]*[{] CoralEDA/Ringdove project file (lihata) 90 regex/128l ha:ringdove-project-v[0-9]+[\ \t\r\n]*[{] Ringdove project file (lihata) 10 11# pcb-rnd 120 regex/128l ha:pcb-rnd-board-v[0-9]+[\ \t\r\n]*[{] pcb-rnd board file (lihata) 130 regex/128l li:pcb-rnd-subcircuit-v[0-9]+[\ \t\r\n]*[{] pcb-rnd subcircuit/footprint file (lihata) 140 regex/128l ha:pcb-rnd-buffer-v[0-9]+[\ \t\r\n]*[{] pcb-rnd paste buffer content (lihata) 150 regex/128l li:pcb-rnd-conf-v[0-9]+[\ \t\r\n]*[{] pcb-rnd configuration (lihata) 160 regex/128l ha:pcb-rnd-drc-query-v[0-9]+[\ \t\r\n]*[{] pcb-rnd drc query string (lihata) 170 regex/128l li:pcb-rnd-font-v[0-9]+[\ \t\r\n]*[{] pcb-rnd vector font (lihata) 180 regex/128l ha:pcb-rnd-log-v[0-9]+[\ \t\r\n]*[{] pcb-rnd message log dump (lihata) 190 regex/128l ha:pcb-rnd-padstack-v[0-9]+[\ \t\r\n]*[{] pcb-rnd padstack (lihata) 200 regex/128l li:pcb-rnd-view-list-v[0-9]+[\ \t\r\n]*[{] pcb-rnd view list (lihata) 210 regex/128l li:view-list-v[0-9]+[\ \t\r\n]*[{] pcb-rnd view list (lihata) 220 search Netlist(Freeze) pcb-rnd or gEDA/PCB netlist forward annotation action script 23 24# sch-rnd (cschem data model) 250 regex/128l li:cschem-buffer-v[0-9]+[\ \t\r\n]*[{] sch-rnd/cschem buffer content (lihata) 260 regex/128l li:sch-rnd-conf-v[0-9]+[\ \t\r\n]*[{] sch-rnd configuration (lihata) 270 regex/128l ha:std_devmap.v[0-9]+[\ \t\r\n]*[{] sch-rnd devmap (device mapping; lihata) 280 regex/128l li:cschem-group-v[0-9]+[\ \t\r\n]*[{] sch-rnd/cschem group or symbol (lihata) 290 regex/128l ha:cschem-sheet-v[0-9]+[\ \t\r\n]*[{] sch-rnd/cschem schematic sheet (lihata) 30 31# tEDAx (modular format) 320 regex/1l tEDAx[\ \t\r\n]v tEDAx (Trivial EDA eXchange) 33>0 regex begin\ symbol\ v with schematic symbol 34>0 regex begin\ board\ v with Printed Circuit Board 35>0 regex begin\ route_req\ v with PCB routing request 36>0 regex begin\ route_res\ v with PCB routing result 37>0 regex begin\ camv_layer\ v with camv-rnd exported layer 38>0 regex begin\ netlist\ v with netlist 39>0 regex begin\ backann\ v with Ringdove EDA back annotation 40>0 regex begin\ footprint\ v with PCB footprint 41>0 regex begin\ drc\ v with PCB DRC script 42>0 regex begin\ drc_query_rule\ v with pcb-rnd drc_query rules 43>0 regex begin\ drc_query_def\ v with pcb-rnd drc_query value/config definitions 44>0 regex begin\ etest\ v with PCB electric test 45 46