1#include "arm_asm.h"
2#include "arm_arch.h"
3
4#if defined(__thumb2__) && !defined(__APPLE__)
5.syntax   unified
6.thumb
7#else
8.code     32
9#undef    __thumb2__
10#endif
11
12.text
13
14.align    5
15.globl    OPENSSL_atomic_add
16.type     OPENSSL_atomic_add,%function
17OPENSSL_atomic_add:
18#if __ARM_ARCH__>=6
19.Ladd:    ldrex     r2,[r0]
20          add       r3,r2,r1
21          strex     r2,r3,[r0]
22          cmp       r2,#0
23          bne       .Ladd
24          mov       r0,r3
25          RET
26#else
27          stmdb     sp!,{r4,r5,r6,lr}
28          ldr       r2,.Lspinlock
29          adr       r3,.Lspinlock
30          mov       r4,r0
31          mov       r5,r1
32          add       r6,r3,r2  @ &spinlock
33          b         .+8
34.Lspin:   bl        sched_yield
35          mov       r0,#-1
36          swp       r0,r0,[r6]
37          cmp       r0,#0
38          bne       .Lspin
39
40          ldr       r2,[r4]
41          add       r2,r2,r5
42          str       r2,[r4]
43          str       r0,[r6]             @ release spinlock
44          ldmia     sp!,{r4,r5,r6,lr}
45          tst       lr,#1
46          moveq     pc,lr
47.word     0xe12fff1e          @ RET
48#endif
49.size     OPENSSL_atomic_add,.-OPENSSL_atomic_add
50
51.globl    OPENSSL_cleanse
52.type     OPENSSL_cleanse,%function
53OPENSSL_cleanse:
54          eor       ip,ip,ip
55          cmp       r1,#7
56#ifdef    __thumb2__
57          itt       hs
58#endif
59          subhs     r1,r1,#4
60          bhs       .Lot
61          cmp       r1,#0
62          beq       .Lcleanse_done
63.Little:
64          strb      ip,[r0],#1
65          subs      r1,r1,#1
66          bhi       .Little
67          b         .Lcleanse_done
68
69.Lot:     tst       r0,#3
70          beq       .Laligned
71          strb      ip,[r0],#1
72          sub       r1,r1,#1
73          b         .Lot
74.Laligned:
75          str       ip,[r0],#4
76          subs      r1,r1,#4
77          bhs       .Laligned
78          adds      r1,r1,#4
79          bne       .Little
80.Lcleanse_done:
81#if __ARM_ARCH__>=5
82          RET
83#else
84          tst       lr,#1
85          moveq     pc,lr
86.word     0xe12fff1e          @ RET
87#endif
88.size     OPENSSL_cleanse,.-OPENSSL_cleanse
89
90.globl    CRYPTO_memcmp
91.type     CRYPTO_memcmp,%function
92.align    4
93CRYPTO_memcmp:
94          eor       ip,ip,ip
95          cmp       r2,#0
96          beq       .Lno_data
97          stmdb     sp!,{r4,r5}
98
99.Loop_cmp:
100          ldrb      r4,[r0],#1
101          ldrb      r5,[r1],#1
102          eor       r4,r4,r5
103          orr       ip,ip,r4
104          subs      r2,r2,#1
105          bne       .Loop_cmp
106
107          ldmia     sp!,{r4,r5}
108.Lno_data:
109          rsb       r0,ip,#0
110          mov       r0,r0,lsr#31
111#if __ARM_ARCH__>=5
112          RET
113#else
114          tst       lr,#1
115          moveq     pc,lr
116.word     0xe12fff1e          @ RET
117#endif
118.size     CRYPTO_memcmp,.-CRYPTO_memcmp
119
120#if __ARM_MAX_ARCH__>=7
121.arch     armv7-a
122.fpu      neon
123
124.align    5
125.globl    _armv7_neon_probe
126.type     _armv7_neon_probe,%function
127_armv7_neon_probe:
128          vorr      q0,q0,q0
129          RET
130.size     _armv7_neon_probe,.-_armv7_neon_probe
131
132.globl    _armv7_tick
133.type     _armv7_tick,%function
134_armv7_tick:
135#ifdef    __APPLE__
136          mrrc      p15,0,r0,r1,c14               @ CNTPCT
137#else
138          mrrc      p15,1,r0,r1,c14               @ CNTVCT
139#endif
140          RET
141.size     _armv7_tick,.-_armv7_tick
142
143.globl    _armv8_aes_probe
144.type     _armv8_aes_probe,%function
145_armv8_aes_probe:
146#if defined(__thumb2__) && !defined(__APPLE__)
147.byte     0xb0,0xff,0x00,0x03 @ aese.8  q0,q0
148#else
149.byte     0x00,0x03,0xb0,0xf3 @ aese.8  q0,q0
150#endif
151          RET
152.size     _armv8_aes_probe,.-_armv8_aes_probe
153
154.globl    _armv8_sha1_probe
155.type     _armv8_sha1_probe,%function
156_armv8_sha1_probe:
157#if defined(__thumb2__) && !defined(__APPLE__)
158.byte     0x00,0xef,0x40,0x0c @ sha1c.32          q0,q0,q0
159#else
160.byte     0x40,0x0c,0x00,0xf2 @ sha1c.32          q0,q0,q0
161#endif
162          RET
163.size     _armv8_sha1_probe,.-_armv8_sha1_probe
164
165.globl    _armv8_sha256_probe
166.type     _armv8_sha256_probe,%function
167_armv8_sha256_probe:
168#if defined(__thumb2__) && !defined(__APPLE__)
169.byte     0x00,0xff,0x40,0x0c @ sha256h.32        q0,q0,q0
170#else
171.byte     0x40,0x0c,0x00,0xf3 @ sha256h.32        q0,q0,q0
172#endif
173          RET
174.size     _armv8_sha256_probe,.-_armv8_sha256_probe
175.globl    _armv8_pmull_probe
176.type     _armv8_pmull_probe,%function
177_armv8_pmull_probe:
178#if defined(__thumb2__) && !defined(__APPLE__)
179.byte     0xa0,0xef,0x00,0x0e @ vmull.p64         q0,d0,d0
180#else
181.byte     0x00,0x0e,0xa0,0xf2 @ vmull.p64         q0,d0,d0
182#endif
183          RET
184.size     _armv8_pmull_probe,.-_armv8_pmull_probe
185#endif
186
187.globl    OPENSSL_wipe_cpu
188.type     OPENSSL_wipe_cpu,%function
189OPENSSL_wipe_cpu:
190#if __ARM_MAX_ARCH__>=7
191          ldr       r0,.LOPENSSL_armcap
192          adr       r1,.LOPENSSL_armcap
193          ldr       r0,[r1,r0]
194#ifdef    __APPLE__
195          ldr       r0,[r0]
196#endif
197#endif
198          eor       r2,r2,r2
199          eor       r3,r3,r3
200          eor       ip,ip,ip
201#if __ARM_MAX_ARCH__>=7
202          tst       r0,#1
203          beq       .Lwipe_done
204          veor      q0, q0, q0
205          veor      q1, q1, q1
206          veor      q2, q2, q2
207          veor      q3, q3, q3
208          veor      q8, q8, q8
209          veor      q9, q9, q9
210          veor      q10, q10, q10
211          veor      q11, q11, q11
212          veor      q12, q12, q12
213          veor      q13, q13, q13
214          veor      q14, q14, q14
215          veor      q15, q15, q15
216.Lwipe_done:
217#endif
218          mov       r0,sp
219#if __ARM_ARCH__>=5
220          RET
221#else
222          tst       lr,#1
223          moveq     pc,lr
224.word     0xe12fff1e          @ RET
225#endif
226.size     OPENSSL_wipe_cpu,.-OPENSSL_wipe_cpu
227
228.globl    OPENSSL_instrument_bus
229.type     OPENSSL_instrument_bus,%function
230OPENSSL_instrument_bus:
231          eor       r0,r0,r0
232#if __ARM_ARCH__>=5
233          RET
234#else
235          tst       lr,#1
236          moveq     pc,lr
237.word     0xe12fff1e          @ RET
238#endif
239.size     OPENSSL_instrument_bus,.-OPENSSL_instrument_bus
240
241.globl    OPENSSL_instrument_bus2
242.type     OPENSSL_instrument_bus2,%function
243OPENSSL_instrument_bus2:
244          eor       r0,r0,r0
245#if __ARM_ARCH__>=5
246          RET
247#else
248          tst       lr,#1
249          moveq     pc,lr
250.word     0xe12fff1e          @ RET
251#endif
252.size     OPENSSL_instrument_bus2,.-OPENSSL_instrument_bus2
253
254.align    5
255#if __ARM_MAX_ARCH__>=7
256.LOPENSSL_armcap:
257.word     OPENSSL_armcap_P-.
258#endif
259#if __ARM_ARCH__>=6
260.align    5
261#else
262.Lspinlock:
263.word     atomic_add_spinlock-.Lspinlock
264.align    5
265
266.data
267.align    2
268atomic_add_spinlock:
269.word     0
270#endif
271
272.comm     OPENSSL_armcap_P,4,4
273.hidden   OPENSSL_armcap_P
274