1 /* $OpenBSD: ohci.c,v 1.61 2005/04/21 12:30:02 pascoe Exp $ */
2 /* $NetBSD: ohci.c,v 1.139 2003/02/22 05:24:16 tsutsui Exp $ */
3 /* $FreeBSD: src/sys/dev/usb/ohci.c,v 1.22 1999/11/17 22:33:40 n_hibma Exp $ */
4
5 /*
6 * Copyright (c) 1998 The NetBSD Foundation, Inc.
7 * All rights reserved.
8 *
9 * This code is derived from software contributed to The NetBSD Foundation
10 * by Lennart Augustsson (lennart@augustsson.net) at
11 * Carlstedt Research & Technology.
12 *
13 * Redistribution and use in source and binary forms, with or without
14 * modification, are permitted provided that the following conditions
15 * are met:
16 * 1. Redistributions of source code must retain the above copyright
17 * notice, this list of conditions and the following disclaimer.
18 * 2. Redistributions in binary form must reproduce the above copyright
19 * notice, this list of conditions and the following disclaimer in the
20 * documentation and/or other materials provided with the distribution.
21 * 3. All advertising materials mentioning features or use of this software
22 * must display the following acknowledgement:
23 * This product includes software developed by the NetBSD
24 * Foundation, Inc. and its contributors.
25 * 4. Neither the name of The NetBSD Foundation nor the names of its
26 * contributors may be used to endorse or promote products derived
27 * from this software without specific prior written permission.
28 *
29 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
30 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
31 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
32 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
33 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
34 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
35 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
36 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
37 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
38 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
39 * POSSIBILITY OF SUCH DAMAGE.
40 */
41
42 /*
43 * USB Open Host Controller driver.
44 *
45 * OHCI spec: http://www.compaq.com/productinfo/development/openhci.html
46 * USB spec: http://www.usb.org/developers/docs/usbspec.zip
47 */
48
49 #include <sys/param.h>
50 #include <sys/systm.h>
51 #include <sys/malloc.h>
52 #if defined(__NetBSD__) || defined(__OpenBSD__)
53 #include <sys/kernel.h>
54 #include <sys/device.h>
55 #include <sys/select.h>
56 #elif defined(__FreeBSD__)
57 #include <sys/module.h>
58 #include <sys/bus.h>
59 #include <machine/bus_pio.h>
60 #include <machine/bus_memio.h>
61 #if defined(DIAGNOSTIC) && defined(__i386__) && defined(__FreeBSD__)
62 #include <machine/cpu.h>
63 #endif
64 #endif
65 #include <sys/proc.h>
66 #include <sys/queue.h>
67
68 #include <machine/bus.h>
69 #include <machine/endian.h>
70
71 #include <dev/usb/usb.h>
72 #include <dev/usb/usbdi.h>
73 #include <dev/usb/usbdivar.h>
74 #include <dev/usb/usb_mem.h>
75 #include <dev/usb/usb_quirks.h>
76
77 #include <dev/usb/ohcireg.h>
78 #include <dev/usb/ohcivar.h>
79
80 #if defined(__FreeBSD__)
81 #include <machine/clock.h>
82
83 #define delay(d) DELAY(d)
84 #endif
85
86 #if defined(__OpenBSD__)
87 struct cfdriver ohci_cd = {
88 NULL, "ohci", DV_DULL
89 };
90 #endif
91
92 #ifdef OHCI_DEBUG
93 #define DPRINTF(x) do { if (ohcidebug) logprintf x; } while (0)
94 #define DPRINTFN(n,x) do { if (ohcidebug>(n)) logprintf x; } while (0)
95 int ohcidebug = 0;
96 #ifndef __NetBSD__
97 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f))
98 #endif
99 #else
100 #define DPRINTF(x)
101 #define DPRINTFN(n,x)
102 #endif
103
104 /*
105 * The OHCI controller is little endian, so on big endian machines
106 * the data stored in memory needs to be swapped.
107 */
108 #if defined(__FreeBSD__)
109 #if BYTE_ORDER == BIG_ENDIAN
110 #define htole32(x) (bswap32(x))
111 #define le32toh(x) (bswap32(x))
112 #else
113 #define htole32(x) (x)
114 #define le32toh(x) (x)
115 #endif
116 #endif
117
118 struct ohci_pipe;
119
120 Static ohci_soft_ed_t *ohci_alloc_sed(ohci_softc_t *);
121 Static void ohci_free_sed(ohci_softc_t *, ohci_soft_ed_t *);
122
123 Static ohci_soft_td_t *ohci_alloc_std(ohci_softc_t *);
124 Static void ohci_free_std(ohci_softc_t *, ohci_soft_td_t *);
125
126 Static ohci_soft_itd_t *ohci_alloc_sitd(ohci_softc_t *);
127 Static void ohci_free_sitd(ohci_softc_t *,ohci_soft_itd_t *);
128
129 #if 0
130 Static void ohci_free_std_chain(ohci_softc_t *, ohci_soft_td_t *,
131 ohci_soft_td_t *);
132 #endif
133 Static usbd_status ohci_alloc_std_chain(struct ohci_pipe *,
134 ohci_softc_t *, int, int, usbd_xfer_handle,
135 ohci_soft_td_t *, ohci_soft_td_t **);
136
137 Static void ohci_shutdown(void *v);
138 Static usbd_status ohci_open(usbd_pipe_handle);
139 Static void ohci_poll(struct usbd_bus *);
140 Static void ohci_softintr(void *);
141 Static void ohci_waitintr(ohci_softc_t *, usbd_xfer_handle);
142 Static void ohci_add_done(ohci_softc_t *, ohci_physaddr_t);
143 Static void ohci_rhsc(ohci_softc_t *, usbd_xfer_handle);
144
145 Static usbd_status ohci_device_request(usbd_xfer_handle xfer);
146 Static void ohci_add_ed(ohci_soft_ed_t *, ohci_soft_ed_t *);
147 Static void ohci_rem_ed(ohci_soft_ed_t *, ohci_soft_ed_t *);
148 Static void ohci_hash_add_td(ohci_softc_t *, ohci_soft_td_t *);
149 Static void ohci_hash_rem_td(ohci_softc_t *, ohci_soft_td_t *);
150 Static ohci_soft_td_t *ohci_hash_find_td(ohci_softc_t *, ohci_physaddr_t);
151 Static void ohci_hash_add_itd(ohci_softc_t *, ohci_soft_itd_t *);
152 Static void ohci_hash_rem_itd(ohci_softc_t *, ohci_soft_itd_t *);
153 Static ohci_soft_itd_t *ohci_hash_find_itd(ohci_softc_t *, ohci_physaddr_t);
154
155 Static usbd_status ohci_setup_isoc(usbd_pipe_handle pipe);
156 Static void ohci_device_isoc_enter(usbd_xfer_handle);
157
158 Static usbd_status ohci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t);
159 Static void ohci_freem(struct usbd_bus *, usb_dma_t *);
160
161 Static usbd_xfer_handle ohci_allocx(struct usbd_bus *);
162 Static void ohci_freex(struct usbd_bus *, usbd_xfer_handle);
163
164 Static usbd_status ohci_root_ctrl_transfer(usbd_xfer_handle);
165 Static usbd_status ohci_root_ctrl_start(usbd_xfer_handle);
166 Static void ohci_root_ctrl_abort(usbd_xfer_handle);
167 Static void ohci_root_ctrl_close(usbd_pipe_handle);
168 Static void ohci_root_ctrl_done(usbd_xfer_handle);
169
170 Static usbd_status ohci_root_intr_transfer(usbd_xfer_handle);
171 Static usbd_status ohci_root_intr_start(usbd_xfer_handle);
172 Static void ohci_root_intr_abort(usbd_xfer_handle);
173 Static void ohci_root_intr_close(usbd_pipe_handle);
174 Static void ohci_root_intr_done(usbd_xfer_handle);
175
176 Static usbd_status ohci_device_ctrl_transfer(usbd_xfer_handle);
177 Static usbd_status ohci_device_ctrl_start(usbd_xfer_handle);
178 Static void ohci_device_ctrl_abort(usbd_xfer_handle);
179 Static void ohci_device_ctrl_close(usbd_pipe_handle);
180 Static void ohci_device_ctrl_done(usbd_xfer_handle);
181
182 Static usbd_status ohci_device_bulk_transfer(usbd_xfer_handle);
183 Static usbd_status ohci_device_bulk_start(usbd_xfer_handle);
184 Static void ohci_device_bulk_abort(usbd_xfer_handle);
185 Static void ohci_device_bulk_close(usbd_pipe_handle);
186 Static void ohci_device_bulk_done(usbd_xfer_handle);
187
188 Static usbd_status ohci_device_intr_transfer(usbd_xfer_handle);
189 Static usbd_status ohci_device_intr_start(usbd_xfer_handle);
190 Static void ohci_device_intr_abort(usbd_xfer_handle);
191 Static void ohci_device_intr_close(usbd_pipe_handle);
192 Static void ohci_device_intr_done(usbd_xfer_handle);
193
194 Static usbd_status ohci_device_isoc_transfer(usbd_xfer_handle);
195 Static usbd_status ohci_device_isoc_start(usbd_xfer_handle);
196 Static void ohci_device_isoc_abort(usbd_xfer_handle);
197 Static void ohci_device_isoc_close(usbd_pipe_handle);
198 Static void ohci_device_isoc_done(usbd_xfer_handle);
199
200 Static usbd_status ohci_device_setintr(ohci_softc_t *sc,
201 struct ohci_pipe *pipe, int ival);
202
203 Static int ohci_str(usb_string_descriptor_t *, int, const char *);
204
205 Static void ohci_timeout(void *);
206 Static void ohci_timeout_task(void *);
207 Static void ohci_rhsc_able(ohci_softc_t *, int);
208 Static void ohci_rhsc_enable(void *);
209
210 Static void ohci_close_pipe(usbd_pipe_handle, ohci_soft_ed_t *);
211 Static void ohci_abort_xfer(usbd_xfer_handle, usbd_status);
212
213 Static void ohci_device_clear_toggle(usbd_pipe_handle pipe);
214 Static void ohci_noop(usbd_pipe_handle pipe);
215
216 #ifdef OHCI_DEBUG
217 Static void ohci_dumpregs(ohci_softc_t *);
218 Static void ohci_dump_tds(ohci_soft_td_t *);
219 Static void ohci_dump_td(ohci_soft_td_t *);
220 Static void ohci_dump_ed(ohci_soft_ed_t *);
221 Static void ohci_dump_itd(ohci_soft_itd_t *);
222 Static void ohci_dump_itds(ohci_soft_itd_t *);
223 #endif
224
225 #define OBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \
226 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE)
227 #define OWRITE1(sc, r, x) \
228 do { OBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
229 #define OWRITE2(sc, r, x) \
230 do { OBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
231 #define OWRITE4(sc, r, x) \
232 do { OBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
233 #define OREAD1(sc, r) (OBARR(sc), bus_space_read_1((sc)->iot, (sc)->ioh, (r)))
234 #define OREAD2(sc, r) (OBARR(sc), bus_space_read_2((sc)->iot, (sc)->ioh, (r)))
235 #define OREAD4(sc, r) (OBARR(sc), bus_space_read_4((sc)->iot, (sc)->ioh, (r)))
236
237 /* Reverse the bits in a value 0 .. 31 */
238 Static u_int8_t revbits[OHCI_NO_INTRS] =
239 { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c,
240 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e,
241 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d,
242 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f };
243
244 struct ohci_pipe {
245 struct usbd_pipe pipe;
246 ohci_soft_ed_t *sed;
247 union {
248 ohci_soft_td_t *td;
249 ohci_soft_itd_t *itd;
250 } tail;
251 /* Info needed for different pipe kinds. */
252 union {
253 /* Control pipe */
254 struct {
255 usb_dma_t reqdma;
256 u_int length;
257 ohci_soft_td_t *setup, *data, *stat;
258 } ctl;
259 /* Interrupt pipe */
260 struct {
261 int nslots;
262 int pos;
263 } intr;
264 /* Bulk pipe */
265 struct {
266 u_int length;
267 int isread;
268 } bulk;
269 /* Iso pipe */
270 struct iso {
271 int next, inuse;
272 } iso;
273 } u;
274 };
275
276 #define OHCI_INTR_ENDPT 1
277
278 Static struct usbd_bus_methods ohci_bus_methods = {
279 ohci_open,
280 ohci_softintr,
281 ohci_poll,
282 ohci_allocm,
283 ohci_freem,
284 ohci_allocx,
285 ohci_freex,
286 };
287
288 Static struct usbd_pipe_methods ohci_root_ctrl_methods = {
289 ohci_root_ctrl_transfer,
290 ohci_root_ctrl_start,
291 ohci_root_ctrl_abort,
292 ohci_root_ctrl_close,
293 ohci_noop,
294 ohci_root_ctrl_done,
295 };
296
297 Static struct usbd_pipe_methods ohci_root_intr_methods = {
298 ohci_root_intr_transfer,
299 ohci_root_intr_start,
300 ohci_root_intr_abort,
301 ohci_root_intr_close,
302 ohci_noop,
303 ohci_root_intr_done,
304 };
305
306 Static struct usbd_pipe_methods ohci_device_ctrl_methods = {
307 ohci_device_ctrl_transfer,
308 ohci_device_ctrl_start,
309 ohci_device_ctrl_abort,
310 ohci_device_ctrl_close,
311 ohci_noop,
312 ohci_device_ctrl_done,
313 };
314
315 Static struct usbd_pipe_methods ohci_device_intr_methods = {
316 ohci_device_intr_transfer,
317 ohci_device_intr_start,
318 ohci_device_intr_abort,
319 ohci_device_intr_close,
320 ohci_device_clear_toggle,
321 ohci_device_intr_done,
322 };
323
324 Static struct usbd_pipe_methods ohci_device_bulk_methods = {
325 ohci_device_bulk_transfer,
326 ohci_device_bulk_start,
327 ohci_device_bulk_abort,
328 ohci_device_bulk_close,
329 ohci_device_clear_toggle,
330 ohci_device_bulk_done,
331 };
332
333 Static struct usbd_pipe_methods ohci_device_isoc_methods = {
334 ohci_device_isoc_transfer,
335 ohci_device_isoc_start,
336 ohci_device_isoc_abort,
337 ohci_device_isoc_close,
338 ohci_noop,
339 ohci_device_isoc_done,
340 };
341
342 #if defined(__NetBSD__) || defined(__OpenBSD__)
343 int
ohci_activate(device_ptr_t self,enum devact act)344 ohci_activate(device_ptr_t self, enum devact act)
345 {
346 struct ohci_softc *sc = (struct ohci_softc *)self;
347 int rv = 0;
348
349 switch (act) {
350 case DVACT_ACTIVATE:
351 return (EOPNOTSUPP);
352
353 case DVACT_DEACTIVATE:
354 if (sc->sc_child != NULL)
355 rv = config_deactivate(sc->sc_child);
356 sc->sc_dying = 1;
357 break;
358 }
359 return (rv);
360 }
361
362 int
ohci_detach(struct ohci_softc * sc,int flags)363 ohci_detach(struct ohci_softc *sc, int flags)
364 {
365 int rv = 0;
366
367 if (sc->sc_child != NULL)
368 rv = config_detach(sc->sc_child, flags);
369
370 if (rv != 0)
371 return (rv);
372
373 usb_uncallout(sc->sc_tmo_rhsc, ohci_rhsc_enable, sc);
374
375 #if defined(__NetBSD__) || defined(__OpenBSD__)
376 shutdownhook_disestablish(sc->sc_shutdownhook);
377 #endif
378
379 usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */
380
381 /* free data structures XXX */
382
383 return (rv);
384 }
385 #endif
386
387 ohci_soft_ed_t *
ohci_alloc_sed(ohci_softc_t * sc)388 ohci_alloc_sed(ohci_softc_t *sc)
389 {
390 ohci_soft_ed_t *sed;
391 usbd_status err;
392 int i, offs;
393 usb_dma_t dma;
394
395 if (sc->sc_freeeds == NULL) {
396 DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n"));
397 err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK,
398 OHCI_ED_ALIGN, &dma);
399 if (err)
400 return (0);
401 for(i = 0; i < OHCI_SED_CHUNK; i++) {
402 offs = i * OHCI_SED_SIZE;
403 sed = KERNADDR(&dma, offs);
404 sed->physaddr = DMAADDR(&dma, offs);
405 sed->next = sc->sc_freeeds;
406 sc->sc_freeeds = sed;
407 }
408 }
409 sed = sc->sc_freeeds;
410 sc->sc_freeeds = sed->next;
411 memset(&sed->ed, 0, sizeof(ohci_ed_t));
412 sed->next = 0;
413 return (sed);
414 }
415
416 void
ohci_free_sed(ohci_softc_t * sc,ohci_soft_ed_t * sed)417 ohci_free_sed(ohci_softc_t *sc, ohci_soft_ed_t *sed)
418 {
419 sed->next = sc->sc_freeeds;
420 sc->sc_freeeds = sed;
421 }
422
423 ohci_soft_td_t *
ohci_alloc_std(ohci_softc_t * sc)424 ohci_alloc_std(ohci_softc_t *sc)
425 {
426 ohci_soft_td_t *std;
427 usbd_status err;
428 int i, offs;
429 usb_dma_t dma;
430 int s;
431
432 if (sc->sc_freetds == NULL) {
433 DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n"));
434 err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK,
435 OHCI_TD_ALIGN, &dma);
436 if (err)
437 return (NULL);
438 s = splusb();
439 for(i = 0; i < OHCI_STD_CHUNK; i++) {
440 offs = i * OHCI_STD_SIZE;
441 std = KERNADDR(&dma, offs);
442 std->physaddr = DMAADDR(&dma, offs);
443 std->nexttd = sc->sc_freetds;
444 sc->sc_freetds = std;
445 }
446 splx(s);
447 }
448
449 s = splusb();
450 std = sc->sc_freetds;
451 sc->sc_freetds = std->nexttd;
452 memset(&std->td, 0, sizeof(ohci_td_t));
453 std->nexttd = NULL;
454 std->xfer = NULL;
455 ohci_hash_add_td(sc, std);
456 splx(s);
457
458 return (std);
459 }
460
461 void
ohci_free_std(ohci_softc_t * sc,ohci_soft_td_t * std)462 ohci_free_std(ohci_softc_t *sc, ohci_soft_td_t *std)
463 {
464 int s;
465
466 s = splusb();
467 ohci_hash_rem_td(sc, std);
468 std->nexttd = sc->sc_freetds;
469 sc->sc_freetds = std;
470 splx(s);
471 }
472
473 usbd_status
ohci_alloc_std_chain(struct ohci_pipe * opipe,ohci_softc_t * sc,int alen,int rd,usbd_xfer_handle xfer,ohci_soft_td_t * sp,ohci_soft_td_t ** ep)474 ohci_alloc_std_chain(struct ohci_pipe *opipe, ohci_softc_t *sc,
475 int alen, int rd, usbd_xfer_handle xfer,
476 ohci_soft_td_t *sp, ohci_soft_td_t **ep)
477 {
478 ohci_soft_td_t *next, *cur;
479 ohci_physaddr_t dataphys, dataphysend;
480 u_int32_t tdflags;
481 int len, curlen;
482 usb_dma_t *dma = &xfer->dmabuf;
483 u_int16_t flags = xfer->flags;
484
485 DPRINTFN(alen < 4096,("ohci_alloc_std_chain: start len=%d\n", alen));
486
487 len = alen;
488 cur = sp;
489 dataphys = DMAADDR(dma, 0);
490 dataphysend = OHCI_PAGE(dataphys + len - 1);
491 tdflags = htole32(
492 (rd ? OHCI_TD_IN : OHCI_TD_OUT) |
493 (flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0) |
494 OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | OHCI_TD_NOINTR);
495
496 for (;;) {
497 next = ohci_alloc_std(sc);
498 if (next == NULL)
499 goto nomem;
500
501 /* The OHCI hardware can handle at most one page crossing. */
502 if (OHCI_PAGE(dataphys) == dataphysend ||
503 OHCI_PAGE(dataphys) + OHCI_PAGE_SIZE == dataphysend) {
504 /* we can handle it in this TD */
505 curlen = len;
506 } else {
507 /* must use multiple TDs, fill as much as possible. */
508 curlen = 2 * OHCI_PAGE_SIZE -
509 (dataphys & (OHCI_PAGE_SIZE-1));
510 /* the length must be a multiple of the max size */
511 curlen -= curlen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize);
512 #ifdef DIAGNOSTIC
513 if (curlen == 0)
514 panic("ohci_alloc_std: curlen == 0");
515 #endif
516 }
517 DPRINTFN(4,("ohci_alloc_std_chain: dataphys=0x%08x "
518 "dataphysend=0x%08x len=%d curlen=%d\n",
519 dataphys, dataphysend,
520 len, curlen));
521 len -= curlen;
522
523 cur->td.td_flags = tdflags;
524 cur->td.td_cbp = htole32(dataphys);
525 cur->nexttd = next;
526 cur->td.td_nexttd = htole32(next->physaddr);
527 cur->td.td_be = htole32(dataphys + curlen - 1);
528 cur->len = curlen;
529 cur->flags = OHCI_ADD_LEN;
530 cur->xfer = xfer;
531 DPRINTFN(10,("ohci_alloc_std_chain: cbp=0x%08x be=0x%08x\n",
532 dataphys, dataphys + curlen - 1));
533 if (len == 0)
534 break;
535 DPRINTFN(10,("ohci_alloc_std_chain: extend chain\n"));
536 dataphys += curlen;
537 cur = next;
538 }
539 if ((flags & USBD_FORCE_SHORT_XFER) &&
540 alen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize) == 0) {
541 /* Force a 0 length transfer at the end. */
542
543 cur = next;
544 next = ohci_alloc_std(sc);
545 if (next == NULL)
546 goto nomem;
547
548 cur->td.td_flags = tdflags;
549 cur->td.td_cbp = 0; /* indicate 0 length packet */
550 cur->nexttd = next;
551 cur->td.td_nexttd = htole32(next->physaddr);
552 cur->td.td_be = ~0;
553 cur->len = 0;
554 cur->flags = 0;
555 cur->xfer = xfer;
556 DPRINTFN(2,("ohci_alloc_std_chain: add 0 xfer\n"));
557 }
558 *ep = cur;
559
560 return (USBD_NORMAL_COMPLETION);
561
562 nomem:
563 /* XXX free chain */
564 return (USBD_NOMEM);
565 }
566
567 #if 0
568 Static void
569 ohci_free_std_chain(ohci_softc_t *sc, ohci_soft_td_t *std,
570 ohci_soft_td_t *stdend)
571 {
572 ohci_soft_td_t *p;
573
574 for (; std != stdend; std = p) {
575 p = std->nexttd;
576 ohci_free_std(sc, std);
577 }
578 }
579 #endif
580
581 ohci_soft_itd_t *
ohci_alloc_sitd(ohci_softc_t * sc)582 ohci_alloc_sitd(ohci_softc_t *sc)
583 {
584 ohci_soft_itd_t *sitd;
585 usbd_status err;
586 int i, s, offs;
587 usb_dma_t dma;
588
589 if (sc->sc_freeitds == NULL) {
590 DPRINTFN(2, ("ohci_alloc_sitd: allocating chunk\n"));
591 err = usb_allocmem(&sc->sc_bus, OHCI_SITD_SIZE * OHCI_SITD_CHUNK,
592 OHCI_ITD_ALIGN, &dma);
593 if (err)
594 return (NULL);
595 s = splusb();
596 for(i = 0; i < OHCI_SITD_CHUNK; i++) {
597 offs = i * OHCI_SITD_SIZE;
598 sitd = KERNADDR(&dma, offs);
599 sitd->physaddr = DMAADDR(&dma, offs);
600 sitd->nextitd = sc->sc_freeitds;
601 sc->sc_freeitds = sitd;
602 }
603 splx(s);
604 }
605
606 s = splusb();
607 sitd = sc->sc_freeitds;
608 sc->sc_freeitds = sitd->nextitd;
609 memset(&sitd->itd, 0, sizeof(ohci_itd_t));
610 sitd->nextitd = NULL;
611 sitd->xfer = NULL;
612 ohci_hash_add_itd(sc, sitd);
613 splx(s);
614
615 #ifdef DIAGNOSTIC
616 sitd->isdone = 0;
617 #endif
618
619 return (sitd);
620 }
621
622 void
ohci_free_sitd(ohci_softc_t * sc,ohci_soft_itd_t * sitd)623 ohci_free_sitd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
624 {
625 int s;
626
627 DPRINTFN(10,("ohci_free_sitd: sitd=%p\n", sitd));
628
629 #ifdef DIAGNOSTIC
630 if (!sitd->isdone) {
631 panic("ohci_free_sitd: sitd=%p not done", sitd);
632 return;
633 }
634 /* Warn double free */
635 sitd->isdone = 0;
636 #endif
637
638 s = splusb();
639 ohci_hash_rem_itd(sc, sitd);
640 sitd->nextitd = sc->sc_freeitds;
641 sc->sc_freeitds = sitd;
642 splx(s);
643 }
644
645 usbd_status
ohci_init(ohci_softc_t * sc)646 ohci_init(ohci_softc_t *sc)
647 {
648 ohci_soft_ed_t *sed, *psed;
649 usbd_status err;
650 int i;
651 u_int32_t s, ctl, rwc, ival, hcr, fm, per, rev, desca, descb;
652
653 DPRINTF(("ohci_init: start\n"));
654 #if defined(__OpenBSD__)
655 printf(",");
656 #else
657 printf("%s:", USBDEVNAME(sc->sc_bus.bdev));
658 #endif
659 rev = OREAD4(sc, OHCI_REVISION);
660 printf(" version %d.%d%s\n", OHCI_REV_HI(rev), OHCI_REV_LO(rev),
661 OHCI_REV_LEGACY(rev) ? ", legacy support" : "");
662
663 if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) {
664 printf("%s: unsupported OHCI revision\n",
665 USBDEVNAME(sc->sc_bus.bdev));
666 sc->sc_bus.usbrev = USBREV_UNKNOWN;
667 return (USBD_INVAL);
668 }
669 sc->sc_bus.usbrev = USBREV_1_0;
670
671 for (i = 0; i < OHCI_HASH_SIZE; i++)
672 LIST_INIT(&sc->sc_hash_tds[i]);
673 for (i = 0; i < OHCI_HASH_SIZE; i++)
674 LIST_INIT(&sc->sc_hash_itds[i]);
675
676 SIMPLEQ_INIT(&sc->sc_free_xfers);
677
678 /* XXX determine alignment by R/W */
679 /* Allocate the HCCA area. */
680 err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE,
681 OHCI_HCCA_ALIGN, &sc->sc_hccadma);
682 if (err)
683 return (err);
684 sc->sc_hcca = KERNADDR(&sc->sc_hccadma, 0);
685 memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE);
686
687 sc->sc_eintrs = OHCI_NORMAL_INTRS;
688
689 /* Allocate dummy ED that starts the control list. */
690 sc->sc_ctrl_head = ohci_alloc_sed(sc);
691 if (sc->sc_ctrl_head == NULL) {
692 err = USBD_NOMEM;
693 goto bad1;
694 }
695 sc->sc_ctrl_head->ed.ed_flags |= htole32(OHCI_ED_SKIP);
696
697 /* Allocate dummy ED that starts the bulk list. */
698 sc->sc_bulk_head = ohci_alloc_sed(sc);
699 if (sc->sc_bulk_head == NULL) {
700 err = USBD_NOMEM;
701 goto bad2;
702 }
703 sc->sc_bulk_head->ed.ed_flags |= htole32(OHCI_ED_SKIP);
704
705 /* Allocate dummy ED that starts the isochronous list. */
706 sc->sc_isoc_head = ohci_alloc_sed(sc);
707 if (sc->sc_isoc_head == NULL) {
708 err = USBD_NOMEM;
709 goto bad3;
710 }
711 sc->sc_isoc_head->ed.ed_flags |= htole32(OHCI_ED_SKIP);
712
713 /* Allocate all the dummy EDs that make up the interrupt tree. */
714 for (i = 0; i < OHCI_NO_EDS; i++) {
715 sed = ohci_alloc_sed(sc);
716 if (sed == NULL) {
717 while (--i >= 0)
718 ohci_free_sed(sc, sc->sc_eds[i]);
719 err = USBD_NOMEM;
720 goto bad4;
721 }
722 /* All ED fields are set to 0. */
723 sc->sc_eds[i] = sed;
724 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP);
725 if (i != 0)
726 psed = sc->sc_eds[(i-1) / 2];
727 else
728 psed= sc->sc_isoc_head;
729 sed->next = psed;
730 sed->ed.ed_nexted = htole32(psed->physaddr);
731 }
732 /*
733 * Fill HCCA interrupt table. The bit reversal is to get
734 * the tree set up properly to spread the interrupts.
735 */
736 for (i = 0; i < OHCI_NO_INTRS; i++)
737 sc->sc_hcca->hcca_interrupt_table[revbits[i]] =
738 htole32(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr);
739
740 #ifdef OHCI_DEBUG
741 if (ohcidebug > 15) {
742 for (i = 0; i < OHCI_NO_EDS; i++) {
743 printf("ed#%d ", i);
744 ohci_dump_ed(sc->sc_eds[i]);
745 }
746 printf("iso ");
747 ohci_dump_ed(sc->sc_isoc_head);
748 }
749 #endif
750 /* Preserve values programmed by SMM/BIOS but lost over reset. */
751 ctl = OREAD4(sc, OHCI_CONTROL);
752 rwc = ctl & OHCI_RWC;
753 fm = OREAD4(sc, OHCI_FM_INTERVAL);
754 desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
755 descb = OREAD4(sc, OHCI_RH_DESCRIPTOR_B);
756
757 /* Determine in what context we are running. */
758 if (ctl & OHCI_IR) {
759 /* SMM active, request change */
760 DPRINTF(("ohci_init: SMM active, request owner change\n"));
761 if ((sc->sc_intre & (OHCI_OC | OHCI_MIE)) ==
762 (OHCI_OC | OHCI_MIE))
763 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_MIE);
764 s = OREAD4(sc, OHCI_COMMAND_STATUS);
765 OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR);
766 for (i = 0; i < 100 && (ctl & OHCI_IR); i++) {
767 usb_delay_ms(&sc->sc_bus, 1);
768 ctl = OREAD4(sc, OHCI_CONTROL);
769 }
770 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_MIE);
771 if (ctl & OHCI_IR) {
772 printf("%s: SMM does not respond, resetting\n",
773 USBDEVNAME(sc->sc_bus.bdev));
774 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc);
775 goto reset;
776 }
777 #if 0
778 /* Don't bother trying to reuse the BIOS init, we'll reset it anyway. */
779 } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) {
780 /* BIOS started controller. */
781 DPRINTF(("ohci_init: BIOS active\n"));
782 if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) {
783 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL | rwc);
784 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
785 }
786 #endif
787 } else {
788 DPRINTF(("ohci_init: cold started\n"));
789 reset:
790 /* Controller was cold started. */
791 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY);
792 }
793
794 /*
795 * This reset should not be necessary according to the OHCI spec, but
796 * without it some controllers do not start.
797 */
798 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev)));
799 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc);
800 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY);
801
802 /* We now own the host controller and the bus has been reset. */
803
804 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */
805 /* Nominal time for a reset is 10 us. */
806 for (i = 0; i < 10; i++) {
807 delay(10);
808 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR;
809 if (!hcr)
810 break;
811 }
812 if (hcr) {
813 printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev));
814 err = USBD_IOERROR;
815 goto bad5;
816 }
817 #ifdef OHCI_DEBUG
818 if (ohcidebug > 15)
819 ohci_dumpregs(sc);
820 #endif
821
822 /* The controller is now in SUSPEND state, we have 2ms to finish. */
823
824 /* Set up HC registers. */
825 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0));
826 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr);
827 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr);
828 /* disable all interrupts and then switch on all desired interrupts */
829 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS);
830 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE);
831 /* switch on desired functional features */
832 ctl = OREAD4(sc, OHCI_CONTROL);
833 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR);
834 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE |
835 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL | rwc;
836 /* And finally start it! */
837 OWRITE4(sc, OHCI_CONTROL, ctl);
838
839 /*
840 * The controller is now OPERATIONAL. Set a some final
841 * registers that should be set earlier, but that the
842 * controller ignores when in the SUSPEND state.
843 */
844 ival = OHCI_GET_IVAL(fm);
845 fm = (OREAD4(sc, OHCI_FM_REMAINING) & OHCI_FIT) ^ OHCI_FIT;
846 fm |= OHCI_FSMPS(ival) | ival;
847 OWRITE4(sc, OHCI_FM_INTERVAL, fm);
848 per = OHCI_PERIODIC(ival); /* 90% periodic */
849 OWRITE4(sc, OHCI_PERIODIC_START, per);
850
851 /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */
852 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP);
853 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */
854 usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY);
855 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca);
856 OWRITE4(sc, OHCI_RH_DESCRIPTOR_B, descb);
857 usb_delay_ms(&sc->sc_bus, OHCI_GET_POTPGT(desca) * UHD_PWRON_FACTOR);
858
859 /*
860 * The AMD756 requires a delay before re-reading the register,
861 * otherwise it will occasionally report 0 ports.
862 */
863 sc->sc_noport = 0;
864 for (i = 0; i < 10 && sc->sc_noport == 0; i++) {
865 usb_delay_ms(&sc->sc_bus, OHCI_READ_DESC_DELAY);
866 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A));
867 }
868
869 #ifdef OHCI_DEBUG
870 if (ohcidebug > 5)
871 ohci_dumpregs(sc);
872 #endif
873
874 /* Set up the bus struct. */
875 sc->sc_bus.methods = &ohci_bus_methods;
876 sc->sc_bus.pipe_size = sizeof(struct ohci_pipe);
877
878 #if defined(__NetBSD__) || defined(__OpenBSD__)
879 sc->sc_control = sc->sc_intre = 0;
880 sc->sc_shutdownhook = shutdownhook_establish(ohci_shutdown, sc);
881 #endif
882
883 usb_callout_init(sc->sc_tmo_rhsc);
884
885 return (USBD_NORMAL_COMPLETION);
886
887 bad5:
888 for (i = 0; i < OHCI_NO_EDS; i++)
889 ohci_free_sed(sc, sc->sc_eds[i]);
890 bad4:
891 ohci_free_sed(sc, sc->sc_isoc_head);
892 bad3:
893 ohci_free_sed(sc, sc->sc_bulk_head);
894 bad2:
895 ohci_free_sed(sc, sc->sc_ctrl_head);
896 bad1:
897 usb_freemem(&sc->sc_bus, &sc->sc_hccadma);
898 return (err);
899 }
900
901 usbd_status
ohci_allocm(struct usbd_bus * bus,usb_dma_t * dma,u_int32_t size)902 ohci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size)
903 {
904 #if defined(__NetBSD__) || defined(__OpenBSD__)
905 struct ohci_softc *sc = (struct ohci_softc *)bus;
906 #endif
907
908 return (usb_allocmem(&sc->sc_bus, size, 0, dma));
909 }
910
911 void
ohci_freem(struct usbd_bus * bus,usb_dma_t * dma)912 ohci_freem(struct usbd_bus *bus, usb_dma_t *dma)
913 {
914 #if defined(__NetBSD__) || defined(__OpenBSD__)
915 struct ohci_softc *sc = (struct ohci_softc *)bus;
916 #endif
917
918 usb_freemem(&sc->sc_bus, dma);
919 }
920
921 usbd_xfer_handle
ohci_allocx(struct usbd_bus * bus)922 ohci_allocx(struct usbd_bus *bus)
923 {
924 struct ohci_softc *sc = (struct ohci_softc *)bus;
925 usbd_xfer_handle xfer;
926
927 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers);
928 if (xfer != NULL) {
929 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next);
930 #ifdef DIAGNOSTIC
931 if (xfer->busy_free != XFER_FREE) {
932 printf("ohci_allocx: xfer=%p not free, 0x%08x\n", xfer,
933 xfer->busy_free);
934 }
935 #endif
936 } else {
937 xfer = malloc(sizeof(struct ohci_xfer), M_USB, M_NOWAIT);
938 }
939 if (xfer != NULL) {
940 memset(xfer, 0, sizeof (struct ohci_xfer));
941 #ifdef DIAGNOSTIC
942 xfer->busy_free = XFER_BUSY;
943 #endif
944 }
945 return (xfer);
946 }
947
948 void
ohci_freex(struct usbd_bus * bus,usbd_xfer_handle xfer)949 ohci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer)
950 {
951 struct ohci_softc *sc = (struct ohci_softc *)bus;
952
953 #ifdef DIAGNOSTIC
954 if (xfer->busy_free != XFER_BUSY) {
955 printf("ohci_freex: xfer=%p not busy, 0x%08x\n", xfer,
956 xfer->busy_free);
957 return;
958 }
959 xfer->busy_free = XFER_FREE;
960 #endif
961 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next);
962 }
963
964 /*
965 * Shut down the controller when the system is going down.
966 */
967 void
ohci_shutdown(void * v)968 ohci_shutdown(void *v)
969 {
970 ohci_softc_t *sc = v;
971
972 DPRINTF(("ohci_shutdown: stopping the HC\n"));
973 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
974 }
975
976 /*
977 * Handle suspend/resume.
978 *
979 * We need to switch to polling mode here, because this routine is
980 * called from an interrupt context. This is all right since we
981 * are almost suspended anyway.
982 */
983 void
ohci_power(int why,void * v)984 ohci_power(int why, void *v)
985 {
986 ohci_softc_t *sc = v;
987 u_int32_t reg;
988 int s;
989
990 #ifdef OHCI_DEBUG
991 DPRINTF(("ohci_power: sc=%p, why=%d\n", sc, why));
992 ohci_dumpregs(sc);
993 #endif
994
995 s = splhardusb();
996 switch (why) {
997 case PWR_SUSPEND:
998 case PWR_STANDBY:
999 sc->sc_bus.use_polling++;
1000 reg = OREAD4(sc, OHCI_CONTROL) & ~OHCI_HCFS_MASK;
1001 if (sc->sc_control == 0) {
1002 /*
1003 * Preserve register values, in case that APM BIOS
1004 * does not recover them.
1005 */
1006 sc->sc_control = reg;
1007 sc->sc_intre = OREAD4(sc, OHCI_INTERRUPT_ENABLE);
1008 sc->sc_ival = OHCI_GET_IVAL(OREAD4(sc,
1009 OHCI_FM_INTERVAL));
1010 }
1011 reg |= OHCI_HCFS_SUSPEND;
1012 OWRITE4(sc, OHCI_CONTROL, reg);
1013 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT);
1014 sc->sc_bus.use_polling--;
1015 break;
1016 case PWR_RESUME:
1017 sc->sc_bus.use_polling++;
1018
1019 /* Some broken BIOSes do not recover these values */
1020 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0));
1021 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr);
1022 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr);
1023 if (sc->sc_intre)
1024 OWRITE4(sc, OHCI_INTERRUPT_ENABLE,
1025 sc->sc_intre & (OHCI_ALL_INTRS | OHCI_MIE));
1026 if (sc->sc_control)
1027 reg = sc->sc_control;
1028 else
1029 reg = OREAD4(sc, OHCI_CONTROL);
1030 reg |= OHCI_HCFS_RESUME;
1031 OWRITE4(sc, OHCI_CONTROL, reg);
1032 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
1033 reg = (reg & ~OHCI_HCFS_MASK) | OHCI_HCFS_OPERATIONAL;
1034 OWRITE4(sc, OHCI_CONTROL, reg);
1035
1036 reg = (OREAD4(sc, OHCI_FM_REMAINING) & OHCI_FIT) ^ OHCI_FIT;
1037 reg |= OHCI_FSMPS(sc->sc_ival) | sc->sc_ival;
1038 OWRITE4(sc, OHCI_FM_INTERVAL, reg);
1039 OWRITE4(sc, OHCI_PERIODIC_START, OHCI_PERIODIC(sc->sc_ival));
1040
1041 /* Fiddle the No OverCurrent Protection to avoid a chip bug */
1042 reg = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
1043 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, reg | OHCI_NOCP);
1044 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */
1045 usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY);
1046 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, reg);
1047
1048 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY);
1049 sc->sc_control = sc->sc_intre = sc->sc_ival = 0;
1050 sc->sc_bus.use_polling--;
1051 break;
1052 #if defined(__NetBSD__)
1053 case PWR_SOFTSUSPEND:
1054 case PWR_SOFTSTANDBY:
1055 case PWR_SOFTRESUME:
1056 break;
1057 #endif
1058 }
1059 splx(s);
1060 }
1061
1062 #ifdef OHCI_DEBUG
1063 void
ohci_dumpregs(ohci_softc_t * sc)1064 ohci_dumpregs(ohci_softc_t *sc)
1065 {
1066 DPRINTF(("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n",
1067 OREAD4(sc, OHCI_REVISION),
1068 OREAD4(sc, OHCI_CONTROL),
1069 OREAD4(sc, OHCI_COMMAND_STATUS)));
1070 DPRINTF((" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n",
1071 OREAD4(sc, OHCI_INTERRUPT_STATUS),
1072 OREAD4(sc, OHCI_INTERRUPT_ENABLE),
1073 OREAD4(sc, OHCI_INTERRUPT_DISABLE)));
1074 DPRINTF((" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n",
1075 OREAD4(sc, OHCI_HCCA),
1076 OREAD4(sc, OHCI_PERIOD_CURRENT_ED),
1077 OREAD4(sc, OHCI_CONTROL_HEAD_ED)));
1078 DPRINTF((" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n",
1079 OREAD4(sc, OHCI_CONTROL_CURRENT_ED),
1080 OREAD4(sc, OHCI_BULK_HEAD_ED),
1081 OREAD4(sc, OHCI_BULK_CURRENT_ED)));
1082 DPRINTF((" done=0x%08x fmival=0x%08x fmrem=0x%08x\n",
1083 OREAD4(sc, OHCI_DONE_HEAD),
1084 OREAD4(sc, OHCI_FM_INTERVAL),
1085 OREAD4(sc, OHCI_FM_REMAINING)));
1086 DPRINTF((" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n",
1087 OREAD4(sc, OHCI_FM_NUMBER),
1088 OREAD4(sc, OHCI_PERIODIC_START),
1089 OREAD4(sc, OHCI_LS_THRESHOLD)));
1090 DPRINTF((" desca=0x%08x descb=0x%08x stat=0x%08x\n",
1091 OREAD4(sc, OHCI_RH_DESCRIPTOR_A),
1092 OREAD4(sc, OHCI_RH_DESCRIPTOR_B),
1093 OREAD4(sc, OHCI_RH_STATUS)));
1094 DPRINTF((" port1=0x%08x port2=0x%08x\n",
1095 OREAD4(sc, OHCI_RH_PORT_STATUS(1)),
1096 OREAD4(sc, OHCI_RH_PORT_STATUS(2))));
1097 DPRINTF((" HCCA: frame_number=0x%04x done_head=0x%08x\n",
1098 le32toh(sc->sc_hcca->hcca_frame_number),
1099 le32toh(sc->sc_hcca->hcca_done_head)));
1100 }
1101 #endif
1102
1103 Static int ohci_intr1(ohci_softc_t *);
1104
1105 int
ohci_intr(void * p)1106 ohci_intr(void *p)
1107 {
1108 ohci_softc_t *sc = p;
1109
1110 if (sc == NULL || sc->sc_dying)
1111 return (0);
1112
1113 /* If we get an interrupt while polling, then just ignore it. */
1114 if (!cold && sc->sc_bus.use_polling) {
1115 #ifdef DIAGNOSTIC
1116 static struct timeval ohci_intr_tv;
1117 if ((OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs) &&
1118 usbd_ratecheck(&ohci_intr_tv))
1119 DPRINTFN(16,
1120 ("ohci_intr: ignored interrupt while polling\n"));
1121 #endif
1122 return (0);
1123 }
1124
1125 return (ohci_intr1(sc));
1126 }
1127
1128 Static int
ohci_intr1(ohci_softc_t * sc)1129 ohci_intr1(ohci_softc_t *sc)
1130 {
1131 u_int32_t intrs, eintrs;
1132 ohci_physaddr_t done;
1133
1134 DPRINTFN(14,("ohci_intr1: enter\n"));
1135
1136 /* In case the interrupt occurs before initialization has completed. */
1137 if (sc == NULL || sc->sc_hcca == NULL) {
1138 #ifdef DIAGNOSTIC
1139 printf("ohci_intr: sc->sc_hcca == NULL\n");
1140 #endif
1141 return (0);
1142 }
1143
1144 intrs = 0;
1145 done = le32toh(sc->sc_hcca->hcca_done_head);
1146 if (done != 0) {
1147 if (done & ~OHCI_DONE_INTRS)
1148 intrs = OHCI_WDH;
1149 if (done & OHCI_DONE_INTRS)
1150 intrs |= OREAD4(sc, OHCI_INTERRUPT_STATUS);
1151 sc->sc_hcca->hcca_done_head = 0;
1152 } else {
1153 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS);
1154 /* If we've flushed out a WDH then reread */
1155 if (intrs & OHCI_WDH) {
1156 done = le32toh(sc->sc_hcca->hcca_done_head);
1157 sc->sc_hcca->hcca_done_head = 0;
1158 }
1159 }
1160
1161 if (!intrs)
1162 return (0);
1163
1164 intrs &= ~OHCI_MIE;
1165 OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs); /* Acknowledge */
1166 eintrs = intrs & sc->sc_eintrs;
1167 if (!eintrs)
1168 return (0);
1169
1170 sc->sc_bus.intr_context++;
1171 sc->sc_bus.no_intrs++;
1172 DPRINTFN(7, ("ohci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n",
1173 sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS),
1174 (u_int)eintrs));
1175
1176 if (eintrs & OHCI_SO) {
1177 sc->sc_overrun_cnt++;
1178 if (usbd_ratecheck(&sc->sc_overrun_ntc)) {
1179 printf("%s: %u scheduling overruns\n",
1180 USBDEVNAME(sc->sc_bus.bdev), sc->sc_overrun_cnt);
1181 sc->sc_overrun_cnt = 0;
1182 }
1183 /* XXX do what */
1184 eintrs &= ~OHCI_SO;
1185 }
1186 if (eintrs & OHCI_WDH) {
1187 ohci_add_done(sc, done &~ OHCI_DONE_INTRS);
1188 usb_schedsoftintr(&sc->sc_bus);
1189 eintrs &= ~OHCI_WDH;
1190 }
1191 if (eintrs & OHCI_RD) {
1192 printf("%s: resume detect\n", USBDEVNAME(sc->sc_bus.bdev));
1193 /* XXX process resume detect */
1194 }
1195 if (eintrs & OHCI_UE) {
1196 printf("%s: unrecoverable error, controller halted\n",
1197 USBDEVNAME(sc->sc_bus.bdev));
1198 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
1199 /* XXX what else */
1200 }
1201 if (eintrs & OHCI_RHSC) {
1202 ohci_rhsc(sc, sc->sc_intrxfer);
1203 /*
1204 * Disable RHSC interrupt for now, because it will be
1205 * on until the port has been reset.
1206 */
1207 ohci_rhsc_able(sc, 0);
1208 DPRINTFN(2, ("%s: rhsc interrupt disabled\n",
1209 USBDEVNAME(sc->sc_bus.bdev)));
1210
1211 /* Do not allow RHSC interrupts > 1 per second */
1212 usb_callout(sc->sc_tmo_rhsc, hz, ohci_rhsc_enable, sc);
1213 eintrs &= ~OHCI_RHSC;
1214 }
1215
1216 sc->sc_bus.intr_context--;
1217
1218 if (eintrs != 0) {
1219 /* Block unprocessed interrupts. XXX */
1220 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, eintrs);
1221 sc->sc_eintrs &= ~eintrs;
1222 printf("%s: blocking intrs 0x%x\n",
1223 USBDEVNAME(sc->sc_bus.bdev), eintrs);
1224 }
1225
1226 return (1);
1227 }
1228
1229 void
ohci_rhsc_able(ohci_softc_t * sc,int on)1230 ohci_rhsc_able(ohci_softc_t *sc, int on)
1231 {
1232 DPRINTFN(4, ("ohci_rhsc_able: on=%d\n", on));
1233 if (on) {
1234 sc->sc_eintrs |= OHCI_RHSC;
1235 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC);
1236 } else {
1237 sc->sc_eintrs &= ~OHCI_RHSC;
1238 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_RHSC);
1239 }
1240 }
1241
1242 void
ohci_rhsc_enable(void * v_sc)1243 ohci_rhsc_enable(void *v_sc)
1244 {
1245 ohci_softc_t *sc = v_sc;
1246 int s;
1247
1248 s = splhardusb();
1249 ohci_rhsc(sc, sc->sc_intrxfer);
1250 DPRINTFN(2, ("%s: rhsc interrupt enabled\n",
1251 USBDEVNAME(sc->sc_bus.bdev)));
1252
1253 ohci_rhsc_able(sc, 1);
1254 splx(s);
1255 }
1256
1257 #ifdef OHCI_DEBUG
1258 char *ohci_cc_strs[] = {
1259 "NO_ERROR",
1260 "CRC",
1261 "BIT_STUFFING",
1262 "DATA_TOGGLE_MISMATCH",
1263 "STALL",
1264 "DEVICE_NOT_RESPONDING",
1265 "PID_CHECK_FAILURE",
1266 "UNEXPECTED_PID",
1267 "DATA_OVERRUN",
1268 "DATA_UNDERRUN",
1269 "BUFFER_OVERRUN",
1270 "BUFFER_UNDERRUN",
1271 "reserved",
1272 "reserved",
1273 "NOT_ACCESSED",
1274 "NOT_ACCESSED",
1275 };
1276 #endif
1277
1278 void
ohci_add_done(ohci_softc_t * sc,ohci_physaddr_t done)1279 ohci_add_done(ohci_softc_t *sc, ohci_physaddr_t done)
1280 {
1281 ohci_soft_itd_t *sitd, *sidone, **ip;
1282 ohci_soft_td_t *std, *sdone, **p;
1283
1284 /* Reverse the done list. */
1285 for (sdone = NULL, sidone = NULL; done != 0; ) {
1286 std = ohci_hash_find_td(sc, done);
1287 if (std != NULL) {
1288 std->dnext = sdone;
1289 done = le32toh(std->td.td_nexttd);
1290 sdone = std;
1291 DPRINTFN(10,("add TD %p\n", std));
1292 continue;
1293 }
1294 sitd = ohci_hash_find_itd(sc, done);
1295 if (sitd != NULL) {
1296 sitd->dnext = sidone;
1297 done = le32toh(sitd->itd.itd_nextitd);
1298 sidone = sitd;
1299 DPRINTFN(5,("add ITD %p\n", sitd));
1300 continue;
1301 }
1302 panic("ohci_add_done: addr 0x%08lx not found", (u_long)done);
1303 }
1304
1305 /* sdone & sidone now hold the done lists. */
1306 /* Put them on the already processed lists. */
1307 for (p = &sc->sc_sdone; *p != NULL; p = &(*p)->dnext)
1308 ;
1309 *p = sdone;
1310 for (ip = &sc->sc_sidone; *ip != NULL; ip = &(*ip)->dnext)
1311 ;
1312 *ip = sidone;
1313 }
1314
1315 void
ohci_softintr(void * v)1316 ohci_softintr(void *v)
1317 {
1318 ohci_softc_t *sc = v;
1319 ohci_soft_itd_t *sitd, *sidone, *sitdnext;
1320 ohci_soft_td_t *std, *sdone, *stdnext;
1321 usbd_xfer_handle xfer;
1322 struct ohci_pipe *opipe;
1323 int len, cc, s;
1324 int i, j, actlen, iframes, uedir;
1325
1326 DPRINTFN(10,("ohci_softintr: enter\n"));
1327
1328 sc->sc_bus.intr_context++;
1329
1330 s = splhardusb();
1331 sdone = sc->sc_sdone;
1332 sc->sc_sdone = NULL;
1333 sidone = sc->sc_sidone;
1334 sc->sc_sidone = NULL;
1335 splx(s);
1336
1337 DPRINTFN(10,("ohci_softintr: sdone=%p sidone=%p\n", sdone, sidone));
1338
1339 #ifdef OHCI_DEBUG
1340 if (ohcidebug > 10) {
1341 DPRINTF(("ohci_process_done: TD done:\n"));
1342 ohci_dump_tds(sdone);
1343 }
1344 #endif
1345
1346 for (std = sdone; std; std = stdnext) {
1347 xfer = std->xfer;
1348 stdnext = std->dnext;
1349 DPRINTFN(10, ("ohci_process_done: std=%p xfer=%p hcpriv=%p\n",
1350 std, xfer, xfer ? xfer->hcpriv : 0));
1351 if (xfer == NULL) {
1352 /*
1353 * xfer == NULL: There seems to be no xfer associated
1354 * with this TD. It is tailp that happened to end up on
1355 * the done queue.
1356 * Shouldn't happen, but some chips are broken(?).
1357 */
1358 continue;
1359 }
1360 if (xfer->status == USBD_CANCELLED ||
1361 xfer->status == USBD_TIMEOUT) {
1362 DPRINTF(("ohci_process_done: cancel/timeout %p\n",
1363 xfer));
1364 /* Handled by abort routine. */
1365 continue;
1366 }
1367 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer);
1368
1369 len = std->len;
1370 if (std->td.td_cbp != 0)
1371 len -= le32toh(std->td.td_be) -
1372 le32toh(std->td.td_cbp) + 1;
1373 DPRINTFN(10, ("ohci_process_done: len=%d, flags=0x%x\n", len,
1374 std->flags));
1375 if (std->flags & OHCI_ADD_LEN)
1376 xfer->actlen += len;
1377
1378 cc = OHCI_TD_GET_CC(le32toh(std->td.td_flags));
1379 if (cc == OHCI_CC_NO_ERROR) {
1380 if (std->flags & OHCI_CALL_DONE) {
1381 xfer->status = USBD_NORMAL_COMPLETION;
1382 s = splusb();
1383 usb_transfer_complete(xfer);
1384 splx(s);
1385 }
1386 ohci_free_std(sc, std);
1387 } else {
1388 /*
1389 * Endpoint is halted. First unlink all the TDs
1390 * belonging to the failed transfer, and then restart
1391 * the endpoint.
1392 */
1393 ohci_soft_td_t *p, *n;
1394 opipe = (struct ohci_pipe *)xfer->pipe;
1395
1396 DPRINTFN(15,("ohci_process_done: error cc=%d (%s)\n",
1397 OHCI_TD_GET_CC(le32toh(std->td.td_flags)),
1398 ohci_cc_strs[OHCI_TD_GET_CC(le32toh(std->td.td_flags))]));
1399
1400 /* remove TDs */
1401 for (p = std; p->xfer == xfer; p = n) {
1402 n = p->nexttd;
1403 ohci_free_std(sc, p);
1404 }
1405
1406 /* clear halt */
1407 opipe->sed->ed.ed_headp = htole32(p->physaddr);
1408 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
1409
1410 if (cc == OHCI_CC_STALL)
1411 xfer->status = USBD_STALLED;
1412 else
1413 xfer->status = USBD_IOERROR;
1414 s = splusb();
1415 usb_transfer_complete(xfer);
1416 splx(s);
1417 }
1418 }
1419
1420 #ifdef OHCI_DEBUG
1421 if (ohcidebug > 10) {
1422 DPRINTF(("ohci_softintr: ITD done:\n"));
1423 ohci_dump_itds(sidone);
1424 }
1425 #endif
1426
1427 for (sitd = sidone; sitd != NULL; sitd = sitdnext) {
1428 xfer = sitd->xfer;
1429 sitdnext = sitd->dnext;
1430 DPRINTFN(1, ("ohci_process_done: sitd=%p xfer=%p hcpriv=%p\n",
1431 sitd, xfer, xfer ? xfer->hcpriv : 0));
1432 if (xfer == NULL)
1433 continue;
1434 if (xfer->status == USBD_CANCELLED ||
1435 xfer->status == USBD_TIMEOUT) {
1436 DPRINTF(("ohci_process_done: cancel/timeout %p\n",
1437 xfer));
1438 /* Handled by abort routine. */
1439 continue;
1440 }
1441 #ifdef DIAGNOSTIC
1442 if (sitd->isdone)
1443 printf("ohci_softintr: sitd=%p is done\n", sitd);
1444 sitd->isdone = 1;
1445 #endif
1446 if (sitd->flags & OHCI_CALL_DONE) {
1447 ohci_soft_itd_t *next;
1448
1449 opipe = (struct ohci_pipe *)xfer->pipe;
1450 opipe->u.iso.inuse -= xfer->nframes;
1451 uedir = UE_GET_DIR(xfer->pipe->endpoint->edesc->
1452 bEndpointAddress);
1453 xfer->status = USBD_NORMAL_COMPLETION;
1454 actlen = 0;
1455 for (i = 0, sitd = xfer->hcpriv;;
1456 sitd = next) {
1457 next = sitd->nextitd;
1458 if (OHCI_ITD_GET_CC(le32toh(sitd->
1459 itd.itd_flags)) != OHCI_CC_NO_ERROR)
1460 xfer->status = USBD_IOERROR;
1461 /* For input, update frlengths with actual */
1462 /* XXX anything necessary for output? */
1463 if (uedir == UE_DIR_IN &&
1464 xfer->status == USBD_NORMAL_COMPLETION) {
1465 iframes = OHCI_ITD_GET_FC(le32toh(
1466 sitd->itd.itd_flags));
1467 for (j = 0; j < iframes; i++, j++) {
1468 len = le16toh(sitd->
1469 itd.itd_offset[j]);
1470 len =
1471 (OHCI_ITD_PSW_GET_CC(len) ==
1472 OHCI_CC_NOT_ACCESSED) ? 0 :
1473 OHCI_ITD_PSW_LENGTH(len);
1474 xfer->frlengths[i] = len;
1475 actlen += len;
1476 }
1477 }
1478 if (sitd->flags & OHCI_CALL_DONE)
1479 break;
1480 ohci_free_sitd(sc, sitd);
1481 }
1482 ohci_free_sitd(sc, sitd);
1483 if (uedir == UE_DIR_IN &&
1484 xfer->status == USBD_NORMAL_COMPLETION)
1485 xfer->actlen = actlen;
1486 xfer->hcpriv = NULL;
1487
1488 s = splusb();
1489 usb_transfer_complete(xfer);
1490 splx(s);
1491 }
1492 }
1493
1494 #ifdef USB_USE_SOFTINTR
1495 if (sc->sc_softwake) {
1496 sc->sc_softwake = 0;
1497 wakeup(&sc->sc_softwake);
1498 }
1499 #endif /* USB_USE_SOFTINTR */
1500
1501 sc->sc_bus.intr_context--;
1502 DPRINTFN(10,("ohci_softintr: done:\n"));
1503 }
1504
1505 void
ohci_device_ctrl_done(usbd_xfer_handle xfer)1506 ohci_device_ctrl_done(usbd_xfer_handle xfer)
1507 {
1508 DPRINTFN(10,("ohci_device_ctrl_done: xfer=%p\n", xfer));
1509
1510 #ifdef DIAGNOSTIC
1511 if (!(xfer->rqflags & URQ_REQUEST)) {
1512 panic("ohci_device_ctrl_done: not a request");
1513 }
1514 #endif
1515 }
1516
1517 void
ohci_device_intr_done(usbd_xfer_handle xfer)1518 ohci_device_intr_done(usbd_xfer_handle xfer)
1519 {
1520 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
1521 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
1522 ohci_soft_ed_t *sed = opipe->sed;
1523 ohci_soft_td_t *data, *tail;
1524
1525
1526 DPRINTFN(10, ("ohci_device_intr_done: xfer=%p, actlen=%d\n", xfer,
1527 xfer->actlen));
1528
1529 if (xfer->pipe->repeat) {
1530 data = opipe->tail.td;
1531 tail = ohci_alloc_std(sc); /* XXX should reuse TD */
1532 if (tail == NULL) {
1533 xfer->status = USBD_NOMEM;
1534 return;
1535 }
1536 tail->xfer = NULL;
1537
1538 data->td.td_flags = htole32(
1539 OHCI_TD_IN | OHCI_TD_NOCC |
1540 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY);
1541 if (xfer->flags & USBD_SHORT_XFER_OK)
1542 data->td.td_flags |= htole32(OHCI_TD_R);
1543 data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf, 0));
1544 data->nexttd = tail;
1545 data->td.td_nexttd = htole32(tail->physaddr);
1546 data->td.td_be = htole32(le32toh(data->td.td_cbp) +
1547 xfer->length - 1);
1548 data->len = xfer->length;
1549 data->xfer = xfer;
1550 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN;
1551 xfer->hcpriv = data;
1552 xfer->actlen = 0;
1553
1554 sed->ed.ed_tailp = htole32(tail->physaddr);
1555 opipe->tail.td = tail;
1556 }
1557 }
1558
1559 void
ohci_device_bulk_done(usbd_xfer_handle xfer)1560 ohci_device_bulk_done(usbd_xfer_handle xfer)
1561 {
1562 DPRINTFN(10, ("ohci_device_bulk_done: xfer=%p, actlen=%d\n", xfer,
1563 xfer->actlen));
1564 }
1565
1566 void
ohci_rhsc(ohci_softc_t * sc,usbd_xfer_handle xfer)1567 ohci_rhsc(ohci_softc_t *sc, usbd_xfer_handle xfer)
1568 {
1569 usbd_pipe_handle pipe;
1570 u_char *p;
1571 int i, m;
1572 int hstatus;
1573
1574 hstatus = OREAD4(sc, OHCI_RH_STATUS);
1575 DPRINTF(("ohci_rhsc: sc=%p xfer=%p hstatus=0x%08x\n",
1576 sc, xfer, hstatus));
1577
1578 if (xfer == NULL) {
1579 /* Just ignore the change. */
1580 return;
1581 }
1582
1583 pipe = xfer->pipe;
1584
1585 p = KERNADDR(&xfer->dmabuf, 0);
1586 m = min(sc->sc_noport, xfer->length * 8 - 1);
1587 memset(p, 0, xfer->length);
1588 for (i = 1; i <= m; i++) {
1589 /* Pick out CHANGE bits from the status reg. */
1590 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16)
1591 p[i/8] |= 1 << (i%8);
1592 }
1593 DPRINTF(("ohci_rhsc: change=0x%02x\n", *p));
1594 xfer->actlen = xfer->length;
1595 xfer->status = USBD_NORMAL_COMPLETION;
1596
1597 usb_transfer_complete(xfer);
1598 }
1599
1600 void
ohci_root_intr_done(usbd_xfer_handle xfer)1601 ohci_root_intr_done(usbd_xfer_handle xfer)
1602 {
1603 }
1604
1605 void
ohci_root_ctrl_done(usbd_xfer_handle xfer)1606 ohci_root_ctrl_done(usbd_xfer_handle xfer)
1607 {
1608 }
1609
1610 /*
1611 * Wait here until controller claims to have an interrupt.
1612 * Then call ohci_intr and return. Use timeout to avoid waiting
1613 * too long.
1614 */
1615 void
ohci_waitintr(ohci_softc_t * sc,usbd_xfer_handle xfer)1616 ohci_waitintr(ohci_softc_t *sc, usbd_xfer_handle xfer)
1617 {
1618 int timo;
1619 u_int32_t intrs;
1620
1621 xfer->status = USBD_IN_PROGRESS;
1622 for (timo = xfer->timeout; timo >= 0; timo--) {
1623 usb_delay_ms(&sc->sc_bus, 1);
1624 if (sc->sc_dying)
1625 break;
1626 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs;
1627 DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs));
1628 #ifdef OHCI_DEBUG
1629 if (ohcidebug > 15)
1630 ohci_dumpregs(sc);
1631 #endif
1632 if (intrs) {
1633 ohci_intr1(sc);
1634 if (xfer->status != USBD_IN_PROGRESS)
1635 return;
1636 }
1637 }
1638
1639 /* Timeout */
1640 DPRINTF(("ohci_waitintr: timeout\n"));
1641 xfer->status = USBD_TIMEOUT;
1642 usb_transfer_complete(xfer);
1643 /* XXX should free TD */
1644 }
1645
1646 void
ohci_poll(struct usbd_bus * bus)1647 ohci_poll(struct usbd_bus *bus)
1648 {
1649 ohci_softc_t *sc = (ohci_softc_t *)bus;
1650 #ifdef OHCI_DEBUG
1651 static int last;
1652 int new;
1653 new = OREAD4(sc, OHCI_INTERRUPT_STATUS);
1654 if (new != last) {
1655 DPRINTFN(10,("ohci_poll: intrs=0x%04x\n", new));
1656 last = new;
1657 }
1658 #endif
1659
1660 if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs)
1661 ohci_intr1(sc);
1662 }
1663
1664 usbd_status
ohci_device_request(usbd_xfer_handle xfer)1665 ohci_device_request(usbd_xfer_handle xfer)
1666 {
1667 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
1668 usb_device_request_t *req = &xfer->request;
1669 usbd_device_handle dev = opipe->pipe.device;
1670 ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
1671 int addr = dev->address;
1672 ohci_soft_td_t *setup, *stat, *next, *tail;
1673 ohci_soft_ed_t *sed;
1674 int isread;
1675 int len;
1676 usbd_status err;
1677 int s;
1678
1679 isread = req->bmRequestType & UT_READ;
1680 len = UGETW(req->wLength);
1681
1682 DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, "
1683 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n",
1684 req->bmRequestType, req->bRequest, UGETW(req->wValue),
1685 UGETW(req->wIndex), len, addr,
1686 opipe->pipe.endpoint->edesc->bEndpointAddress));
1687
1688 setup = opipe->tail.td;
1689 stat = ohci_alloc_std(sc);
1690 if (stat == NULL) {
1691 err = USBD_NOMEM;
1692 goto bad1;
1693 }
1694 tail = ohci_alloc_std(sc);
1695 if (tail == NULL) {
1696 err = USBD_NOMEM;
1697 goto bad2;
1698 }
1699 tail->xfer = NULL;
1700
1701 sed = opipe->sed;
1702 opipe->u.ctl.length = len;
1703
1704 /* Update device address and length since they may have changed
1705 during the setup of the control pipe in usbd_new_device(). */
1706 /* XXX This only needs to be done once, but it's too early in open. */
1707 /* XXXX Should not touch ED here! */
1708 sed->ed.ed_flags = htole32(
1709 (le32toh(sed->ed.ed_flags) & ~(OHCI_ED_ADDRMASK | OHCI_ED_MAXPMASK)) |
1710 OHCI_ED_SET_FA(addr) |
1711 OHCI_ED_SET_MAXP(UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize)));
1712
1713 next = stat;
1714
1715 /* Set up data transaction */
1716 if (len != 0) {
1717 ohci_soft_td_t *std = stat;
1718
1719 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer,
1720 std, &stat);
1721 stat = stat->nexttd; /* point at free TD */
1722 if (err)
1723 goto bad3;
1724 /* Start toggle at 1 and then use the carried toggle. */
1725 std->td.td_flags &= htole32(~OHCI_TD_TOGGLE_MASK);
1726 std->td.td_flags |= htole32(OHCI_TD_TOGGLE_1);
1727 }
1728
1729 memcpy(KERNADDR(&opipe->u.ctl.reqdma, 0), req, sizeof *req);
1730
1731 setup->td.td_flags = htole32(OHCI_TD_SETUP | OHCI_TD_NOCC |
1732 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR);
1733 setup->td.td_cbp = htole32(DMAADDR(&opipe->u.ctl.reqdma, 0));
1734 setup->nexttd = next;
1735 setup->td.td_nexttd = htole32(next->physaddr);
1736 setup->td.td_be = htole32(le32toh(setup->td.td_cbp) + sizeof *req - 1);
1737 setup->len = 0;
1738 setup->xfer = xfer;
1739 setup->flags = 0;
1740 xfer->hcpriv = setup;
1741
1742 stat->td.td_flags = htole32(
1743 (isread ? OHCI_TD_OUT : OHCI_TD_IN) |
1744 OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1));
1745 stat->td.td_cbp = 0;
1746 stat->nexttd = tail;
1747 stat->td.td_nexttd = htole32(tail->physaddr);
1748 stat->td.td_be = 0;
1749 stat->flags = OHCI_CALL_DONE;
1750 stat->len = 0;
1751 stat->xfer = xfer;
1752
1753 #ifdef OHCI_DEBUG
1754 if (ohcidebug > 5) {
1755 DPRINTF(("ohci_device_request:\n"));
1756 ohci_dump_ed(sed);
1757 ohci_dump_tds(setup);
1758 }
1759 #endif
1760
1761 /* Insert ED in schedule */
1762 s = splusb();
1763 sed->ed.ed_tailp = htole32(tail->physaddr);
1764 opipe->tail.td = tail;
1765 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
1766 if (xfer->timeout && !sc->sc_bus.use_polling) {
1767 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout),
1768 ohci_timeout, xfer);
1769 }
1770 splx(s);
1771
1772 #ifdef OHCI_DEBUG
1773 if (ohcidebug > 20) {
1774 delay(10000);
1775 DPRINTF(("ohci_device_request: status=%x\n",
1776 OREAD4(sc, OHCI_COMMAND_STATUS)));
1777 ohci_dumpregs(sc);
1778 printf("ctrl head:\n");
1779 ohci_dump_ed(sc->sc_ctrl_head);
1780 printf("sed:\n");
1781 ohci_dump_ed(sed);
1782 ohci_dump_tds(setup);
1783 }
1784 #endif
1785
1786 return (USBD_NORMAL_COMPLETION);
1787
1788 bad3:
1789 ohci_free_std(sc, tail);
1790 bad2:
1791 ohci_free_std(sc, stat);
1792 bad1:
1793 return (err);
1794 }
1795
1796 /*
1797 * Add an ED to the schedule. Called at splusb().
1798 */
1799 void
ohci_add_ed(ohci_soft_ed_t * sed,ohci_soft_ed_t * head)1800 ohci_add_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head)
1801 {
1802 DPRINTFN(8,("ohci_add_ed: sed=%p head=%p\n", sed, head));
1803
1804 SPLUSBCHECK;
1805 sed->next = head->next;
1806 sed->ed.ed_nexted = head->ed.ed_nexted;
1807 head->next = sed;
1808 head->ed.ed_nexted = htole32(sed->physaddr);
1809 }
1810
1811 /*
1812 * Remove an ED from the schedule. Called at splusb().
1813 */
1814 void
ohci_rem_ed(ohci_soft_ed_t * sed,ohci_soft_ed_t * head)1815 ohci_rem_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head)
1816 {
1817 ohci_soft_ed_t *p;
1818
1819 SPLUSBCHECK;
1820
1821 /* XXX */
1822 for (p = head; p != NULL && p->next != sed; p = p->next)
1823 ;
1824 if (p == NULL)
1825 panic("ohci_rem_ed: ED not found");
1826 p->next = sed->next;
1827 p->ed.ed_nexted = sed->ed.ed_nexted;
1828 }
1829
1830 /*
1831 * When a transfer is completed the TD is added to the done queue by
1832 * the host controller. This queue is the processed by software.
1833 * Unfortunately the queue contains the physical address of the TD
1834 * and we have no simple way to translate this back to a kernel address.
1835 * To make the translation possible (and fast) we use a hash table of
1836 * TDs currently in the schedule. The physical address is used as the
1837 * hash value.
1838 */
1839
1840 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE)
1841 /* Called at splusb() */
1842 void
ohci_hash_add_td(ohci_softc_t * sc,ohci_soft_td_t * std)1843 ohci_hash_add_td(ohci_softc_t *sc, ohci_soft_td_t *std)
1844 {
1845 int h = HASH(std->physaddr);
1846
1847 SPLUSBCHECK;
1848
1849 LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext);
1850 }
1851
1852 /* Called at splusb() */
1853 void
ohci_hash_rem_td(ohci_softc_t * sc,ohci_soft_td_t * std)1854 ohci_hash_rem_td(ohci_softc_t *sc, ohci_soft_td_t *std)
1855 {
1856 SPLUSBCHECK;
1857
1858 LIST_REMOVE(std, hnext);
1859 }
1860
1861 ohci_soft_td_t *
ohci_hash_find_td(ohci_softc_t * sc,ohci_physaddr_t a)1862 ohci_hash_find_td(ohci_softc_t *sc, ohci_physaddr_t a)
1863 {
1864 int h = HASH(a);
1865 ohci_soft_td_t *std;
1866
1867 for (std = LIST_FIRST(&sc->sc_hash_tds[h]);
1868 std != NULL;
1869 std = LIST_NEXT(std, hnext))
1870 if (std->physaddr == a)
1871 return (std);
1872 return (NULL);
1873 }
1874
1875 /* Called at splusb() */
1876 void
ohci_hash_add_itd(ohci_softc_t * sc,ohci_soft_itd_t * sitd)1877 ohci_hash_add_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
1878 {
1879 int h = HASH(sitd->physaddr);
1880
1881 SPLUSBCHECK;
1882
1883 DPRINTFN(10,("ohci_hash_add_itd: sitd=%p physaddr=0x%08lx\n",
1884 sitd, (u_long)sitd->physaddr));
1885
1886 LIST_INSERT_HEAD(&sc->sc_hash_itds[h], sitd, hnext);
1887 }
1888
1889 /* Called at splusb() */
1890 void
ohci_hash_rem_itd(ohci_softc_t * sc,ohci_soft_itd_t * sitd)1891 ohci_hash_rem_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
1892 {
1893 SPLUSBCHECK;
1894
1895 DPRINTFN(10,("ohci_hash_rem_itd: sitd=%p physaddr=0x%08lx\n",
1896 sitd, (u_long)sitd->physaddr));
1897
1898 LIST_REMOVE(sitd, hnext);
1899 }
1900
1901 ohci_soft_itd_t *
ohci_hash_find_itd(ohci_softc_t * sc,ohci_physaddr_t a)1902 ohci_hash_find_itd(ohci_softc_t *sc, ohci_physaddr_t a)
1903 {
1904 int h = HASH(a);
1905 ohci_soft_itd_t *sitd;
1906
1907 for (sitd = LIST_FIRST(&sc->sc_hash_itds[h]);
1908 sitd != NULL;
1909 sitd = LIST_NEXT(sitd, hnext))
1910 if (sitd->physaddr == a)
1911 return (sitd);
1912 return (NULL);
1913 }
1914
1915 void
ohci_timeout(void * addr)1916 ohci_timeout(void *addr)
1917 {
1918 struct ohci_xfer *oxfer = addr;
1919 struct ohci_pipe *opipe = (struct ohci_pipe *)oxfer->xfer.pipe;
1920 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
1921
1922 DPRINTF(("ohci_timeout: oxfer=%p\n", oxfer));
1923
1924 if (sc->sc_dying) {
1925 ohci_abort_xfer(&oxfer->xfer, USBD_TIMEOUT);
1926 return;
1927 }
1928
1929 /* Execute the abort in a process context. */
1930 usb_init_task(&oxfer->abort_task, ohci_timeout_task, addr);
1931 usb_add_task(oxfer->xfer.pipe->device, &oxfer->abort_task);
1932 }
1933
1934 void
ohci_timeout_task(void * addr)1935 ohci_timeout_task(void *addr)
1936 {
1937 usbd_xfer_handle xfer = addr;
1938 int s;
1939
1940 DPRINTF(("ohci_timeout_task: xfer=%p\n", xfer));
1941
1942 s = splusb();
1943 ohci_abort_xfer(xfer, USBD_TIMEOUT);
1944 splx(s);
1945 }
1946
1947 #ifdef OHCI_DEBUG
1948 void
ohci_dump_tds(ohci_soft_td_t * std)1949 ohci_dump_tds(ohci_soft_td_t *std)
1950 {
1951 for (; std; std = std->nexttd)
1952 ohci_dump_td(std);
1953 }
1954
1955 void
ohci_dump_td(ohci_soft_td_t * std)1956 ohci_dump_td(ohci_soft_td_t *std)
1957 {
1958 char sbuf[128];
1959
1960 bitmask_snprintf((u_int32_t)le32toh(std->td.td_flags),
1961 "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE",
1962 sbuf, sizeof(sbuf));
1963
1964 printf("TD(%p) at %08lx: %s delay=%d ec=%d cc=%d\ncbp=0x%08lx "
1965 "nexttd=0x%08lx be=0x%08lx\n",
1966 std, (u_long)std->physaddr, sbuf,
1967 OHCI_TD_GET_DI(le32toh(std->td.td_flags)),
1968 OHCI_TD_GET_EC(le32toh(std->td.td_flags)),
1969 OHCI_TD_GET_CC(le32toh(std->td.td_flags)),
1970 (u_long)le32toh(std->td.td_cbp),
1971 (u_long)le32toh(std->td.td_nexttd),
1972 (u_long)le32toh(std->td.td_be));
1973 }
1974
1975 void
ohci_dump_itd(ohci_soft_itd_t * sitd)1976 ohci_dump_itd(ohci_soft_itd_t *sitd)
1977 {
1978 int i;
1979
1980 printf("ITD(%p) at %08lx: sf=%d di=%d fc=%d cc=%d\n"
1981 "bp0=0x%08lx next=0x%08lx be=0x%08lx\n",
1982 sitd, (u_long)sitd->physaddr,
1983 OHCI_ITD_GET_SF(le32toh(sitd->itd.itd_flags)),
1984 OHCI_ITD_GET_DI(le32toh(sitd->itd.itd_flags)),
1985 OHCI_ITD_GET_FC(le32toh(sitd->itd.itd_flags)),
1986 OHCI_ITD_GET_CC(le32toh(sitd->itd.itd_flags)),
1987 (u_long)le32toh(sitd->itd.itd_bp0),
1988 (u_long)le32toh(sitd->itd.itd_nextitd),
1989 (u_long)le32toh(sitd->itd.itd_be));
1990 for (i = 0; i < OHCI_ITD_NOFFSET; i++)
1991 printf("offs[%d]=0x%04x ", i,
1992 (u_int)le16toh(sitd->itd.itd_offset[i]));
1993 printf("\n");
1994 }
1995
1996 void
ohci_dump_itds(ohci_soft_itd_t * sitd)1997 ohci_dump_itds(ohci_soft_itd_t *sitd)
1998 {
1999 for (; sitd; sitd = sitd->nextitd)
2000 ohci_dump_itd(sitd);
2001 }
2002
2003 void
ohci_dump_ed(ohci_soft_ed_t * sed)2004 ohci_dump_ed(ohci_soft_ed_t *sed)
2005 {
2006 char sbuf[128], sbuf2[128];
2007
2008 bitmask_snprintf((u_int32_t)le32toh(sed->ed.ed_flags),
2009 "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO",
2010 sbuf, sizeof(sbuf));
2011 bitmask_snprintf((u_int32_t)le32toh(sed->ed.ed_headp),
2012 "\20\1HALT\2CARRY", sbuf2, sizeof(sbuf2));
2013
2014 printf("ED(%p) at 0x%08lx: addr=%d endpt=%d maxp=%d flags=%s\n"
2015 "tailp=0x%08lx headflags=%s headp=0x%08lx nexted=0x%08lx\n",
2016 sed, (u_long)sed->physaddr,
2017 OHCI_ED_GET_FA(le32toh(sed->ed.ed_flags)),
2018 OHCI_ED_GET_EN(le32toh(sed->ed.ed_flags)),
2019 OHCI_ED_GET_MAXP(le32toh(sed->ed.ed_flags)), sbuf,
2020 (u_long)le32toh(sed->ed.ed_tailp), sbuf2,
2021 (u_long)le32toh(sed->ed.ed_headp),
2022 (u_long)le32toh(sed->ed.ed_nexted));
2023 }
2024 #endif
2025
2026 usbd_status
ohci_open(usbd_pipe_handle pipe)2027 ohci_open(usbd_pipe_handle pipe)
2028 {
2029 usbd_device_handle dev = pipe->device;
2030 ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
2031 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc;
2032 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2033 u_int8_t addr = dev->address;
2034 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE;
2035 ohci_soft_ed_t *sed;
2036 ohci_soft_td_t *std;
2037 ohci_soft_itd_t *sitd;
2038 ohci_physaddr_t tdphys;
2039 u_int32_t fmt;
2040 usbd_status err;
2041 int s;
2042 int ival;
2043
2044 DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n",
2045 pipe, addr, ed->bEndpointAddress, sc->sc_addr));
2046
2047 if (sc->sc_dying)
2048 return (USBD_IOERROR);
2049
2050 std = NULL;
2051 sed = NULL;
2052
2053 if (addr == sc->sc_addr) {
2054 switch (ed->bEndpointAddress) {
2055 case USB_CONTROL_ENDPOINT:
2056 pipe->methods = &ohci_root_ctrl_methods;
2057 break;
2058 case UE_DIR_IN | OHCI_INTR_ENDPT:
2059 pipe->methods = &ohci_root_intr_methods;
2060 break;
2061 default:
2062 return (USBD_INVAL);
2063 }
2064 } else {
2065 sed = ohci_alloc_sed(sc);
2066 if (sed == NULL)
2067 goto bad0;
2068 opipe->sed = sed;
2069 if (xfertype == UE_ISOCHRONOUS) {
2070 sitd = ohci_alloc_sitd(sc);
2071 if (sitd == NULL)
2072 goto bad1;
2073 opipe->tail.itd = sitd;
2074 tdphys = sitd->physaddr;
2075 fmt = OHCI_ED_FORMAT_ISO;
2076 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN)
2077 fmt |= OHCI_ED_DIR_IN;
2078 else
2079 fmt |= OHCI_ED_DIR_OUT;
2080 } else {
2081 std = ohci_alloc_std(sc);
2082 if (std == NULL)
2083 goto bad1;
2084 opipe->tail.td = std;
2085 tdphys = std->physaddr;
2086 fmt = OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD;
2087 }
2088 sed->ed.ed_flags = htole32(
2089 OHCI_ED_SET_FA(addr) |
2090 OHCI_ED_SET_EN(UE_GET_ADDR(ed->bEndpointAddress)) |
2091 (dev->speed == USB_SPEED_LOW ? OHCI_ED_SPEED : 0) |
2092 fmt | OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize)));
2093 sed->ed.ed_headp = sed->ed.ed_tailp = htole32(tdphys);
2094
2095 switch (xfertype) {
2096 case UE_CONTROL:
2097 pipe->methods = &ohci_device_ctrl_methods;
2098 err = usb_allocmem(&sc->sc_bus,
2099 sizeof(usb_device_request_t),
2100 0, &opipe->u.ctl.reqdma);
2101 if (err)
2102 goto bad;
2103 s = splusb();
2104 ohci_add_ed(sed, sc->sc_ctrl_head);
2105 splx(s);
2106 break;
2107 case UE_INTERRUPT:
2108 pipe->methods = &ohci_device_intr_methods;
2109 ival = pipe->interval;
2110 if (ival == USBD_DEFAULT_INTERVAL)
2111 ival = ed->bInterval;
2112 return (ohci_device_setintr(sc, opipe, ival));
2113 case UE_ISOCHRONOUS:
2114 pipe->methods = &ohci_device_isoc_methods;
2115 return (ohci_setup_isoc(pipe));
2116 case UE_BULK:
2117 pipe->methods = &ohci_device_bulk_methods;
2118 s = splusb();
2119 ohci_add_ed(sed, sc->sc_bulk_head);
2120 splx(s);
2121 break;
2122 }
2123 }
2124 return (USBD_NORMAL_COMPLETION);
2125
2126 bad:
2127 if (std != NULL)
2128 ohci_free_std(sc, std);
2129 bad1:
2130 if (sed != NULL)
2131 ohci_free_sed(sc, sed);
2132 bad0:
2133 return (USBD_NOMEM);
2134
2135 }
2136
2137 /*
2138 * Close a reqular pipe.
2139 * Assumes that there are no pending transactions.
2140 */
2141 void
ohci_close_pipe(usbd_pipe_handle pipe,ohci_soft_ed_t * head)2142 ohci_close_pipe(usbd_pipe_handle pipe, ohci_soft_ed_t *head)
2143 {
2144 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2145 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2146 ohci_soft_ed_t *sed = opipe->sed;
2147 int s;
2148
2149 s = splusb();
2150 #ifdef DIAGNOSTIC
2151 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP);
2152 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
2153 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) {
2154 ohci_soft_td_t *std;
2155 std = ohci_hash_find_td(sc, le32toh(sed->ed.ed_headp));
2156 printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x "
2157 "tl=0x%x pipe=%p, std=%p\n", sed,
2158 (int)le32toh(sed->ed.ed_headp),
2159 (int)le32toh(sed->ed.ed_tailp),
2160 pipe, std);
2161 #ifdef USB_DEBUG
2162 usbd_dump_pipe(&opipe->pipe);
2163 #endif
2164 #ifdef OHCI_DEBUG
2165 ohci_dump_ed(sed);
2166 if (std)
2167 ohci_dump_td(std);
2168 #endif
2169 usb_delay_ms(&sc->sc_bus, 2);
2170 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
2171 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK))
2172 printf("ohci_close_pipe: pipe still not empty\n");
2173 }
2174 #endif
2175 ohci_rem_ed(sed, head);
2176 /* Make sure the host controller is not touching this ED */
2177 usb_delay_ms(&sc->sc_bus, 1);
2178 splx(s);
2179 ohci_free_sed(sc, opipe->sed);
2180 }
2181
2182 /*
2183 * Abort a device request.
2184 * If this routine is called at splusb() it guarantees that the request
2185 * will be removed from the hardware scheduling and that the callback
2186 * for it will be called with USBD_CANCELLED status.
2187 * It's impossible to guarantee that the requested transfer will not
2188 * have happened since the hardware runs concurrently.
2189 * If the transaction has already happened we rely on the ordinary
2190 * interrupt processing to process it.
2191 */
2192 void
ohci_abort_xfer(usbd_xfer_handle xfer,usbd_status status)2193 ohci_abort_xfer(usbd_xfer_handle xfer, usbd_status status)
2194 {
2195 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
2196 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
2197 ohci_soft_ed_t *sed = opipe->sed;
2198 ohci_soft_td_t *p, *n;
2199 ohci_physaddr_t headp;
2200 int s, hit;
2201
2202 DPRINTF(("ohci_abort_xfer: xfer=%p pipe=%p sed=%p\n", xfer, opipe,
2203 sed));
2204
2205 if (sc->sc_dying) {
2206 /* If we're dying, just do the software part. */
2207 s = splusb();
2208 xfer->status = status; /* make software ignore it */
2209 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer);
2210 usb_transfer_complete(xfer);
2211 splx(s);
2212 }
2213
2214 if (xfer->device->bus->intr_context || !curproc)
2215 panic("ohci_abort_xfer: not in process context");
2216
2217 /*
2218 * Step 1: Make interrupt routine and hardware ignore xfer.
2219 */
2220 s = splusb();
2221 xfer->status = status; /* make software ignore it */
2222 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer);
2223 splx(s);
2224 DPRINTFN(1,("ohci_abort_xfer: stop ed=%p\n", sed));
2225 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */
2226
2227 /*
2228 * Step 2: Wait until we know hardware has finished any possible
2229 * use of the xfer. Also make sure the soft interrupt routine
2230 * has run.
2231 */
2232 usb_delay_ms(opipe->pipe.device->bus, 20); /* Hardware finishes in 1ms */
2233 s = splusb();
2234 #ifdef USB_USE_SOFTINTR
2235 sc->sc_softwake = 1;
2236 #endif /* USB_USE_SOFTINTR */
2237 usb_schedsoftintr(&sc->sc_bus);
2238 #ifdef USB_USE_SOFTINTR
2239 tsleep(&sc->sc_softwake, PZERO, "ohciab", 0);
2240 #endif /* USB_USE_SOFTINTR */
2241 splx(s);
2242
2243 /*
2244 * Step 3: Remove any vestiges of the xfer from the hardware.
2245 * The complication here is that the hardware may have executed
2246 * beyond the xfer we're trying to abort. So as we're scanning
2247 * the TDs of this xfer we check if the hardware points to
2248 * any of them.
2249 */
2250 s = splusb(); /* XXX why? */
2251 p = xfer->hcpriv;
2252 #ifdef DIAGNOSTIC
2253 if (p == NULL) {
2254 splx(s);
2255 printf("ohci_abort_xfer: hcpriv is NULL\n");
2256 return;
2257 }
2258 #endif
2259 #ifdef OHCI_DEBUG
2260 if (ohcidebug > 1) {
2261 DPRINTF(("ohci_abort_xfer: sed=\n"));
2262 ohci_dump_ed(sed);
2263 ohci_dump_tds(p);
2264 }
2265 #endif
2266 headp = le32toh(sed->ed.ed_headp) & OHCI_HEADMASK;
2267 hit = 0;
2268 for (; p->xfer == xfer; p = n) {
2269 hit |= headp == p->physaddr;
2270 n = p->nexttd;
2271 if (OHCI_TD_GET_CC(le32toh(p->td.td_flags)) ==
2272 OHCI_CC_NOT_ACCESSED)
2273 ohci_free_std(sc, p);
2274 }
2275 /* Zap headp register if hardware pointed inside the xfer. */
2276 if (hit) {
2277 DPRINTFN(1,("ohci_abort_xfer: set hd=0x%08x, tl=0x%08x\n",
2278 (int)p->physaddr, (int)le32toh(sed->ed.ed_tailp)));
2279 sed->ed.ed_headp = htole32(p->physaddr); /* unlink TDs */
2280 } else {
2281 DPRINTFN(1,("ohci_abort_xfer: no hit\n"));
2282 }
2283
2284 /*
2285 * Step 4: Turn on hardware again.
2286 */
2287 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */
2288
2289 /*
2290 * Step 5: Execute callback.
2291 */
2292 usb_transfer_complete(xfer);
2293
2294 splx(s);
2295 }
2296
2297 /*
2298 * Data structures and routines to emulate the root hub.
2299 */
2300 Static usb_device_descriptor_t ohci_devd = {
2301 USB_DEVICE_DESCRIPTOR_SIZE,
2302 UDESC_DEVICE, /* type */
2303 {0x00, 0x01}, /* USB version */
2304 UDCLASS_HUB, /* class */
2305 UDSUBCLASS_HUB, /* subclass */
2306 UDPROTO_FSHUB,
2307 64, /* max packet */
2308 {0},{0},{0x00,0x01}, /* device id */
2309 1,2,0, /* string indicies */
2310 1 /* # of configurations */
2311 };
2312
2313 Static usb_config_descriptor_t ohci_confd = {
2314 USB_CONFIG_DESCRIPTOR_SIZE,
2315 UDESC_CONFIG,
2316 {USB_CONFIG_DESCRIPTOR_SIZE +
2317 USB_INTERFACE_DESCRIPTOR_SIZE +
2318 USB_ENDPOINT_DESCRIPTOR_SIZE},
2319 1,
2320 1,
2321 0,
2322 UC_SELF_POWERED,
2323 0 /* max power */
2324 };
2325
2326 Static usb_interface_descriptor_t ohci_ifcd = {
2327 USB_INTERFACE_DESCRIPTOR_SIZE,
2328 UDESC_INTERFACE,
2329 0,
2330 0,
2331 1,
2332 UICLASS_HUB,
2333 UISUBCLASS_HUB,
2334 UIPROTO_FSHUB,
2335 0
2336 };
2337
2338 Static usb_endpoint_descriptor_t ohci_endpd = {
2339 USB_ENDPOINT_DESCRIPTOR_SIZE,
2340 UDESC_ENDPOINT,
2341 UE_DIR_IN | OHCI_INTR_ENDPT,
2342 UE_INTERRUPT,
2343 {8, 0}, /* max packet */
2344 255
2345 };
2346
2347 Static usb_hub_descriptor_t ohci_hubd = {
2348 USB_HUB_DESCRIPTOR_SIZE,
2349 UDESC_HUB,
2350 0,
2351 {0,0},
2352 0,
2353 0,
2354 {0},
2355 };
2356
2357 Static int
ohci_str(usb_string_descriptor_t * p,int l,const char * s)2358 ohci_str(usb_string_descriptor_t *p, int l, const char *s)
2359 {
2360 int i;
2361
2362 if (l == 0)
2363 return (0);
2364 p->bLength = 2 * strlen(s) + 2;
2365 if (l == 1)
2366 return (1);
2367 p->bDescriptorType = UDESC_STRING;
2368 l -= 2;
2369 for (i = 0; s[i] && l > 1; i++, l -= 2)
2370 USETW2(p->bString[i], 0, s[i]);
2371 return (2*i+2);
2372 }
2373
2374 /*
2375 * Simulate a hardware hub by handling all the necessary requests.
2376 */
2377 Static usbd_status
ohci_root_ctrl_transfer(usbd_xfer_handle xfer)2378 ohci_root_ctrl_transfer(usbd_xfer_handle xfer)
2379 {
2380 usbd_status err;
2381
2382 /* Insert last in queue. */
2383 err = usb_insert_transfer(xfer);
2384 if (err)
2385 return (err);
2386
2387 /* Pipe isn't running, start first */
2388 return (ohci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2389 }
2390
2391 Static usbd_status
ohci_root_ctrl_start(usbd_xfer_handle xfer)2392 ohci_root_ctrl_start(usbd_xfer_handle xfer)
2393 {
2394 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus;
2395 usb_device_request_t *req;
2396 void *buf = NULL;
2397 int port, i;
2398 int s, len, value, index, l, totlen = 0;
2399 usb_port_status_t ps;
2400 usb_hub_descriptor_t hubd;
2401 usbd_status err;
2402 u_int32_t v;
2403
2404 if (sc->sc_dying)
2405 return (USBD_IOERROR);
2406
2407 #ifdef DIAGNOSTIC
2408 if (!(xfer->rqflags & URQ_REQUEST))
2409 /* XXX panic */
2410 return (USBD_INVAL);
2411 #endif
2412 req = &xfer->request;
2413
2414 DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n",
2415 req->bmRequestType, req->bRequest));
2416
2417 len = UGETW(req->wLength);
2418 value = UGETW(req->wValue);
2419 index = UGETW(req->wIndex);
2420
2421 if (len != 0)
2422 buf = KERNADDR(&xfer->dmabuf, 0);
2423
2424 #define C(x,y) ((x) | ((y) << 8))
2425 switch(C(req->bRequest, req->bmRequestType)) {
2426 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
2427 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
2428 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
2429 /*
2430 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
2431 * for the integrated root hub.
2432 */
2433 break;
2434 case C(UR_GET_CONFIG, UT_READ_DEVICE):
2435 if (len > 0) {
2436 *(u_int8_t *)buf = sc->sc_conf;
2437 totlen = 1;
2438 }
2439 break;
2440 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
2441 DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value));
2442 switch(value >> 8) {
2443 case UDESC_DEVICE:
2444 if ((value & 0xff) != 0) {
2445 err = USBD_IOERROR;
2446 goto ret;
2447 }
2448 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
2449 USETW(ohci_devd.idVendor, sc->sc_id_vendor);
2450 memcpy(buf, &ohci_devd, l);
2451 break;
2452 case UDESC_CONFIG:
2453 if ((value & 0xff) != 0) {
2454 err = USBD_IOERROR;
2455 goto ret;
2456 }
2457 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE);
2458 memcpy(buf, &ohci_confd, l);
2459 buf = (char *)buf + l;
2460 len -= l;
2461 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE);
2462 totlen += l;
2463 memcpy(buf, &ohci_ifcd, l);
2464 buf = (char *)buf + l;
2465 len -= l;
2466 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE);
2467 totlen += l;
2468 memcpy(buf, &ohci_endpd, l);
2469 break;
2470 case UDESC_STRING:
2471 if (len == 0)
2472 break;
2473 *(u_int8_t *)buf = 0;
2474 totlen = 1;
2475 switch (value & 0xff) {
2476 case 1: /* Vendor */
2477 totlen = ohci_str(buf, len, sc->sc_vendor);
2478 break;
2479 case 2: /* Product */
2480 totlen = ohci_str(buf, len, "OHCI root hub");
2481 break;
2482 }
2483 break;
2484 default:
2485 err = USBD_IOERROR;
2486 goto ret;
2487 }
2488 break;
2489 case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
2490 if (len > 0) {
2491 *(u_int8_t *)buf = 0;
2492 totlen = 1;
2493 }
2494 break;
2495 case C(UR_GET_STATUS, UT_READ_DEVICE):
2496 if (len > 1) {
2497 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED);
2498 totlen = 2;
2499 }
2500 break;
2501 case C(UR_GET_STATUS, UT_READ_INTERFACE):
2502 case C(UR_GET_STATUS, UT_READ_ENDPOINT):
2503 if (len > 1) {
2504 USETW(((usb_status_t *)buf)->wStatus, 0);
2505 totlen = 2;
2506 }
2507 break;
2508 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
2509 if (value >= USB_MAX_DEVICES) {
2510 err = USBD_IOERROR;
2511 goto ret;
2512 }
2513 sc->sc_addr = value;
2514 break;
2515 case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
2516 if (value != 0 && value != 1) {
2517 err = USBD_IOERROR;
2518 goto ret;
2519 }
2520 sc->sc_conf = value;
2521 break;
2522 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
2523 break;
2524 case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
2525 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
2526 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
2527 err = USBD_IOERROR;
2528 goto ret;
2529 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
2530 break;
2531 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
2532 break;
2533 /* Hub requests */
2534 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
2535 break;
2536 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
2537 DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE "
2538 "port=%d feature=%d\n",
2539 index, value));
2540 if (index < 1 || index > sc->sc_noport) {
2541 err = USBD_IOERROR;
2542 goto ret;
2543 }
2544 port = OHCI_RH_PORT_STATUS(index);
2545 switch(value) {
2546 case UHF_PORT_ENABLE:
2547 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS);
2548 break;
2549 case UHF_PORT_SUSPEND:
2550 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR);
2551 break;
2552 case UHF_PORT_POWER:
2553 /* Yes, writing to the LOW_SPEED bit clears power. */
2554 OWRITE4(sc, port, UPS_LOW_SPEED);
2555 break;
2556 case UHF_C_PORT_CONNECTION:
2557 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16);
2558 break;
2559 case UHF_C_PORT_ENABLE:
2560 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16);
2561 break;
2562 case UHF_C_PORT_SUSPEND:
2563 OWRITE4(sc, port, UPS_C_SUSPEND << 16);
2564 break;
2565 case UHF_C_PORT_OVER_CURRENT:
2566 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16);
2567 break;
2568 case UHF_C_PORT_RESET:
2569 OWRITE4(sc, port, UPS_C_PORT_RESET << 16);
2570 break;
2571 default:
2572 err = USBD_IOERROR;
2573 goto ret;
2574 }
2575 switch(value) {
2576 case UHF_C_PORT_CONNECTION:
2577 case UHF_C_PORT_ENABLE:
2578 case UHF_C_PORT_SUSPEND:
2579 case UHF_C_PORT_OVER_CURRENT:
2580 case UHF_C_PORT_RESET:
2581 /* Enable RHSC interrupt if condition is cleared. */
2582 if ((OREAD4(sc, port) >> 16) == 0)
2583 ohci_rhsc_able(sc, 1);
2584 break;
2585 default:
2586 break;
2587 }
2588 break;
2589 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
2590 if ((value & 0xff) != 0) {
2591 err = USBD_IOERROR;
2592 goto ret;
2593 }
2594 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
2595 hubd = ohci_hubd;
2596 hubd.bNbrPorts = sc->sc_noport;
2597 USETW(hubd.wHubCharacteristics,
2598 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH :
2599 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL)
2600 /* XXX overcurrent */
2601 );
2602 hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v);
2603 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B);
2604 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8)
2605 hubd.DeviceRemovable[i++] = (u_int8_t)v;
2606 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i;
2607 l = min(len, hubd.bDescLength);
2608 totlen = l;
2609 memcpy(buf, &hubd, l);
2610 break;
2611 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
2612 if (len != 4) {
2613 err = USBD_IOERROR;
2614 goto ret;
2615 }
2616 memset(buf, 0, len); /* ? XXX */
2617 totlen = len;
2618 break;
2619 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
2620 DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n",
2621 index));
2622 if (index < 1 || index > sc->sc_noport) {
2623 err = USBD_IOERROR;
2624 goto ret;
2625 }
2626 if (len != 4) {
2627 err = USBD_IOERROR;
2628 goto ret;
2629 }
2630 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index));
2631 DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n",
2632 v));
2633 USETW(ps.wPortStatus, v);
2634 USETW(ps.wPortChange, v >> 16);
2635 l = min(len, sizeof ps);
2636 memcpy(buf, &ps, l);
2637 totlen = l;
2638 break;
2639 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
2640 err = USBD_IOERROR;
2641 goto ret;
2642 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
2643 break;
2644 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
2645 if (index < 1 || index > sc->sc_noport) {
2646 err = USBD_IOERROR;
2647 goto ret;
2648 }
2649 port = OHCI_RH_PORT_STATUS(index);
2650 switch(value) {
2651 case UHF_PORT_ENABLE:
2652 OWRITE4(sc, port, UPS_PORT_ENABLED);
2653 break;
2654 case UHF_PORT_SUSPEND:
2655 OWRITE4(sc, port, UPS_SUSPEND);
2656 break;
2657 case UHF_PORT_RESET:
2658 DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n",
2659 index));
2660 OWRITE4(sc, port, UPS_RESET);
2661 for (i = 0; i < 5; i++) {
2662 usb_delay_ms(&sc->sc_bus,
2663 USB_PORT_ROOT_RESET_DELAY);
2664 if (sc->sc_dying) {
2665 err = USBD_IOERROR;
2666 goto ret;
2667 }
2668 if ((OREAD4(sc, port) & UPS_RESET) == 0)
2669 break;
2670 }
2671 DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n",
2672 index, OREAD4(sc, port)));
2673 break;
2674 case UHF_PORT_POWER:
2675 DPRINTFN(2,("ohci_root_ctrl_transfer: set port power "
2676 "%d\n", index));
2677 OWRITE4(sc, port, UPS_PORT_POWER);
2678 break;
2679 default:
2680 err = USBD_IOERROR;
2681 goto ret;
2682 }
2683 break;
2684 default:
2685 err = USBD_IOERROR;
2686 goto ret;
2687 }
2688 xfer->actlen = totlen;
2689 err = USBD_NORMAL_COMPLETION;
2690 ret:
2691 xfer->status = err;
2692 s = splusb();
2693 usb_transfer_complete(xfer);
2694 splx(s);
2695 return (USBD_IN_PROGRESS);
2696 }
2697
2698 /* Abort a root control request. */
2699 Static void
ohci_root_ctrl_abort(usbd_xfer_handle xfer)2700 ohci_root_ctrl_abort(usbd_xfer_handle xfer)
2701 {
2702 /* Nothing to do, all transfers are synchronous. */
2703 }
2704
2705 /* Close the root pipe. */
2706 Static void
ohci_root_ctrl_close(usbd_pipe_handle pipe)2707 ohci_root_ctrl_close(usbd_pipe_handle pipe)
2708 {
2709 DPRINTF(("ohci_root_ctrl_close\n"));
2710 /* Nothing to do. */
2711 }
2712
2713 Static usbd_status
ohci_root_intr_transfer(usbd_xfer_handle xfer)2714 ohci_root_intr_transfer(usbd_xfer_handle xfer)
2715 {
2716 usbd_status err;
2717
2718 /* Insert last in queue. */
2719 err = usb_insert_transfer(xfer);
2720 if (err)
2721 return (err);
2722
2723 /* Pipe isn't running, start first */
2724 return (ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2725 }
2726
2727 Static usbd_status
ohci_root_intr_start(usbd_xfer_handle xfer)2728 ohci_root_intr_start(usbd_xfer_handle xfer)
2729 {
2730 usbd_pipe_handle pipe = xfer->pipe;
2731 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2732
2733 if (sc->sc_dying)
2734 return (USBD_IOERROR);
2735
2736 sc->sc_intrxfer = xfer;
2737
2738 return (USBD_IN_PROGRESS);
2739 }
2740
2741 /* Abort a root interrupt request. */
2742 Static void
ohci_root_intr_abort(usbd_xfer_handle xfer)2743 ohci_root_intr_abort(usbd_xfer_handle xfer)
2744 {
2745 int s;
2746
2747 if (xfer->pipe->intrxfer == xfer) {
2748 DPRINTF(("ohci_root_intr_abort: remove\n"));
2749 xfer->pipe->intrxfer = NULL;
2750 }
2751 xfer->status = USBD_CANCELLED;
2752 s = splusb();
2753 usb_transfer_complete(xfer);
2754 splx(s);
2755 }
2756
2757 /* Close the root pipe. */
2758 Static void
ohci_root_intr_close(usbd_pipe_handle pipe)2759 ohci_root_intr_close(usbd_pipe_handle pipe)
2760 {
2761 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2762
2763 DPRINTF(("ohci_root_intr_close\n"));
2764
2765 sc->sc_intrxfer = NULL;
2766 }
2767
2768 /************************/
2769
2770 Static usbd_status
ohci_device_ctrl_transfer(usbd_xfer_handle xfer)2771 ohci_device_ctrl_transfer(usbd_xfer_handle xfer)
2772 {
2773 usbd_status err;
2774
2775 /* Insert last in queue. */
2776 err = usb_insert_transfer(xfer);
2777 if (err)
2778 return (err);
2779
2780 /* Pipe isn't running, start first */
2781 return (ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2782 }
2783
2784 Static usbd_status
ohci_device_ctrl_start(usbd_xfer_handle xfer)2785 ohci_device_ctrl_start(usbd_xfer_handle xfer)
2786 {
2787 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus;
2788 usbd_status err;
2789
2790 if (sc->sc_dying)
2791 return (USBD_IOERROR);
2792
2793 #ifdef DIAGNOSTIC
2794 if (!(xfer->rqflags & URQ_REQUEST)) {
2795 /* XXX panic */
2796 printf("ohci_device_ctrl_transfer: not a request\n");
2797 return (USBD_INVAL);
2798 }
2799 #endif
2800
2801 err = ohci_device_request(xfer);
2802 if (err)
2803 return (err);
2804
2805 if (sc->sc_bus.use_polling)
2806 ohci_waitintr(sc, xfer);
2807
2808 return (USBD_IN_PROGRESS);
2809 }
2810
2811 /* Abort a device control request. */
2812 Static void
ohci_device_ctrl_abort(usbd_xfer_handle xfer)2813 ohci_device_ctrl_abort(usbd_xfer_handle xfer)
2814 {
2815 DPRINTF(("ohci_device_ctrl_abort: xfer=%p\n", xfer));
2816 ohci_abort_xfer(xfer, USBD_CANCELLED);
2817 }
2818
2819 /* Close a device control pipe. */
2820 Static void
ohci_device_ctrl_close(usbd_pipe_handle pipe)2821 ohci_device_ctrl_close(usbd_pipe_handle pipe)
2822 {
2823 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2824 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2825
2826 DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe));
2827 ohci_close_pipe(pipe, sc->sc_ctrl_head);
2828 ohci_free_std(sc, opipe->tail.td);
2829 }
2830
2831 /************************/
2832
2833 Static void
ohci_device_clear_toggle(usbd_pipe_handle pipe)2834 ohci_device_clear_toggle(usbd_pipe_handle pipe)
2835 {
2836 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2837
2838 opipe->sed->ed.ed_headp &= htole32(~OHCI_TOGGLECARRY);
2839 }
2840
2841 Static void
ohci_noop(usbd_pipe_handle pipe)2842 ohci_noop(usbd_pipe_handle pipe)
2843 {
2844 }
2845
2846 Static usbd_status
ohci_device_bulk_transfer(usbd_xfer_handle xfer)2847 ohci_device_bulk_transfer(usbd_xfer_handle xfer)
2848 {
2849 usbd_status err;
2850
2851 /* Insert last in queue. */
2852 err = usb_insert_transfer(xfer);
2853 if (err)
2854 return (err);
2855
2856 /* Pipe isn't running, start first */
2857 return (ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2858 }
2859
2860 Static usbd_status
ohci_device_bulk_start(usbd_xfer_handle xfer)2861 ohci_device_bulk_start(usbd_xfer_handle xfer)
2862 {
2863 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
2864 usbd_device_handle dev = opipe->pipe.device;
2865 ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
2866 int addr = dev->address;
2867 ohci_soft_td_t *data, *tail, *tdp;
2868 ohci_soft_ed_t *sed;
2869 int s, len, isread, endpt;
2870 usbd_status err;
2871
2872 if (sc->sc_dying)
2873 return (USBD_IOERROR);
2874
2875 #ifdef DIAGNOSTIC
2876 if (xfer->rqflags & URQ_REQUEST) {
2877 /* XXX panic */
2878 printf("ohci_device_bulk_start: a request\n");
2879 return (USBD_INVAL);
2880 }
2881 #endif
2882
2883 len = xfer->length;
2884 endpt = xfer->pipe->endpoint->edesc->bEndpointAddress;
2885 isread = UE_GET_DIR(endpt) == UE_DIR_IN;
2886 sed = opipe->sed;
2887
2888 DPRINTFN(4,("ohci_device_bulk_start: xfer=%p len=%d isread=%d "
2889 "flags=%d endpt=%d\n", xfer, len, isread, xfer->flags,
2890 endpt));
2891
2892 opipe->u.bulk.isread = isread;
2893 opipe->u.bulk.length = len;
2894
2895 /* Update device address */
2896 sed->ed.ed_flags = htole32(
2897 (le32toh(sed->ed.ed_flags) & ~OHCI_ED_ADDRMASK) |
2898 OHCI_ED_SET_FA(addr));
2899
2900 /* Allocate a chain of new TDs (including a new tail). */
2901 data = opipe->tail.td;
2902 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer,
2903 data, &tail);
2904 /* We want interrupt at the end of the transfer. */
2905 tail->td.td_flags &= htole32(~OHCI_TD_INTR_MASK);
2906 tail->td.td_flags |= htole32(OHCI_TD_SET_DI(1));
2907 tail->flags |= OHCI_CALL_DONE;
2908 tail = tail->nexttd; /* point at sentinel */
2909 if (err)
2910 return (err);
2911
2912 tail->xfer = NULL;
2913 xfer->hcpriv = data;
2914
2915 DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x "
2916 "td_cbp=0x%08x td_be=0x%08x\n",
2917 (int)le32toh(sed->ed.ed_flags),
2918 (int)le32toh(data->td.td_flags),
2919 (int)le32toh(data->td.td_cbp),
2920 (int)le32toh(data->td.td_be)));
2921
2922 #ifdef OHCI_DEBUG
2923 if (ohcidebug > 5) {
2924 ohci_dump_ed(sed);
2925 ohci_dump_tds(data);
2926 }
2927 #endif
2928
2929 /* Insert ED in schedule */
2930 s = splusb();
2931 for (tdp = data; tdp != tail; tdp = tdp->nexttd) {
2932 tdp->xfer = xfer;
2933 }
2934 sed->ed.ed_tailp = htole32(tail->physaddr);
2935 opipe->tail.td = tail;
2936 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP);
2937 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF);
2938 if (xfer->timeout && !sc->sc_bus.use_polling) {
2939 usb_callout(xfer->timeout_handle, mstohz(xfer->timeout),
2940 ohci_timeout, xfer);
2941 }
2942
2943 #if 0
2944 /* This goes wrong if we are too slow. */
2945 if (ohcidebug > 10) {
2946 delay(10000);
2947 DPRINTF(("ohci_device_intr_transfer: status=%x\n",
2948 OREAD4(sc, OHCI_COMMAND_STATUS)));
2949 ohci_dump_ed(sed);
2950 ohci_dump_tds(data);
2951 }
2952 #endif
2953
2954 splx(s);
2955
2956 if (sc->sc_bus.use_polling)
2957 ohci_waitintr(sc, xfer);
2958
2959 return (USBD_IN_PROGRESS);
2960 }
2961
2962 Static void
ohci_device_bulk_abort(usbd_xfer_handle xfer)2963 ohci_device_bulk_abort(usbd_xfer_handle xfer)
2964 {
2965 DPRINTF(("ohci_device_bulk_abort: xfer=%p\n", xfer));
2966 ohci_abort_xfer(xfer, USBD_CANCELLED);
2967 }
2968
2969 /*
2970 * Close a device bulk pipe.
2971 */
2972 Static void
ohci_device_bulk_close(usbd_pipe_handle pipe)2973 ohci_device_bulk_close(usbd_pipe_handle pipe)
2974 {
2975 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2976 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2977
2978 DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe));
2979 ohci_close_pipe(pipe, sc->sc_bulk_head);
2980 ohci_free_std(sc, opipe->tail.td);
2981 }
2982
2983 /************************/
2984
2985 Static usbd_status
ohci_device_intr_transfer(usbd_xfer_handle xfer)2986 ohci_device_intr_transfer(usbd_xfer_handle xfer)
2987 {
2988 usbd_status err;
2989
2990 /* Insert last in queue. */
2991 err = usb_insert_transfer(xfer);
2992 if (err)
2993 return (err);
2994
2995 /* Pipe isn't running, start first */
2996 return (ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2997 }
2998
2999 Static usbd_status
ohci_device_intr_start(usbd_xfer_handle xfer)3000 ohci_device_intr_start(usbd_xfer_handle xfer)
3001 {
3002 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
3003 usbd_device_handle dev = opipe->pipe.device;
3004 ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
3005 ohci_soft_ed_t *sed = opipe->sed;
3006 ohci_soft_td_t *data, *tail;
3007 int len;
3008 int s;
3009
3010 if (sc->sc_dying)
3011 return (USBD_IOERROR);
3012
3013 DPRINTFN(3, ("ohci_device_intr_transfer: xfer=%p len=%d "
3014 "flags=%d priv=%p\n",
3015 xfer, xfer->length, xfer->flags, xfer->priv));
3016
3017 #ifdef DIAGNOSTIC
3018 if (xfer->rqflags & URQ_REQUEST)
3019 panic("ohci_device_intr_transfer: a request");
3020 #endif
3021
3022 len = xfer->length;
3023
3024 data = opipe->tail.td;
3025 tail = ohci_alloc_std(sc);
3026 if (tail == NULL)
3027 return (USBD_NOMEM);
3028 tail->xfer = NULL;
3029
3030 data->td.td_flags = htole32(
3031 OHCI_TD_IN | OHCI_TD_NOCC |
3032 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY);
3033 if (xfer->flags & USBD_SHORT_XFER_OK)
3034 data->td.td_flags |= htole32(OHCI_TD_R);
3035 data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf, 0));
3036 data->nexttd = tail;
3037 data->td.td_nexttd = htole32(tail->physaddr);
3038 data->td.td_be = htole32(le32toh(data->td.td_cbp) + len - 1);
3039 data->len = len;
3040 data->xfer = xfer;
3041 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN;
3042 xfer->hcpriv = data;
3043
3044 #ifdef OHCI_DEBUG
3045 if (ohcidebug > 5) {
3046 DPRINTF(("ohci_device_intr_transfer:\n"));
3047 ohci_dump_ed(sed);
3048 ohci_dump_tds(data);
3049 }
3050 #endif
3051
3052 /* Insert ED in schedule */
3053 s = splusb();
3054 sed->ed.ed_tailp = htole32(tail->physaddr);
3055 opipe->tail.td = tail;
3056 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP);
3057
3058 #if 0
3059 /*
3060 * This goes horribly wrong, printing thousands of descriptors,
3061 * because false references are followed due to the fact that the
3062 * TD is gone.
3063 */
3064 if (ohcidebug > 5) {
3065 usb_delay_ms(&sc->sc_bus, 5);
3066 DPRINTF(("ohci_device_intr_transfer: status=%x\n",
3067 OREAD4(sc, OHCI_COMMAND_STATUS)));
3068 ohci_dump_ed(sed);
3069 ohci_dump_tds(data);
3070 }
3071 #endif
3072 splx(s);
3073
3074 return (USBD_IN_PROGRESS);
3075 }
3076
3077 /* Abort a device control request. */
3078 Static void
ohci_device_intr_abort(usbd_xfer_handle xfer)3079 ohci_device_intr_abort(usbd_xfer_handle xfer)
3080 {
3081 if (xfer->pipe->intrxfer == xfer) {
3082 DPRINTF(("ohci_device_intr_abort: remove\n"));
3083 xfer->pipe->intrxfer = NULL;
3084 }
3085 ohci_abort_xfer(xfer, USBD_CANCELLED);
3086 }
3087
3088 /* Close a device interrupt pipe. */
3089 Static void
ohci_device_intr_close(usbd_pipe_handle pipe)3090 ohci_device_intr_close(usbd_pipe_handle pipe)
3091 {
3092 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
3093 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
3094 int nslots = opipe->u.intr.nslots;
3095 int pos = opipe->u.intr.pos;
3096 int j;
3097 ohci_soft_ed_t *p, *sed = opipe->sed;
3098 int s;
3099
3100 DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n",
3101 pipe, nslots, pos));
3102 s = splusb();
3103 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP);
3104 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
3105 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK))
3106 usb_delay_ms(&sc->sc_bus, 2);
3107
3108 for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next)
3109 ;
3110 #ifdef DIAGNOSTIC
3111 if (p == NULL)
3112 panic("ohci_device_intr_close: ED not found");
3113 #endif
3114 p->next = sed->next;
3115 p->ed.ed_nexted = sed->ed.ed_nexted;
3116 splx(s);
3117
3118 for (j = 0; j < nslots; j++)
3119 --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS];
3120
3121 ohci_free_std(sc, opipe->tail.td);
3122 ohci_free_sed(sc, opipe->sed);
3123 }
3124
3125 Static usbd_status
ohci_device_setintr(ohci_softc_t * sc,struct ohci_pipe * opipe,int ival)3126 ohci_device_setintr(ohci_softc_t *sc, struct ohci_pipe *opipe, int ival)
3127 {
3128 int i, j, s, best;
3129 u_int npoll, slow, shigh, nslots;
3130 u_int bestbw, bw;
3131 ohci_soft_ed_t *hsed, *sed = opipe->sed;
3132
3133 DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe));
3134 if (ival == 0) {
3135 printf("ohci_setintr: 0 interval\n");
3136 return (USBD_INVAL);
3137 }
3138
3139 npoll = OHCI_NO_INTRS;
3140 while (npoll > ival)
3141 npoll /= 2;
3142 DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll));
3143
3144 /*
3145 * We now know which level in the tree the ED must go into.
3146 * Figure out which slot has most bandwidth left over.
3147 * Slots to examine:
3148 * npoll
3149 * 1 0
3150 * 2 1 2
3151 * 4 3 4 5 6
3152 * 8 7 8 9 10 11 12 13 14
3153 * N (N-1) .. (N-1+N-1)
3154 */
3155 slow = npoll-1;
3156 shigh = slow + npoll;
3157 nslots = OHCI_NO_INTRS / npoll;
3158 for (best = i = slow, bestbw = ~0; i < shigh; i++) {
3159 bw = 0;
3160 for (j = 0; j < nslots; j++)
3161 bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS];
3162 if (bw < bestbw) {
3163 best = i;
3164 bestbw = bw;
3165 }
3166 }
3167 DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n",
3168 best, slow, shigh, bestbw));
3169
3170 s = splusb();
3171 hsed = sc->sc_eds[best];
3172 sed->next = hsed->next;
3173 sed->ed.ed_nexted = hsed->ed.ed_nexted;
3174 hsed->next = sed;
3175 hsed->ed.ed_nexted = htole32(sed->physaddr);
3176 splx(s);
3177
3178 for (j = 0; j < nslots; j++)
3179 ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS];
3180 opipe->u.intr.nslots = nslots;
3181 opipe->u.intr.pos = best;
3182
3183 DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe));
3184 return (USBD_NORMAL_COMPLETION);
3185 }
3186
3187 /***********************/
3188
3189 usbd_status
ohci_device_isoc_transfer(usbd_xfer_handle xfer)3190 ohci_device_isoc_transfer(usbd_xfer_handle xfer)
3191 {
3192 usbd_status err;
3193
3194 DPRINTFN(5,("ohci_device_isoc_transfer: xfer=%p\n", xfer));
3195
3196 /* Put it on our queue, */
3197 err = usb_insert_transfer(xfer);
3198
3199 /* bail out on error, */
3200 if (err && err != USBD_IN_PROGRESS)
3201 return (err);
3202
3203 /* XXX should check inuse here */
3204
3205 /* insert into schedule, */
3206 ohci_device_isoc_enter(xfer);
3207
3208 /* and start if the pipe wasn't running */
3209 if (!err)
3210 ohci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue));
3211
3212 return (err);
3213 }
3214
3215 void
ohci_device_isoc_enter(usbd_xfer_handle xfer)3216 ohci_device_isoc_enter(usbd_xfer_handle xfer)
3217 {
3218 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
3219 usbd_device_handle dev = opipe->pipe.device;
3220 ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
3221 ohci_soft_ed_t *sed = opipe->sed;
3222 struct iso *iso = &opipe->u.iso;
3223 ohci_soft_itd_t *sitd, *nsitd;
3224 ohci_physaddr_t buf, offs, noffs, bp0;
3225 int i, ncur, nframes;
3226 int s;
3227
3228 DPRINTFN(1,("ohci_device_isoc_enter: used=%d next=%d xfer=%p "
3229 "nframes=%d\n",
3230 iso->inuse, iso->next, xfer, xfer->nframes));
3231
3232 if (sc->sc_dying)
3233 return;
3234
3235 if (iso->next == -1) {
3236 /* Not in use yet, schedule it a few frames ahead. */
3237 iso->next = le32toh(sc->sc_hcca->hcca_frame_number) + 5;
3238 DPRINTFN(2,("ohci_device_isoc_enter: start next=%d\n",
3239 iso->next));
3240 }
3241
3242 sitd = opipe->tail.itd;
3243 buf = DMAADDR(&xfer->dmabuf, 0);
3244 bp0 = OHCI_PAGE(buf);
3245 offs = OHCI_PAGE_OFFSET(buf);
3246 nframes = xfer->nframes;
3247 xfer->hcpriv = sitd;
3248 for (i = ncur = 0; i < nframes; i++, ncur++) {
3249 noffs = offs + xfer->frlengths[i];
3250 if (ncur == OHCI_ITD_NOFFSET || /* all offsets used */
3251 OHCI_PAGE(buf + noffs) > bp0 + OHCI_PAGE_SIZE) { /* too many page crossings */
3252
3253 /* Allocate next ITD */
3254 nsitd = ohci_alloc_sitd(sc);
3255 if (nsitd == NULL) {
3256 /* XXX what now? */
3257 printf("%s: isoc TD alloc failed\n",
3258 USBDEVNAME(sc->sc_bus.bdev));
3259 return;
3260 }
3261
3262 /* Fill current ITD */
3263 sitd->itd.itd_flags = htole32(
3264 OHCI_ITD_NOCC |
3265 OHCI_ITD_SET_SF(iso->next) |
3266 OHCI_ITD_SET_DI(6) | /* delay intr a little */
3267 OHCI_ITD_SET_FC(ncur));
3268 sitd->itd.itd_bp0 = htole32(bp0);
3269 sitd->nextitd = nsitd;
3270 sitd->itd.itd_nextitd = htole32(nsitd->physaddr);
3271 sitd->itd.itd_be = htole32(bp0 + offs - 1);
3272 sitd->xfer = xfer;
3273 sitd->flags = 0;
3274
3275 sitd = nsitd;
3276 iso->next = iso->next + ncur;
3277 bp0 = OHCI_PAGE(buf + offs);
3278 ncur = 0;
3279 }
3280 sitd->itd.itd_offset[ncur] = htole16(OHCI_ITD_MK_OFFS(offs));
3281 offs = noffs;
3282 }
3283 nsitd = ohci_alloc_sitd(sc);
3284 if (nsitd == NULL) {
3285 /* XXX what now? */
3286 printf("%s: isoc TD alloc failed\n",
3287 USBDEVNAME(sc->sc_bus.bdev));
3288 return;
3289 }
3290 /* Fixup last used ITD */
3291 sitd->itd.itd_flags = htole32(
3292 OHCI_ITD_NOCC |
3293 OHCI_ITD_SET_SF(iso->next) |
3294 OHCI_ITD_SET_DI(0) |
3295 OHCI_ITD_SET_FC(ncur));
3296 sitd->itd.itd_bp0 = htole32(bp0);
3297 sitd->nextitd = nsitd;
3298 sitd->itd.itd_nextitd = htole32(nsitd->physaddr);
3299 sitd->itd.itd_be = htole32(bp0 + offs - 1);
3300 sitd->xfer = xfer;
3301 sitd->flags = OHCI_CALL_DONE;
3302
3303 iso->next = iso->next + ncur;
3304 iso->inuse += nframes;
3305
3306 xfer->actlen = offs; /* XXX pretend we did it all */
3307
3308 xfer->status = USBD_IN_PROGRESS;
3309
3310 #ifdef OHCI_DEBUG
3311 if (ohcidebug > 5) {
3312 DPRINTF(("ohci_device_isoc_enter: frame=%d\n",
3313 le32toh(sc->sc_hcca->hcca_frame_number)));
3314 ohci_dump_itds(xfer->hcpriv);
3315 ohci_dump_ed(sed);
3316 }
3317 #endif
3318
3319 s = splusb();
3320 sed->ed.ed_tailp = htole32(nsitd->physaddr);
3321 opipe->tail.itd = nsitd;
3322 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP);
3323 splx(s);
3324
3325 #ifdef OHCI_DEBUG
3326 if (ohcidebug > 5) {
3327 delay(150000);
3328 DPRINTF(("ohci_device_isoc_enter: after frame=%d\n",
3329 le32toh(sc->sc_hcca->hcca_frame_number)));
3330 ohci_dump_itds(xfer->hcpriv);
3331 ohci_dump_ed(sed);
3332 }
3333 #endif
3334 }
3335
3336 usbd_status
ohci_device_isoc_start(usbd_xfer_handle xfer)3337 ohci_device_isoc_start(usbd_xfer_handle xfer)
3338 {
3339 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
3340 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
3341
3342 DPRINTFN(5,("ohci_device_isoc_start: xfer=%p\n", xfer));
3343
3344 if (sc->sc_dying)
3345 return (USBD_IOERROR);
3346
3347 #ifdef DIAGNOSTIC
3348 if (xfer->status != USBD_IN_PROGRESS)
3349 printf("ohci_device_isoc_start: not in progress %p\n", xfer);
3350 #endif
3351
3352 /* XXX anything to do? */
3353
3354 return (USBD_IN_PROGRESS);
3355 }
3356
3357 void
ohci_device_isoc_abort(usbd_xfer_handle xfer)3358 ohci_device_isoc_abort(usbd_xfer_handle xfer)
3359 {
3360 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
3361 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
3362 ohci_soft_ed_t *sed;
3363 ohci_soft_itd_t *sitd;
3364 int s;
3365
3366 s = splusb();
3367
3368 DPRINTFN(1,("ohci_device_isoc_abort: xfer=%p\n", xfer));
3369
3370 /* Transfer is already done. */
3371 if (xfer->status != USBD_NOT_STARTED &&
3372 xfer->status != USBD_IN_PROGRESS) {
3373 splx(s);
3374 printf("ohci_device_isoc_abort: early return\n");
3375 return;
3376 }
3377
3378 /* Give xfer the requested abort code. */
3379 xfer->status = USBD_CANCELLED;
3380
3381 sed = opipe->sed;
3382 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */
3383
3384 sitd = xfer->hcpriv;
3385 #ifdef DIAGNOSTIC
3386 if (sitd == NULL) {
3387 splx(s);
3388 printf("ohci_device_isoc_abort: hcpriv==0\n");
3389 return;
3390 }
3391 #endif
3392 for (; sitd->xfer == xfer; sitd = sitd->nextitd) {
3393 #ifdef DIAGNOSTIC
3394 DPRINTFN(1,("abort sets done sitd=%p\n", sitd));
3395 sitd->isdone = 1;
3396 #endif
3397 }
3398
3399 splx(s);
3400
3401 usb_delay_ms(&sc->sc_bus, OHCI_ITD_NOFFSET);
3402
3403 s = splusb();
3404
3405 /* Run callback. */
3406 usb_transfer_complete(xfer);
3407
3408 sed->ed.ed_headp = htole32(sitd->physaddr); /* unlink TDs */
3409 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */
3410
3411 splx(s);
3412 }
3413
3414 void
ohci_device_isoc_done(usbd_xfer_handle xfer)3415 ohci_device_isoc_done(usbd_xfer_handle xfer)
3416 {
3417 DPRINTFN(1,("ohci_device_isoc_done: xfer=%p\n", xfer));
3418 }
3419
3420 usbd_status
ohci_setup_isoc(usbd_pipe_handle pipe)3421 ohci_setup_isoc(usbd_pipe_handle pipe)
3422 {
3423 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
3424 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
3425 struct iso *iso = &opipe->u.iso;
3426 int s;
3427
3428 iso->next = -1;
3429 iso->inuse = 0;
3430
3431 s = splusb();
3432 ohci_add_ed(opipe->sed, sc->sc_isoc_head);
3433 splx(s);
3434
3435 return (USBD_NORMAL_COMPLETION);
3436 }
3437
3438 void
ohci_device_isoc_close(usbd_pipe_handle pipe)3439 ohci_device_isoc_close(usbd_pipe_handle pipe)
3440 {
3441 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
3442 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
3443
3444 DPRINTF(("ohci_device_isoc_close: pipe=%p\n", pipe));
3445 ohci_close_pipe(pipe, sc->sc_isoc_head);
3446 #ifdef DIAGNOSTIC
3447 opipe->tail.itd->isdone = 1;
3448 #endif
3449 ohci_free_sitd(sc, opipe->tail.itd);
3450 }
3451