1 /* $OpenBSD: if_le.c,v 1.9 2003/07/07 15:37:07 jason Exp $ */
2 /* $NetBSD: if_le.c,v 1.17 2001/05/30 11:46:35 mrg Exp $ */
3
4 /*-
5 * Copyright (c) 1997, 1998 The NetBSD Foundation, Inc.
6 * All rights reserved.
7 *
8 * This code is derived from software contributed to The NetBSD Foundation
9 * by Charles M. Hannum; Jason R. Thorpe of the Numerical Aerospace
10 * Simulation Facility, NASA Ames Research Center; Paul Kranenburg.
11 *
12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions
14 * are met:
15 * 1. Redistributions of source code must retain the above copyright
16 * notice, this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright
18 * notice, this list of conditions and the following disclaimer in the
19 * documentation and/or other materials provided with the distribution.
20 * 3. All advertising materials mentioning features or use of this software
21 * must display the following acknowledgement:
22 * This product includes software developed by the NetBSD
23 * Foundation, Inc. and its contributors.
24 * 4. Neither the name of The NetBSD Foundation nor the names of its
25 * contributors may be used to endorse or promote products derived
26 * from this software without specific prior written permission.
27 *
28 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
29 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
30 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
31 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
32 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
33 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
34 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
35 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
36 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
37 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 * POSSIBILITY OF SUCH DAMAGE.
39 */
40
41 #include "bpfilter.h"
42
43 #include <sys/param.h>
44 #include <sys/systm.h>
45 #include <sys/mbuf.h>
46 #include <sys/syslog.h>
47 #include <sys/socket.h>
48 #include <sys/device.h>
49 #include <sys/malloc.h>
50
51 #include <net/if.h>
52 #include <net/if_media.h>
53
54 #ifdef INET
55 #include <netinet/in.h>
56 #include <netinet/if_ether.h>
57 #endif
58
59 #include <machine/bus.h>
60 #include <machine/intr.h>
61 #include <machine/autoconf.h>
62
63 #include <dev/sbus/sbusvar.h>
64 #include <dev/sbus/lebuffervar.h> /*XXX*/
65
66 #include <dev/ic/am7990reg.h>
67 #include <dev/ic/am7990var.h>
68
69 /*
70 * LANCE registers.
71 */
72 #define LEREG1_RDP 0 /* Register Data port */
73 #define LEREG1_RAP 2 /* Register Address port */
74
75 struct le_softc {
76 struct am7990_softc sc_am7990; /* glue to MI code */
77 struct sbusdev sc_sd; /* sbus device */
78 bus_space_tag_t sc_bustag;
79 bus_dma_tag_t sc_dmatag;
80 bus_dmamap_t sc_dmamap;
81 bus_space_handle_t sc_reg;
82 };
83
84 #define MEMSIZE 0x4000 /* LANCE memory size */
85
86 int lematch_sbus(struct device *, void *, void *);
87 void leattach_sbus(struct device *, struct device *, void *);
88
89 /*
90 * Media types supported.
91 */
92 struct cfattach le_sbus_ca = {
93 sizeof(struct le_softc), lematch_sbus, leattach_sbus
94 };
95
96 void le_sbus_wrcsr(struct am7990_softc *, u_int16_t, u_int16_t);
97 u_int16_t le_sbus_rdcsr(struct am7990_softc *, u_int16_t);
98
99 void
le_sbus_wrcsr(struct am7990_softc * sc,u_int16_t port,u_int16_t val)100 le_sbus_wrcsr(struct am7990_softc *sc, u_int16_t port, u_int16_t val)
101 {
102 struct le_softc *lesc = (struct le_softc *)sc;
103
104 bus_space_write_2(lesc->sc_bustag, lesc->sc_reg, LEREG1_RAP, port);
105 bus_space_barrier(lesc->sc_bustag, lesc->sc_reg, LEREG1_RAP, 2,
106 BUS_SPACE_BARRIER_WRITE);
107 bus_space_write_2(lesc->sc_bustag, lesc->sc_reg, LEREG1_RDP, val);
108 bus_space_barrier(lesc->sc_bustag, lesc->sc_reg, LEREG1_RDP, 2,
109 BUS_SPACE_BARRIER_WRITE);
110
111 #if defined(SUN4M)
112 /*
113 * We need to flush the Sbus->Mbus write buffers. This can most
114 * easily be accomplished by reading back the register that we
115 * just wrote (thanks to Chris Torek for this solution).
116 */
117 if (CPU_ISSUN4M) {
118 volatile u_int16_t discard;
119 discard = bus_space_read_2(lesc->sc_bustag, lesc->sc_reg,
120 LEREG1_RDP);
121 }
122 #endif
123 }
124
125 u_int16_t
le_sbus_rdcsr(struct am7990_softc * sc,u_int16_t port)126 le_sbus_rdcsr(struct am7990_softc *sc, u_int16_t port)
127 {
128 struct le_softc *lesc = (struct le_softc *)sc;
129
130 bus_space_write_2(lesc->sc_bustag, lesc->sc_reg, LEREG1_RAP, port);
131 bus_space_barrier(lesc->sc_bustag, lesc->sc_reg, LEREG1_RAP, 2,
132 BUS_SPACE_BARRIER_WRITE);
133 return (bus_space_read_2(lesc->sc_bustag, lesc->sc_reg, LEREG1_RDP));
134 }
135
136
137 int
lematch_sbus(struct device * parent,void * vcf,void * aux)138 lematch_sbus(struct device *parent, void *vcf, void *aux)
139 {
140 struct cfdata *cf = vcf;
141 struct sbus_attach_args *sa = aux;
142
143 return (strcmp(cf->cf_driver->cd_name, sa->sa_name) == 0);
144 }
145
146 void
leattach_sbus(struct device * parent,struct device * self,void * aux)147 leattach_sbus(struct device *parent, struct device *self, void *aux)
148 {
149 struct sbus_attach_args *sa = aux;
150 struct le_softc *lesc = (struct le_softc *)self;
151 struct am7990_softc *sc = &lesc->sc_am7990;
152 bus_dma_tag_t dmatag;
153 struct sbusdev *sd;
154 /* XXX the following declarations should be elsewhere */
155 extern void myetheraddr(u_char *);
156
157
158 lesc->sc_bustag = sa->sa_bustag;
159 lesc->sc_dmatag = dmatag = sa->sa_dmatag;
160
161 if (sbus_bus_map(sa->sa_bustag, sa->sa_reg[0].sbr_slot,
162 sa->sa_reg[0].sbr_offset, sa->sa_reg[0].sbr_size,
163 BUS_SPACE_MAP_LINEAR, 0, &lesc->sc_reg) != 0) {
164 printf(": cannot map registers\n");
165 return;
166 }
167
168 /*
169 * Look for an "unallocated" lebuffer and pair it with
170 * this `le' device on the assumption that we're on
171 * a pre-historic ROM that doesn't establish le<=>lebuffer
172 * parent-child relationships.
173 */
174 for (sd = ((struct sbus_softc *)parent)->sc_sbdev; sd != NULL;
175 sd = sd->sd_bchain) {
176 struct lebuf_softc *lebuf = (struct lebuf_softc *)sd->sd_dev;
177
178 if (strncmp("lebuffer", sd->sd_dev->dv_xname, 8) != 0)
179 continue;
180
181 if (lebuf->attached != 0)
182 continue;
183
184 sc->sc_mem = lebuf->sc_buffer;
185 sc->sc_memsize = lebuf->sc_bufsiz;
186 sc->sc_addr = 0; /* Lance view is offset by buffer location */
187 lebuf->attached = 1;
188
189 /* That old black magic... */
190 sc->sc_conf3 = getpropint(sa->sa_node,
191 "busmaster-regval", LE_C3_BSWP | LE_C3_ACON | LE_C3_BCON);
192 break;
193 }
194
195 lesc->sc_sd.sd_reset = (void *)am7990_reset;
196 sbus_establish(&lesc->sc_sd, &sc->sc_dev);
197
198 if (sc->sc_mem == 0) {
199 bus_dma_segment_t seg;
200 int rseg, error;
201
202 /* Get a DMA handle */
203 if ((error = bus_dmamap_create(dmatag, MEMSIZE, 1, MEMSIZE, 0,
204 BUS_DMA_NOWAIT|BUS_DMA_24BIT, &lesc->sc_dmamap)) != 0) {
205 printf(": DMA map create error %d\n", error);
206 return;
207 }
208
209 /* Allocate DMA buffer */
210 if ((error = bus_dmamem_alloc(dmatag, MEMSIZE, 0, 0,
211 &seg, 1, &rseg, BUS_DMA_NOWAIT|BUS_DMA_24BIT)) != 0){
212 printf(": DMA buffer allocation error %d\n", error);
213 return;
214 }
215
216 /* Map DMA buffer into kernel space */
217 if ((error = bus_dmamem_map(dmatag, &seg, rseg, MEMSIZE,
218 (caddr_t *)&sc->sc_mem,
219 BUS_DMA_NOWAIT|BUS_DMA_COHERENT|BUS_DMA_24BIT)) != 0) {
220 printf(": DMA buffer map error %d\n", error);
221 bus_dmamem_free(lesc->sc_dmatag, &seg, rseg);
222 return;
223 }
224
225 /* Load DMA buffer */
226 if ((error = bus_dmamap_load(dmatag, lesc->sc_dmamap, sc->sc_mem,
227 MEMSIZE, NULL, BUS_DMA_NOWAIT|BUS_DMA_COHERENT|BUS_DMA_24BIT)) != 0) {
228 printf(": DMA buffer map load error %d\n", error);
229 bus_dmamem_free(dmatag, &seg, rseg);
230 bus_dmamem_unmap(dmatag, sc->sc_mem, MEMSIZE);
231 return;
232 }
233
234 sc->sc_addr = lesc->sc_dmamap->dm_segs[0].ds_addr & 0xffffff;
235 sc->sc_memsize = MEMSIZE;
236 sc->sc_conf3 = LE_C3_BSWP | LE_C3_ACON | LE_C3_BCON;
237 }
238
239 myetheraddr(sc->sc_arpcom.ac_enaddr);
240
241 sc->sc_hasifmedia = 1;
242
243 sc->sc_copytodesc = am7990_copytobuf_contig;
244 sc->sc_copyfromdesc = am7990_copyfrombuf_contig;
245 sc->sc_copytobuf = am7990_copytobuf_contig;
246 sc->sc_copyfrombuf = am7990_copyfrombuf_contig;
247 sc->sc_zerobuf = am7990_zerobuf_contig;
248
249 sc->sc_rdcsr = le_sbus_rdcsr;
250 sc->sc_wrcsr = le_sbus_wrcsr;
251
252 am7990_config(&lesc->sc_am7990);
253
254 /* Establish interrupt handler */
255 if (sa->sa_nintr != 0)
256 (void)bus_intr_establish(lesc->sc_bustag, sa->sa_pri,
257 IPL_NET, 0, am7990_intr, sc, self->dv_xname);
258 }
259