1 /*      $OpenBSD: pci_map.c,v 1.12 2005/03/15 20:18:10 miod Exp $     */
2 /*	$NetBSD: pci_map.c,v 1.7 2000/05/10 16:58:42 thorpej Exp $	*/
3 
4 /*-
5  * Copyright (c) 1998, 2000 The NetBSD Foundation, Inc.
6  * All rights reserved.
7  *
8  * This code is derived from software contributed to The NetBSD Foundation
9  * by Charles M. Hannum; by William R. Studenmund; by Jason R. Thorpe.
10  *
11  * Redistribution and use in source and binary forms, with or without
12  * modification, are permitted provided that the following conditions
13  * are met:
14  * 1. Redistributions of source code must retain the above copyright
15  *    notice, this list of conditions and the following disclaimer.
16  * 2. Redistributions in binary form must reproduce the above copyright
17  *    notice, this list of conditions and the following disclaimer in the
18  *    documentation and/or other materials provided with the distribution.
19  * 3. All advertising materials mentioning features or use of this software
20  *    must display the following acknowledgement:
21  *        This product includes software developed by the NetBSD
22  *        Foundation, Inc. and its contributors.
23  * 4. Neither the name of The NetBSD Foundation nor the names of its
24  *    contributors may be used to endorse or promote products derived
25  *    from this software without specific prior written permission.
26  *
27  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37  * POSSIBILITY OF SUCH DAMAGE.
38  */
39 
40 /*
41  * PCI device mapping.
42  */
43 
44 #include <sys/param.h>
45 #include <sys/systm.h>
46 #include <sys/device.h>
47 
48 #include <dev/pci/pcireg.h>
49 #include <dev/pci/pcivar.h>
50 
51 
52 static int nbsd_pci_io_find(pci_chipset_tag_t, pcitag_t, int, pcireg_t,
53     bus_addr_t *, bus_size_t *, int *);
54 static int nbsd_pci_mem_find(pci_chipset_tag_t, pcitag_t, int, pcireg_t,
55     bus_addr_t *, bus_size_t *, int *);
56 
57 static int
nbsd_pci_io_find(pc,tag,reg,type,basep,sizep,flagsp)58 nbsd_pci_io_find(pc, tag, reg, type, basep, sizep, flagsp)
59 	pci_chipset_tag_t pc;
60 	pcitag_t tag;
61 	int reg;
62 	pcireg_t type;
63 	bus_addr_t *basep;
64 	bus_size_t *sizep;
65 	int *flagsp;
66 {
67 	pcireg_t address, mask;
68 	int s;
69 
70 	if (reg < PCI_MAPREG_START || reg >= PCI_MAPREG_END || (reg & 3))
71 		panic("pci_io_find: bad request");
72 
73 	/*
74 	 * Section 6.2.5.1, `Address Maps', tells us that:
75 	 *
76 	 * 1) The builtin software should have already mapped the device in a
77 	 * reasonable way.
78 	 *
79 	 * 2) A device which wants 2^n bytes of memory will hardwire the bottom
80 	 * n bits of the address to 0.  As recommended, we write all 1s and see
81 	 * what we get back.
82 	 */
83 	s = splhigh();
84 	address = pci_conf_read(pc, tag, reg);
85 	pci_conf_write(pc, tag, reg, 0xffffffff);
86 	mask = pci_conf_read(pc, tag, reg);
87 	pci_conf_write(pc, tag, reg, address);
88 	splx(s);
89 
90 	if (PCI_MAPREG_TYPE(address) != PCI_MAPREG_TYPE_IO) {
91 #ifdef DEBUG
92 		printf("pci_io_find: expected type i/o, found mem\n");
93 #endif
94 		return (EINVAL);
95 	}
96 
97 	if (PCI_MAPREG_IO_SIZE(mask) == 0) {
98 #ifdef DEBUG
99 		printf("pci_io_find: void region\n");
100 #endif
101 		return (ENOENT);
102 	}
103 
104 	if (basep != 0)
105 		*basep = PCI_MAPREG_IO_ADDR(address);
106 	if (sizep != 0)
107 		*sizep = PCI_MAPREG_IO_SIZE(mask);
108 	if (flagsp != 0)
109 		*flagsp = 0;
110 
111 	return (0);
112 }
113 
114 static int
nbsd_pci_mem_find(pc,tag,reg,type,basep,sizep,flagsp)115 nbsd_pci_mem_find(pc, tag, reg, type, basep, sizep, flagsp)
116 	pci_chipset_tag_t pc;
117 	pcitag_t tag;
118 	int reg;
119 	pcireg_t type;
120 	bus_addr_t *basep;
121 	bus_size_t *sizep;
122 	int *flagsp;
123 {
124 	pcireg_t address, mask, address1 = 0, mask1 = 0xffffffff;
125 	u_int64_t waddress, wmask;
126 	int s, is64bit;
127 
128 	is64bit = (PCI_MAPREG_MEM_TYPE(type) == PCI_MAPREG_MEM_TYPE_64BIT);
129 
130 	if (reg < PCI_MAPREG_START || reg >= PCI_MAPREG_END || (reg & 3))
131 		panic("pci_mem_find: bad request");
132 
133 	if (is64bit && (reg + 4) >= PCI_MAPREG_END)
134 		panic("pci_mem_find: bad 64-bit request");
135 
136 	/*
137 	 * Section 6.2.5.1, `Address Maps', tells us that:
138 	 *
139 	 * 1) The builtin software should have already mapped the device in a
140 	 * reasonable way.
141 	 *
142 	 * 2) A device which wants 2^n bytes of memory will hardwire the bottom
143 	 * n bits of the address to 0.  As recommended, we write all 1s and see
144 	 * what we get back.
145 	 */
146 	s = splhigh();
147 	address = pci_conf_read(pc, tag, reg);
148 	pci_conf_write(pc, tag, reg, 0xffffffff);
149 	mask = pci_conf_read(pc, tag, reg);
150 	pci_conf_write(pc, tag, reg, address);
151 	if (is64bit) {
152 		address1 = pci_conf_read(pc, tag, reg + 4);
153 		pci_conf_write(pc, tag, reg + 4, 0xffffffff);
154 		mask1 = pci_conf_read(pc, tag, reg + 4);
155 		pci_conf_write(pc, tag, reg + 4, address1);
156 	}
157 	splx(s);
158 
159 	if (PCI_MAPREG_TYPE(address) != PCI_MAPREG_TYPE_MEM) {
160 #ifdef DEBUG
161 		printf("pci_mem_find: expected type mem, found i/o\n");
162 #endif
163 		return (EINVAL);
164 	}
165 	if (type != -1 &&
166 	    PCI_MAPREG_MEM_TYPE(address) != PCI_MAPREG_MEM_TYPE(type)) {
167 #ifdef DEBUG
168 		printf("pci_mem_find: expected mem type %08x, found %08x\n",
169 		    PCI_MAPREG_MEM_TYPE(type),
170 		    PCI_MAPREG_MEM_TYPE(address));
171 #endif
172 		return (EINVAL);
173 	}
174 
175 	waddress = (u_int64_t)address1 << 32UL | address;
176 	wmask = (u_int64_t)mask1 << 32UL | mask;
177 
178 	if ((is64bit && PCI_MAPREG_MEM64_SIZE(wmask) == 0) ||
179 	    (!is64bit && PCI_MAPREG_MEM_SIZE(mask) == 0)) {
180 #ifdef DEBUG
181 		printf("pci_mem_find: void region\n");
182 #endif
183 		return (ENOENT);
184 	}
185 
186 	switch (PCI_MAPREG_MEM_TYPE(address)) {
187 	case PCI_MAPREG_MEM_TYPE_32BIT:
188 	case PCI_MAPREG_MEM_TYPE_32BIT_1M:
189 		break;
190 	case PCI_MAPREG_MEM_TYPE_64BIT:
191 		/*
192 		 * Handle the case of a 64-bit memory register on a
193 		 * platform with 32-bit addressing.  Make sure that
194 		 * the address assigned and the device's memory size
195 		 * fit in 32 bits.  We implicitly assume that if
196 		 * bus_addr_t is 64-bit, then so is bus_size_t.
197 		 */
198 		if (sizeof(u_int64_t) > sizeof(bus_addr_t) &&
199 		    (address1 != 0 || mask1 != 0xffffffff)) {
200 #ifdef DEBUG
201 			printf("pci_mem_find: 64-bit memory map which is "
202 			    "inaccessible on a 32-bit platform\n");
203 #endif
204 			return (EINVAL);
205 		}
206 		break;
207 	default:
208 #ifdef DEBUG
209 		printf("pci_mem_find: reserved mapping register type\n");
210 #endif
211 		return (EINVAL);
212 	}
213 
214 	if (sizeof(u_int64_t) > sizeof(bus_addr_t)) {
215 		if (basep != 0)
216 			*basep = PCI_MAPREG_MEM_ADDR(address);
217 		if (sizep != 0)
218 			*sizep = PCI_MAPREG_MEM_SIZE(mask);
219 	} else {
220 		if (basep != 0)
221 			*basep = PCI_MAPREG_MEM64_ADDR(waddress);
222 		if (sizep != 0)
223 			*sizep = PCI_MAPREG_MEM64_SIZE(wmask);
224 	}
225 	if (flagsp != 0)
226 		*flagsp =
227 #ifdef BUS_SPACE_MAP_PREFETCHABLE
228 		    PCI_MAPREG_MEM_PREFETCHABLE(address) ?
229 		      BUS_SPACE_MAP_PREFETCHABLE :
230 #endif
231 		  0;
232 
233 	return (0);
234 }
235 
236 int
pci_io_find(pc,pcitag,reg,iobasep,iosizep)237 pci_io_find(pc, pcitag, reg, iobasep, iosizep)
238 	pci_chipset_tag_t pc;
239 	pcitag_t pcitag;
240 	int reg;
241 	bus_addr_t *iobasep;
242 	bus_size_t *iosizep;
243 {
244 	return (nbsd_pci_io_find(pc, pcitag, reg, 0, iobasep, iosizep, 0));
245 }
246 
247 int
pci_mem_find(pc,pcitag,reg,membasep,memsizep,cacheablep)248 pci_mem_find(pc, pcitag, reg, membasep, memsizep, cacheablep)
249 	pci_chipset_tag_t pc;
250 	pcitag_t pcitag;
251 	int reg;
252 	bus_addr_t *membasep;
253 	bus_size_t *memsizep;
254 	int *cacheablep;
255 {
256 	return (nbsd_pci_mem_find(pc, pcitag, reg, -1, membasep, memsizep,
257 				  cacheablep));
258 }
259 
260 pcireg_t
pci_mapreg_type(pc,tag,reg)261 pci_mapreg_type(pc, tag, reg)
262 	pci_chipset_tag_t pc;
263 	pcitag_t tag;
264 	int reg;
265 {
266 	pcireg_t rv;
267 
268 	rv = pci_conf_read(pc, tag, reg);
269 	if (PCI_MAPREG_TYPE(rv) == PCI_MAPREG_TYPE_IO)
270 		rv &= PCI_MAPREG_TYPE_MASK;
271 	else
272 		rv &= PCI_MAPREG_TYPE_MASK|PCI_MAPREG_MEM_TYPE_MASK;
273 	return (rv);
274 }
275 
276 int
pci_mapreg_info(pc,tag,reg,type,basep,sizep,flagsp)277 pci_mapreg_info(pc, tag, reg, type, basep, sizep, flagsp)
278 	pci_chipset_tag_t pc;
279 	pcitag_t tag;
280 	int reg;
281 	pcireg_t type;
282 	bus_addr_t *basep;
283 	bus_size_t *sizep;
284 	int *flagsp;
285 {
286 
287 	if (PCI_MAPREG_TYPE(type) == PCI_MAPREG_TYPE_IO)
288 		return (nbsd_pci_io_find(pc, tag, reg, type, basep, sizep,
289 		    flagsp));
290 	else
291 		return (nbsd_pci_mem_find(pc, tag, reg, type, basep, sizep,
292 		    flagsp));
293 }
294 
295 int
pci_mapreg_map(pa,reg,type,flags,tagp,handlep,basep,sizep,maxsize)296 pci_mapreg_map(pa, reg, type, flags, tagp, handlep, basep, sizep, maxsize)
297 	struct pci_attach_args *pa;
298 	int reg, flags;
299 	pcireg_t type;
300 	bus_space_tag_t *tagp;
301 	bus_space_handle_t *handlep;
302 	bus_addr_t *basep;
303 	bus_size_t *sizep;
304 	bus_size_t maxsize;
305 {
306 	bus_space_tag_t tag;
307 	bus_space_handle_t handle;
308 	bus_addr_t base;
309 	bus_size_t size;
310 	int rv;
311 
312 	if (PCI_MAPREG_TYPE(type) == PCI_MAPREG_TYPE_IO) {
313 		if ((pa->pa_flags & PCI_FLAGS_IO_ENABLED) == 0)
314 			return (EINVAL);
315 		if ((rv = nbsd_pci_io_find(pa->pa_pc, pa->pa_tag, reg, type,
316 		    &base, &size, NULL)) != 0)
317 			return (rv);
318 		tag = pa->pa_iot;
319 	} else {
320 		if ((pa->pa_flags & PCI_FLAGS_MEM_ENABLED) == 0)
321 			return (EINVAL);
322 		if ((rv = nbsd_pci_mem_find(pa->pa_pc, pa->pa_tag, reg, type,
323 		    &base, &size, NULL)) != 0)
324 			return (rv);
325 		tag = pa->pa_memt;
326 	}
327 
328 	/* The caller can request limitation of the mapping's size. */
329 	if (maxsize != 0 && size > maxsize) {
330 #ifdef DEBUG
331 		printf("pci_mapreg_map: limited PCI mapping from %lx to %lx\n",
332 		    (u_long)size, (u_long)maxsize);
333 #endif
334 		size = maxsize;
335 	}
336 
337 	if (bus_space_map(tag, base, size, flags, &handle))
338 		return (1);
339 
340 	if (tagp != NULL)
341 		*tagp = tag;
342 	if (handlep != NULL)
343 		*handlep = handle;
344 	if (basep != NULL)
345 		*basep = base;
346 	if (sizep != NULL)
347 		*sizep = size;
348 
349 	return (0);
350 }
351