1 /* $OpenBSD: lofn.c,v 1.26 2004/05/04 16:59:31 grange Exp $ */
2
3 /*
4 * Copyright (c) 2001-2002 Jason L. Wright (jason@thought.net)
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
18 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
19 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
20 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
21 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
22 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
24 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
25 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26 * POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Effort sponsored in part by the Defense Advanced Research Projects
29 * Agency (DARPA) and Air Force Research Laboratory, Air Force
30 * Materiel Command, USAF, under agreement number F30602-01-2-0537.
31 *
32 */
33
34 /*
35 * Driver for the Hifn 6500 assymmetric encryption processor.
36 */
37
38 #include <sys/param.h>
39 #include <sys/systm.h>
40 #include <sys/proc.h>
41 #include <sys/errno.h>
42 #include <sys/malloc.h>
43 #include <sys/kernel.h>
44 #include <sys/mbuf.h>
45 #include <sys/device.h>
46
47 #include <crypto/cryptodev.h>
48 #include <dev/rndvar.h>
49
50 #include <dev/pci/pcireg.h>
51 #include <dev/pci/pcivar.h>
52 #include <dev/pci/pcidevs.h>
53
54 #include <dev/pci/lofnreg.h>
55 #include <dev/pci/lofnvar.h>
56
57 /*
58 * Prototypes and count for the pci_device structure
59 */
60 int lofn_probe(struct device *, void *, void *);
61 void lofn_attach(struct device *, struct device *, void *);
62
63 struct cfattach lofn_ca = {
64 sizeof(struct lofn_softc), lofn_probe, lofn_attach,
65 };
66
67 struct cfdriver lofn_cd = {
68 0, "lofn", DV_DULL
69 };
70
71 int lofn_intr(void *);
72 int lofn_norm_sigbits(const u_int8_t *, u_int);
73 void lofn_dump_reg(struct lofn_softc *, int);
74 void lofn_zero_reg(struct lofn_softc *, int);
75 void lofn_read_reg(struct lofn_softc *, int, union lofn_reg *);
76 void lofn_write_reg(struct lofn_softc *, int, union lofn_reg *);
77 int lofn_kprocess(struct cryptkop *);
78 struct lofn_softc *lofn_kfind(struct cryptkop *);
79 int lofn_modexp_start(struct lofn_softc *, struct lofn_q *);
80 void lofn_modexp_finish(struct lofn_softc *, struct lofn_q *);
81
82 void lofn_feed(struct lofn_softc *);
83
84 int
lofn_probe(parent,match,aux)85 lofn_probe(parent, match, aux)
86 struct device *parent;
87 void *match;
88 void *aux;
89 {
90 struct pci_attach_args *pa = (struct pci_attach_args *) aux;
91
92 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_HIFN &&
93 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_HIFN_6500)
94 return (1);
95 return (0);
96 }
97
98 void
lofn_attach(parent,self,aux)99 lofn_attach(parent, self, aux)
100 struct device *parent, *self;
101 void *aux;
102 {
103 struct lofn_softc *sc = (struct lofn_softc *)self;
104 struct pci_attach_args *pa = aux;
105 pci_chipset_tag_t pc = pa->pa_pc;
106 pci_intr_handle_t ih;
107 const char *intrstr = NULL;
108 bus_size_t iosize;
109 u_int32_t cmd;
110 int algs[CRK_ALGORITHM_MAX + 1];
111
112 cmd = pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
113 cmd |= PCI_COMMAND_MEM_ENABLE;
114 pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, cmd);
115 cmd = pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
116
117 if (!(cmd & PCI_COMMAND_MEM_ENABLE)) {
118 printf(": failed to enable memory mapping\n");
119 return;
120 }
121
122 if (pci_mapreg_map(pa, LOFN_BAR0, PCI_MAPREG_TYPE_MEM, 0,
123 &sc->sc_st, &sc->sc_sh, NULL, &iosize, 0)) {
124 printf(": can't map mem space\n");
125 return;
126 }
127
128 sc->sc_dmat = pa->pa_dmat;
129
130 if (pci_intr_map(pa, &ih)) {
131 printf(": couldn't map interrupt\n");
132 goto fail;
133 }
134 intrstr = pci_intr_string(pc, ih);
135 sc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, lofn_intr, sc,
136 self->dv_xname);
137 if (sc->sc_ih == NULL) {
138 printf(": couldn't establish interrupt");
139 if (intrstr != NULL)
140 printf(" at %s", intrstr);
141 printf("\n");
142 goto fail;
143 }
144
145 WRITE_REG_0(sc, LOFN_REL_RNC, LOFN_RNG_SCALAR);
146
147 /* Enable RNG */
148 WRITE_REG_0(sc, LOFN_REL_CFG2,
149 READ_REG_0(sc, LOFN_REL_CFG2) | LOFN_CFG2_RNGENA);
150 sc->sc_ier |= LOFN_IER_RDY;
151 WRITE_REG(sc, LOFN_REL_IER, sc->sc_ier);
152
153 /* Enable ALU */
154 WRITE_REG_0(sc, LOFN_REL_CFG2,
155 READ_REG_0(sc, LOFN_REL_CFG2) | LOFN_CFG2_PRCENA);
156
157 SIMPLEQ_INIT(&sc->sc_queue);
158
159 sc->sc_cid = crypto_get_driverid(0);
160 if (sc->sc_cid < 0) {
161 printf(": failed to register cid\n");
162 return;
163 }
164
165 bzero(algs, sizeof(algs));
166 algs[CRK_MOD_EXP] = CRYPTO_ALG_FLAG_SUPPORTED;
167
168 crypto_kregister(sc->sc_cid, algs, lofn_kprocess);
169
170 printf(": PK, %s\n", intrstr);
171
172 return;
173
174 fail:
175 bus_space_unmap(sc->sc_st, sc->sc_sh, iosize);
176 }
177
178 int
lofn_intr(vsc)179 lofn_intr(vsc)
180 void *vsc;
181 {
182 struct lofn_softc *sc = vsc;
183 struct lofn_q *q;
184 u_int32_t sr;
185 int r = 0, i;
186
187 sr = READ_REG_0(sc, LOFN_REL_SR);
188
189 if (sc->sc_ier & LOFN_IER_RDY) {
190 if (sr & LOFN_SR_RNG_UF) {
191 r = 1;
192 printf("%s: rng underflow (disabling)\n",
193 sc->sc_dv.dv_xname);
194 WRITE_REG_0(sc, LOFN_REL_CFG2,
195 READ_REG_0(sc, LOFN_REL_CFG2) &
196 (~LOFN_CFG2_RNGENA));
197 sc->sc_ier &= ~LOFN_IER_RDY;
198 WRITE_REG_0(sc, LOFN_REL_IER, sc->sc_ier);
199 } else if (sr & LOFN_SR_RNG_RDY) {
200 r = 1;
201
202 bus_space_read_region_4(sc->sc_st, sc->sc_sh,
203 LOFN_REL_RNG, sc->sc_rngbuf, LOFN_RNGBUF_SIZE);
204 for (i = 0; i < LOFN_RNGBUF_SIZE; i++)
205 add_true_randomness(sc->sc_rngbuf[i]);
206 }
207 }
208
209 if (sc->sc_ier & LOFN_IER_DONE) {
210 r = 1;
211 if (sr & LOFN_SR_DONE && sc->sc_current != NULL) {
212 q = sc->sc_current;
213 sc->sc_current = NULL;
214 q->q_finish(sc, q);
215 free(q, M_DEVBUF);
216 lofn_feed(sc);
217 }
218 }
219
220 return (r);
221 }
222
223 void
lofn_read_reg(sc,ridx,rp)224 lofn_read_reg(sc, ridx, rp)
225 struct lofn_softc *sc;
226 int ridx;
227 union lofn_reg *rp;
228 {
229 #if BYTE_ORDER == BIG_ENDIAN
230 bus_space_read_region_4(sc->sc_st, sc->sc_sh,
231 LOFN_REGADDR(LOFN_WIN_0, ridx, 0), rp->w, 1024/32);
232 #else
233 bus_space_read_region_4(sc->sc_st, sc->sc_sh,
234 LOFN_REGADDR(LOFN_WIN_2, ridx, 0), rp->w, 1024/32);
235 #endif
236 }
237
238 void
lofn_write_reg(sc,ridx,rp)239 lofn_write_reg(sc, ridx, rp)
240 struct lofn_softc *sc;
241 int ridx;
242 union lofn_reg *rp;
243 {
244 #if BYTE_ORDER == BIG_ENDIAN
245 bus_space_write_region_4(sc->sc_st, sc->sc_sh,
246 LOFN_REGADDR(LOFN_WIN_0, ridx, 0), rp->w, 1024/32);
247 #else
248 bus_space_write_region_4(sc->sc_st, sc->sc_sh,
249 LOFN_REGADDR(LOFN_WIN_2, ridx, 0), rp->w, 1024/32);
250 #endif
251 }
252
253 void
lofn_zero_reg(sc,ridx)254 lofn_zero_reg(sc, ridx)
255 struct lofn_softc *sc;
256 int ridx;
257 {
258 lofn_write_reg(sc, ridx, &sc->sc_zero);
259 }
260
261 void
lofn_dump_reg(sc,ridx)262 lofn_dump_reg(sc, ridx)
263 struct lofn_softc *sc;
264 int ridx;
265 {
266 int i;
267
268 printf("reg %d bits %4u ", ridx,
269 READ_REG(sc, LOFN_LENADDR(LOFN_WIN_2, ridx)) & LOFN_LENMASK);
270
271 for (i = 0; i < 1024/32; i++) {
272 printf("%08X", READ_REG(sc, LOFN_REGADDR(LOFN_WIN_3, ridx, i)));
273 }
274 printf("\n");
275 }
276
277 struct lofn_softc *
lofn_kfind(krp)278 lofn_kfind(krp)
279 struct cryptkop *krp;
280 {
281 struct lofn_softc *sc;
282 int i;
283
284 for (i = 0; i < lofn_cd.cd_ndevs; i++) {
285 sc = lofn_cd.cd_devs[i];
286 if (sc == NULL)
287 continue;
288 if (sc->sc_cid == krp->krp_hid)
289 return (sc);
290 }
291 return (NULL);
292 }
293
294 int
lofn_kprocess(krp)295 lofn_kprocess(krp)
296 struct cryptkop *krp;
297 {
298 struct lofn_softc *sc;
299 struct lofn_q *q;
300 int s;
301
302 if (krp == NULL || krp->krp_callback == NULL)
303 return (EINVAL);
304 if ((sc = lofn_kfind(krp)) == NULL) {
305 krp->krp_status = EINVAL;
306 crypto_kdone(krp);
307 return (0);
308 }
309
310 q = (struct lofn_q *)malloc(sizeof(*q), M_DEVBUF, M_NOWAIT);
311 if (q == NULL) {
312 krp->krp_status = ENOMEM;
313 crypto_kdone(krp);
314 return (0);
315 }
316
317 switch (krp->krp_op) {
318 case CRK_MOD_EXP:
319 q->q_start = lofn_modexp_start;
320 q->q_finish = lofn_modexp_finish;
321 q->q_krp = krp;
322 s = splnet();
323 SIMPLEQ_INSERT_TAIL(&sc->sc_queue, q, q_next);
324 lofn_feed(sc);
325 splx(s);
326 return (0);
327 default:
328 printf("%s: kprocess: invalid op 0x%x\n",
329 sc->sc_dv.dv_xname, krp->krp_op);
330 krp->krp_status = EOPNOTSUPP;
331 crypto_kdone(krp);
332 free(q, M_DEVBUF);
333 return (0);
334 }
335 }
336
337 int
lofn_modexp_start(sc,q)338 lofn_modexp_start(sc, q)
339 struct lofn_softc *sc;
340 struct lofn_q *q;
341 {
342 struct cryptkop *krp = q->q_krp;
343 int ip = 0, err = 0;
344 int mshift, eshift, nshift;
345 int mbits, ebits, nbits;
346
347 if (krp->krp_param[LOFN_MODEXP_PAR_M].crp_nbits > 1024) {
348 err = ERANGE;
349 goto errout;
350 }
351
352 /* Zero out registers. */
353 lofn_zero_reg(sc, 0);
354 lofn_zero_reg(sc, 1);
355 lofn_zero_reg(sc, 2);
356 lofn_zero_reg(sc, 3);
357
358 /* Write out N... */
359 nbits = lofn_norm_sigbits(krp->krp_param[LOFN_MODEXP_PAR_N].crp_p,
360 krp->krp_param[LOFN_MODEXP_PAR_N].crp_nbits);
361 if (nbits > 1024) {
362 err = E2BIG;
363 goto errout;
364 }
365 if (nbits < 5) {
366 err = ERANGE;
367 goto errout;
368 }
369 bzero(&sc->sc_tmp, sizeof(sc->sc_tmp));
370 bcopy(krp->krp_param[LOFN_MODEXP_PAR_N].crp_p, &sc->sc_tmp,
371 (nbits + 7) / 8);
372 lofn_write_reg(sc, 2, &sc->sc_tmp);
373
374 nshift = 1024 - nbits;
375 WRITE_REG(sc, LOFN_LENADDR(LOFN_WIN_2, 2), 1024);
376 if (nshift != 0) {
377 WRITE_REG(sc, LOFN_REL_INSTR + ip,
378 LOFN_INSTR2(0, OP_CODE_SL, 2, 2, nshift));
379 ip += 4;
380
381 WRITE_REG(sc, LOFN_REL_INSTR + ip,
382 LOFN_INSTR2(0, OP_CODE_TAG, 2, 2, nbits));
383 ip += 4;
384 }
385
386 /* Write out M... */
387 mbits = lofn_norm_sigbits(krp->krp_param[LOFN_MODEXP_PAR_M].crp_p,
388 krp->krp_param[LOFN_MODEXP_PAR_M].crp_nbits);
389 if (mbits > 1024 || mbits > nbits) {
390 err = E2BIG;
391 goto errout;
392 }
393 bzero(&sc->sc_tmp, sizeof(sc->sc_tmp));
394 bcopy(krp->krp_param[LOFN_MODEXP_PAR_M].crp_p, &sc->sc_tmp,
395 (mbits + 7) / 8);
396 lofn_write_reg(sc, 0, &sc->sc_tmp);
397
398 mshift = 1024 - nbits;
399 WRITE_REG(sc, LOFN_LENADDR(LOFN_WIN_2, 0), 1024);
400 if (mshift != 0) {
401 WRITE_REG(sc, LOFN_REL_INSTR + ip,
402 LOFN_INSTR2(0, OP_CODE_SL, 0, 0, mshift));
403 ip += 4;
404
405 WRITE_REG(sc, LOFN_REL_INSTR + ip,
406 LOFN_INSTR2(0, OP_CODE_TAG, 0, 0, nbits));
407 ip += 4;
408 }
409
410 /* Write out E... */
411 ebits = lofn_norm_sigbits(krp->krp_param[LOFN_MODEXP_PAR_E].crp_p,
412 krp->krp_param[LOFN_MODEXP_PAR_E].crp_nbits);
413 if (ebits > 1024 || ebits > nbits) {
414 err = E2BIG;
415 goto errout;
416 }
417 if (ebits < 1) {
418 err = ERANGE;
419 goto errout;
420 }
421 bzero(&sc->sc_tmp, sizeof(sc->sc_tmp));
422 bcopy(krp->krp_param[LOFN_MODEXP_PAR_E].crp_p, &sc->sc_tmp,
423 (ebits + 7) / 8);
424 lofn_write_reg(sc, 1, &sc->sc_tmp);
425
426 eshift = 1024 - nbits;
427 WRITE_REG(sc, LOFN_LENADDR(LOFN_WIN_2, 1), 1024);
428 if (eshift != 0) {
429 WRITE_REG(sc, LOFN_REL_INSTR + ip,
430 LOFN_INSTR2(0, OP_CODE_SL, 1, 1, eshift));
431 ip += 4;
432
433 WRITE_REG(sc, LOFN_REL_INSTR + ip,
434 LOFN_INSTR2(0, OP_CODE_TAG, 1, 1, nbits));
435 ip += 4;
436 }
437
438 if (nshift == 0) {
439 WRITE_REG(sc, LOFN_REL_INSTR + ip,
440 LOFN_INSTR(OP_DONE, OP_CODE_MODEXP, 3, 0, 1, 2));
441 ip += 4;
442 } else {
443 WRITE_REG(sc, LOFN_REL_INSTR + ip,
444 LOFN_INSTR(0, OP_CODE_MODEXP, 3, 0, 1, 2));
445 ip += 4;
446
447 WRITE_REG(sc, LOFN_REL_INSTR + ip,
448 LOFN_INSTR2(0, OP_CODE_SR, 3, 3, nshift));
449 ip += 4;
450
451 WRITE_REG(sc, LOFN_REL_INSTR + ip,
452 LOFN_INSTR2(OP_DONE, OP_CODE_TAG, 3, 3, nbits));
453 ip += 4;
454 }
455
456 /* Start microprogram */
457 WRITE_REG(sc, LOFN_REL_CR, 0);
458
459 return (0);
460
461 errout:
462 bzero(&sc->sc_tmp, sizeof(sc->sc_tmp));
463 lofn_zero_reg(sc, 0);
464 lofn_zero_reg(sc, 1);
465 lofn_zero_reg(sc, 2);
466 lofn_zero_reg(sc, 3);
467 krp->krp_status = err;
468 crypto_kdone(krp);
469 return (1);
470 }
471
472 void
lofn_modexp_finish(sc,q)473 lofn_modexp_finish(sc, q)
474 struct lofn_softc *sc;
475 struct lofn_q *q;
476 {
477 struct cryptkop *krp = q->q_krp;
478 int reglen, crplen;
479
480 lofn_read_reg(sc, 3, &sc->sc_tmp);
481
482 reglen = ((READ_REG(sc, LOFN_LENADDR(LOFN_WIN_2, 3)) & LOFN_LENMASK) +
483 7) / 8;
484 crplen = (krp->krp_param[krp->krp_iparams].crp_nbits + 7) / 8;
485
486 if (crplen <= reglen)
487 bcopy(sc->sc_tmp.b, krp->krp_param[krp->krp_iparams].crp_p,
488 reglen);
489 else {
490 bcopy(sc->sc_tmp.b, krp->krp_param[krp->krp_iparams].crp_p,
491 reglen);
492 bzero(krp->krp_param[krp->krp_iparams].crp_p + reglen,
493 crplen - reglen);
494 }
495 bzero(&sc->sc_tmp, sizeof(sc->sc_tmp));
496 lofn_zero_reg(sc, 0);
497 lofn_zero_reg(sc, 1);
498 lofn_zero_reg(sc, 2);
499 lofn_zero_reg(sc, 3);
500 crypto_kdone(krp);
501 }
502
503 /*
504 * Return the number of significant bits of a big number.
505 */
506 int
lofn_norm_sigbits(const u_int8_t * p,u_int pbits)507 lofn_norm_sigbits(const u_int8_t *p, u_int pbits)
508 {
509 u_int plen = (pbits + 7) / 8;
510 int i, sig = plen * 8;
511 u_int8_t c;
512
513 for (i = plen - 1; i >= 0; i--) {
514 c = p[i];
515 if (c != 0) {
516 while ((c & 0x80) == 0) {
517 sig--;
518 c <<= 1;
519 }
520 break;
521 }
522 sig -= 8;
523 }
524 return (sig);
525 }
526
527 void
lofn_feed(sc)528 lofn_feed(sc)
529 struct lofn_softc *sc;
530 {
531 struct lofn_q *q;
532
533 /* Queue is empty and nothing being processed, turn off interrupt */
534 if (SIMPLEQ_EMPTY(&sc->sc_queue) &&
535 sc->sc_current == NULL) {
536 sc->sc_ier &= ~LOFN_IER_DONE;
537 WRITE_REG(sc, LOFN_REL_IER, sc->sc_ier);
538 return;
539 }
540
541 /* Operation already pending, wait. */
542 if (sc->sc_current != NULL)
543 return;
544
545 while (!SIMPLEQ_EMPTY(&sc->sc_queue)) {
546 q = SIMPLEQ_FIRST(&sc->sc_queue);
547 if (q->q_start(sc, q) == 0) {
548 sc->sc_current = q;
549 SIMPLEQ_REMOVE_HEAD(&sc->sc_queue, q_next);
550 sc->sc_ier |= LOFN_IER_DONE;
551 WRITE_REG(sc, LOFN_REL_IER, sc->sc_ier);
552 break;
553 } else {
554 SIMPLEQ_REMOVE_HEAD(&sc->sc_queue, q_next);
555 free(q, M_DEVBUF);
556 }
557 }
558 }
559