1 /*	$OpenBSD: isesvar.h,v 1.6 2003/06/07 11:31:24 ho Exp $	*/
2 
3 /*
4  * Copyright (c) 2000 H�kan Olsson (ho@crt.se)
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  *
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
21  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
22  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
23  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
25  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26  */
27 
28 struct ises_softc {
29 	struct device		sc_dv;		/* generic device */
30 	void			*sc_ih;		/* interrupt handler cookie */
31 	bus_space_handle_t	sc_memh;	/* memory handle */
32 	bus_space_tag_t		sc_memt;	/* memory tag */
33 	bus_dma_tag_t		sc_dmat;	/* dma tag */
34 	bus_dmamap_t		sc_dmamap;	/* dma xfer map */
35 	caddr_t			sc_dma_data;	/* data area */
36 
37 	int32_t			sc_cid;		/* crypto tag */
38 	u_int32_t		sc_intrmask;	/* interrupt mask */
39 	u_int32_t		sc_dma_mask;	/* DMA running mask */
40 	SIMPLEQ_HEAD(,ises_q)	sc_queue;	/* packet queue */
41 	int			sc_nqueue;	/* count enqueued */
42 	SIMPLEQ_HEAD(,ises_q)	sc_qchip;	/* on chip */
43 	struct timeout		sc_timeout;	/* init + hrng timeout */
44 	int			sc_nsessions;	/* nr of sessions */
45 	struct ises_session	*sc_sessions;	/* sessions */
46 	int			sc_cursession;	/* current session */
47 	int			sc_switching;	/* we're switching sessions */
48 	int			sc_initstate;	/* card initialization state */
49 
50 	SIMPLEQ_HEAD(,ises_cmd) sc_cmdq;	/* Commands in A-queue */
51 	u_int32_t		sc_lnau1_r[64];	/* LNAU 1 result (2048 bits) */
52 	int			sc_lnau1_rlen;	/* LNAU 1 result len (bytes) */
53 	u_int32_t		sc_lnau2_r[64];	/* LNAU 2 result (2048 bits) */
54 	int			sc_lnau2_rlen;	/* LNAU 2 result len (bytes) */
55 };
56 
57 union ises_q_u {
58 	struct mbuf		*mbuf;
59 	struct uio		*uio;
60 	/* XXX more ? */
61 };
62 
63 #define ISES_MAX_SCATTER	64
64 
65 struct ises_q {
66 	SIMPLEQ_ENTRY(ises_q)	q_next;
67 	struct cryptop		*q_crp;
68 	struct ises_softc	*q_sc;
69 
70 	union ises_q_u		q_src, q_dst;	/* src/dst data bufs */
71 
72 	bus_dma_segment_t	q_src_ds, q_dst_ds;
73 
74 	struct ises_session	q_session;
75 	u_int16_t		q_offset;	/* crypto offset */
76 	int			q_sesn;
77 
78 #if 0
79 	long			q_src_packp[ISES_MAX_SCATTER];
80 	int			q_src_packl[ISES_MAX_SCATTER];
81 	int			q_src_npa, q_src_l;
82 #endif
83 
84 	long			q_dst_packp;
85 	int			q_dst_packl;
86 	int			q_dst_npa, q_dst_l;
87 	u_int32_t		q_macbuf[5];
88 };
89 
90 struct ises_cmd {
91 	SIMPLEQ_ENTRY(ises_cmd)	cmd_next;
92 	u_int32_t		cmd_code;	/* Command code */
93 	u_int32_t		cmd_rlen;	/* Response length */
94 	u_int32_t		cmd_session;	/* Current ises_session */
95 	u_int32_t		(*cmd_cb)(struct ises_softc *,
96 					  struct ises_cmd *); /* Callback */
97 };
98 
99 /* Maximum queue length */
100 #ifndef ISES_MAX_NQUEUE
101 #define ISES_MAX_NQUEUE		24
102 #endif
103