1 /* $OpenBSD: iop_pci.c,v 1.4 2002/03/31 05:25:10 nate Exp $ */
2 /* $NetBSD: iop_pci.c,v 1.4 2001/03/20 13:21:00 ad Exp $ */
3
4 /*-
5 * Copyright (c) 2000 The NetBSD Foundation, Inc.
6 * All rights reserved.
7 *
8 * This code is derived from software contributed to The NetBSD Foundation
9 * by Andrew Doran.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 * 3. All advertising materials mentioning features or use of this software
20 * must display the following acknowledgement:
21 * This product includes software developed by the NetBSD
22 * Foundation, Inc. and its contributors.
23 * 4. Neither the name of The NetBSD Foundation nor the names of its
24 * contributors may be used to endorse or promote products derived
25 * from this software without specific prior written permission.
26 *
27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 * POSSIBILITY OF SUCH DAMAGE.
38 */
39
40 /*
41 * PCI front-end for `iop' driver.
42 */
43
44 #include <sys/param.h>
45 #include <sys/systm.h>
46 #include <sys/kernel.h>
47 #include <sys/device.h>
48 #include <sys/queue.h>
49 #include <sys/proc.h>
50
51 #include <machine/endian.h>
52 #include <machine/bus.h>
53
54 #include <dev/pci/pcidevs.h>
55 #include <dev/pci/pcivar.h>
56
57 #include <dev/i2o/i2o.h>
58 #include <dev/i2o/iopreg.h>
59 #include <dev/i2o/iopio.h>
60 #include <dev/i2o/iopvar.h>
61
62 #define PCI_INTERFACE_I2O_POLLED 0x00
63 #define PCI_INTERFACE_I2O_INTRDRIVEN 0x01
64
65 void iop_pci_attach(struct device *, struct device *, void *);
66 int iop_pci_match(struct device *, void *, void *);
67
68 struct cfattach iop_pci_ca = {
69 sizeof(struct iop_softc), iop_pci_match, iop_pci_attach
70 };
71
72 int
iop_pci_match(parent,match,aux)73 iop_pci_match(parent, match, aux)
74 struct device *parent;
75 void *match;
76 void *aux;
77 {
78 struct pci_attach_args *pa;
79
80 pa = aux;
81
82 /*
83 * Look for an "intelligent I/O processor" that adheres to the I2O
84 * specification. Ignore the device if it doesn't support interrupt
85 * driven operation.
86 */
87 if (PCI_CLASS(pa->pa_class) == PCI_CLASS_I2O &&
88 PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_I2O_STANDARD &&
89 PCI_INTERFACE(pa->pa_class) == PCI_INTERFACE_I2O_INTRDRIVEN)
90 return (1);
91
92 return (0);
93 }
94
95 void
iop_pci_attach(struct device * parent,struct device * self,void * aux)96 iop_pci_attach(struct device *parent, struct device *self, void *aux)
97 {
98 struct pci_attach_args *pa;
99 struct iop_softc *sc;
100 pci_chipset_tag_t pc;
101 pci_intr_handle_t ih;
102 const char *intrstr;
103 pcireg_t reg;
104 int i;
105
106 sc = (struct iop_softc *)self;
107 pa = (struct pci_attach_args *)aux;
108 pc = pa->pa_pc;
109 printf(": ");
110
111 /*
112 * The kernel always uses the first memory mapping to communicate
113 * with the IOP.
114 */
115 for (i = PCI_MAPREG_START; i < PCI_MAPREG_END; i += 4) {
116 reg = pci_conf_read(pc, pa->pa_tag, i);
117 if (PCI_MAPREG_TYPE(reg) == PCI_MAPREG_TYPE_MEM)
118 break;
119 }
120 if (i == PCI_MAPREG_END) {
121 printf("can't find mapping\n");
122 return;
123 }
124
125 /* Map the register window. */
126 if (pci_mapreg_map(pa, i, PCI_MAPREG_TYPE_MEM, 0, &sc->sc_iot,
127 &sc->sc_ioh, NULL, NULL, 0x40000)) {
128 printf("%s: can't map register window\n", sc->sc_dv.dv_xname);
129 return;
130 }
131
132 sc->sc_dmat = pa->pa_dmat;
133 sc->sc_bus_memt = pa->pa_memt;
134 sc->sc_bus_iot = pa->pa_iot;
135
136 /* Enable the device. */
137 reg = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
138 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG,
139 reg | PCI_COMMAND_MASTER_ENABLE);
140
141 /* Map and establish the interrupt. XXX IPL_BIO. */
142 if (pci_intr_map(pa, &ih)) {
143 printf("can't map interrupt\n");
144 return;
145 }
146 intrstr = pci_intr_string(pc, ih);
147 sc->sc_ih = pci_intr_establish(pc, ih, IPL_BIO, iop_intr, sc,
148 sc->sc_dv.dv_xname);
149 if (sc->sc_ih == NULL) {
150 printf("can't establish interrupt");
151 if (intrstr != NULL)
152 printf(" at %s", intrstr);
153 printf("\n");
154 return;
155 }
156
157 /* Attach to the bus-independent code. */
158 iop_init(sc, intrstr);
159 }
160