1 /*	$OpenBSD: if_fxp_pci.c,v 1.46 2006/03/08 20:51:59 miod Exp $	*/
2 
3 /*
4  * Copyright (c) 1995, David Greenman
5  * All rights reserved.
6  *
7  * Modifications to support NetBSD:
8  * Copyright (c) 1997 Jason R. Thorpe.  All rights reserved.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice unmodified, this list of conditions, and the following
15  *    disclaimer.
16  * 2. Redistributions in binary form must reproduce the above copyright
17  *    notice, this list of conditions and the following disclaimer in the
18  *    documentation and/or other materials provided with the distribution.
19  *
20  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
21  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
24  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
25  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
26  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
27  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
28  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
29  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30  * SUCH DAMAGE.
31  *
32  *	Id: if_fxp.c,v 1.55 1998/08/04 08:53:12 dg Exp
33  */
34 
35 /*
36  * Intel EtherExpress Pro/100B PCI Fast Ethernet driver
37  */
38 
39 #include "bpfilter.h"
40 
41 #include <sys/param.h>
42 #include <sys/systm.h>
43 #include <sys/mbuf.h>
44 #include <sys/malloc.h>
45 #include <sys/kernel.h>
46 #include <sys/socket.h>
47 #include <sys/syslog.h>
48 
49 #include <net/if.h>
50 #include <net/if_dl.h>
51 #include <net/if_media.h>
52 #include <net/if_types.h>
53 
54 #ifdef INET
55 #include <netinet/in.h>
56 #include <netinet/in_systm.h>
57 #include <netinet/in_var.h>
58 #include <netinet/ip.h>
59 #endif
60 
61 #include <sys/ioctl.h>
62 #include <sys/errno.h>
63 #include <sys/device.h>
64 
65 #include <netinet/if_ether.h>
66 
67 #include <machine/cpu.h>
68 #include <machine/bus.h>
69 #include <machine/intr.h>
70 
71 #include <dev/mii/miivar.h>
72 
73 #include <dev/ic/fxpreg.h>
74 #include <dev/ic/fxpvar.h>
75 
76 #include <dev/pci/pcivar.h>
77 #include <dev/pci/pcireg.h>
78 #include <dev/pci/pcidevs.h>
79 
80 int fxp_pci_match(struct device *, void *, void *);
81 void fxp_pci_attach(struct device *, struct device *, void *);
82 
83 struct cfattach fxp_pci_ca = {
84 	sizeof(struct fxp_softc), fxp_pci_match, fxp_pci_attach
85 };
86 
87 const struct pci_matchid fxp_pci_devices[] = {
88 	{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_8255x },
89 	{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82559 },
90 	{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82559ER },
91 	{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82562 },
92 	{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82562EH_HPNA_0 },
93 	{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82562EH_HPNA_1 },
94 	{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82562EH_HPNA_2 },
95 	{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VE_0 },
96 	{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VE_1 },
97 	{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VE_2 },
98 	{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VE_3 },
99 	{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VE_4 },
100 	{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VE_5 },
101 	{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VE_6 },
102 	{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VE_7 },
103 	{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VE_8 },
104 	{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VM_0 },
105 	{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VM_1 },
106 	{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VM_2 },
107 	{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VM_3 },
108 	{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VM_4 },
109 	{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VM_5 },
110 	{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VM_6 },
111 	{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VM_7 },
112 	{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VM_8 },
113 	{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VM_9 },
114 	{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VM_10 },
115 	{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VM_11 },
116 	{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VM_12 },
117 	{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VM_13 },
118 	{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VM_14 },
119 	{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VM_15 },
120 	{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VM_16 },
121 	{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VM_17 },
122 	{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VM_18 },
123 	{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_VM_19 },
124 	{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100_M },
125 	{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_PRO_100 },
126 	{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801DB_LAN },
127 	{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801E_LAN_1 },
128 	{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801E_LAN_2 },
129 	{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801FB_LAN },
130 	{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801FB_LAN_2 },
131 	{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801FBM_LAN },
132 	{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801GB_LAN },
133 	{ PCI_VENDOR_INTEL, PCI_PRODUCT_INTEL_82801GB_LAN_2 },
134 };
135 
136 int
fxp_pci_match(parent,match,aux)137 fxp_pci_match(parent, match, aux)
138 	struct device *parent;
139 	void *match;
140 	void *aux;
141 {
142 	return (pci_matchbyid((struct pci_attach_args *)aux, fxp_pci_devices,
143 	    sizeof(fxp_pci_devices)/sizeof(fxp_pci_devices[0])));
144 }
145 
146 void
fxp_pci_attach(parent,self,aux)147 fxp_pci_attach(parent, self, aux)
148 	struct device *parent, *self;
149 	void *aux;
150 {
151 	struct fxp_softc *sc = (struct fxp_softc *)self;
152 	struct pci_attach_args *pa = aux;
153 	pci_chipset_tag_t pc = pa->pa_pc;
154 	pci_intr_handle_t ih;
155 	const char *chipname = NULL;
156 	const char *intrstr = NULL;
157 	bus_size_t iosize;
158 
159 	if (pci_mapreg_map(pa, FXP_PCI_IOBA, PCI_MAPREG_TYPE_IO, 0,
160 	    &sc->sc_st, &sc->sc_sh, NULL, &iosize, 0)) {
161 		printf(": can't map i/o space\n");
162 		return;
163 	}
164 	sc->sc_dmat = pa->pa_dmat;
165 
166 	sc->sc_revision = PCI_REVISION(pa->pa_class);
167 
168 	/*
169 	 * Allocate our interrupt.
170 	 */
171 	if (pci_intr_map(pa, &ih)) {
172 		printf(": couldn't map interrupt\n");
173 		bus_space_unmap(sc->sc_st, sc->sc_sh, iosize);
174 		return;
175 	}
176 
177 	intrstr = pci_intr_string(pc, ih);
178 	sc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, fxp_intr, sc,
179 	    self->dv_xname);
180 	if (sc->sc_ih == NULL) {
181 		printf(": couldn't establish interrupt");
182 		if (intrstr != NULL)
183 			printf(" at %s", intrstr);
184 		printf("\n");
185 		bus_space_unmap(sc->sc_st, sc->sc_sh, iosize);
186 		return;
187 	}
188 
189 	switch (PCI_PRODUCT(pa->pa_id)) {
190 	case PCI_PRODUCT_INTEL_8255x:
191 	case PCI_PRODUCT_INTEL_82559:
192 	case PCI_PRODUCT_INTEL_82559ER:
193 	{
194 		chipname = "i82557";
195 		if (sc->sc_revision >= FXP_REV_82558_A4)
196 			chipname = "i82558";
197 		if (sc->sc_revision >= FXP_REV_82559_A0)
198 			chipname = "i82559";
199 		if (sc->sc_revision >= FXP_REV_82559S_A)
200 			chipname = "i82559S";
201 		if (sc->sc_revision >= FXP_REV_82550)
202 			chipname = "i82550";
203 		if (sc->sc_revision >= FXP_REV_82551_E)
204 			chipname = "i82551";
205 		break;
206 	}
207 		break;
208 	default:
209 		chipname = "i82562";
210 		break;
211 	}
212 
213 	if (chipname != NULL)
214 		printf(", %s", chipname);
215 
216 	/*
217 	 * Cards for which we should WRITE TO THE EEPROM
218 	 * to turn off dynamic standby mode to avoid
219 	 * a problem where the card will fail to resume when
220 	 * entering the IDLE state. We use this nasty if statement
221 	 * and corresponding pci dev numbers directly so that people
222 	 * know not to add new cards to this unless you are really
223 	 * certain what you are doing and are not going to end up
224 	 * killing people's eeproms.
225 	 */
226 	if ((PCI_VENDOR(pa->pa_id) == PCI_VENDOR_INTEL) &&
227 	    (PCI_PRODUCT(pa->pa_id) == 0x2449 ||
228 	    (PCI_PRODUCT(pa->pa_id) > 0x1030 &&
229 	    PCI_PRODUCT(pa->pa_id) < 0x1039) ||
230 	    (PCI_PRODUCT(pa->pa_id) == 0x1229 &&
231 	    (sc->sc_revision >= 8 && sc->sc_revision <= 16))))
232 		sc->sc_flags |= FXPF_DISABLE_STANDBY;
233 
234 	/* enable bus mastering */
235 	pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG,
236 	    PCI_COMMAND_MASTER_ENABLE |
237 	    pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG));
238 
239 	/*
240 	 * enable PCI Memory Write and Invalidate command
241 	 */
242 	if (sc->sc_revision >= FXP_REV_82558_A4)
243 		if (PCI_CACHELINE(pci_conf_read(pa->pa_pc, pa->pa_tag,
244 		    PCI_BHLC_REG))) {
245 			pci_conf_write(pa->pa_pc, pa->pa_tag,
246 			    PCI_COMMAND_STATUS_REG,
247 			    PCI_COMMAND_INVALIDATE_ENABLE |
248 			    pci_conf_read(pa->pa_pc, pa->pa_tag,
249 			    PCI_COMMAND_STATUS_REG));
250 			sc->sc_flags |= FXPF_MWI_ENABLE;
251 		}
252 
253 	/* Do generic parts of attach. */
254 	if (fxp_attach_common(sc, intrstr)) {
255 		/* Failed! */
256 		pci_intr_disestablish(pc, sc->sc_ih);
257 		bus_space_unmap(sc->sc_st, sc->sc_sh, iosize);
258 		return;
259 	}
260 }
261