1 /* $OpenBSD: ichreg.h,v 1.1 2004/02/19 21:35:56 grange Exp $ */ 2 /* 3 * Copyright (c) 2004 Alexander Yurchenko <grange@openbsd.org> 4 * 5 * Permission to use, copy, modify, and distribute this software for any 6 * purpose with or without fee is hereby granted, provided that the above 7 * copyright notice and this permission notice appear in all copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16 */ 17 18 #ifndef _DEV_PCI_ICHREG_H_ 19 #define _DEV_PCI_ICHREG_H_ 20 21 /* 22 * Intel ICH registers definitions 23 */ 24 25 /* 26 * LPC interface bridge registers 27 */ 28 29 /* 30 * PCI configuration registers 31 */ 32 #define ICH_PMBASE 0x40 /* ACPI base address */ 33 #define ICH_GEN_PMCON1 0xa0 /* general PM configuration */ 34 /* ICHx-M only */ 35 #define ICH_GEN_PMCON1_SS_EN 0x08 /* enable SpeedStep */ 36 37 #define ICH_PMSIZE 128 /* ACPI space size */ 38 39 /* 40 * Power management I/O registers 41 */ 42 /* ICHx-M only */ 43 #define ICH_PM_CNTL 0x20 /* power management control */ 44 #define ICH_PM_ARB_DIS 0x01 /* disable arbiter */ 45 #define ICH_PM_SS_CNTL 0x50 /* SpeedStep control */ 46 #define ICH_PM_SS_STATE_LOW 0x01 /* low power state */ 47 48 #endif /* !_DEV_PCI_ICHREG_H_ */ 49