1 /* $OpenBSD: rlphy.c,v 1.18 2005/05/27 08:04:15 brad Exp $ */
2
3 /*
4 * Copyright (c) 1998, 1999 Jason L. Wright (jason@thought.net)
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
18 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
19 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
20 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
21 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
22 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
24 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
25 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26 * POSSIBILITY OF SUCH DAMAGE.
27 */
28
29 /*
30 * Driver for the internal PHY found on RTL8139 based nics, based
31 * on drivers for the 'exphy' (Internal 3Com phys) and 'nsphy'
32 * (National Semiconductor DP83840).
33 */
34
35 #include <sys/param.h>
36 #include <sys/systm.h>
37 #include <sys/kernel.h>
38 #include <sys/device.h>
39 #include <sys/socket.h>
40 #include <sys/errno.h>
41
42 #include <net/if.h>
43 #include <net/if_media.h>
44 #include <netinet/in.h>
45 #include <netinet/if_ether.h>
46
47 #include <dev/mii/mii.h>
48 #include <dev/mii/miivar.h>
49 #include <dev/mii/miidevs.h>
50 #include <machine/bus.h>
51 #include <dev/ic/rtl81x9reg.h>
52
53 int rlphymatch(struct device *, void *, void *);
54 void rlphyattach(struct device *, struct device *, void *);
55
56 struct cfattach rlphy_ca = {
57 sizeof(struct mii_softc), rlphymatch, rlphyattach, mii_phy_detach,
58 mii_phy_activate
59 };
60
61 struct cfdriver rlphy_cd = {
62 NULL, "rlphy", DV_DULL
63 };
64
65 int rlphy_service(struct mii_softc *, struct mii_data *, int);
66 void rlphy_status(struct mii_softc *);
67
68 const struct mii_phy_funcs rlphy_funcs = {
69 rlphy_service, rlphy_status, mii_phy_reset,
70 };
71
72 int
rlphymatch(struct device * parent,void * match,void * aux)73 rlphymatch(struct device *parent, void *match, void *aux)
74 {
75 struct mii_attach_args *ma = aux;
76
77 /* Test for RealTek 8201L PHY */
78 if (MII_OUI(ma->mii_id1, ma->mii_id2) == MII_OUI_REALTEK &&
79 MII_MODEL(ma->mii_id2) == MII_MODEL_REALTEK_RTL8201L) {
80 return (10);
81 }
82
83 if (MII_OUI(ma->mii_id1, ma->mii_id2) != 0 ||
84 MII_MODEL(ma->mii_id2) != 0)
85 return (0);
86
87 if (strcmp(parent->dv_cfdata->cf_driver->cd_name, "rl") != 0)
88 return (0);
89
90 /*
91 * A "real" phy should get preference, but on the 8139 there
92 * is no phyid register.
93 */
94 return (5);
95 }
96
97 void
rlphyattach(struct device * parent,struct device * self,void * aux)98 rlphyattach(struct device *parent, struct device *self, void *aux)
99 {
100 struct mii_softc *sc = (struct mii_softc *)self;
101 struct mii_attach_args *ma = aux;
102 struct mii_data *mii = ma->mii_data;
103
104 if (MII_MODEL(ma->mii_id2) == MII_MODEL_REALTEK_RTL8201L) {
105 printf(": %s, rev. %d\n", MII_STR_REALTEK_RTL8201L,
106 MII_REV(ma->mii_id2));
107 } else
108 printf(": RTL internal phy\n");
109
110 sc->mii_inst = mii->mii_instance;
111 sc->mii_phy = ma->mii_phyno;
112 sc->mii_funcs = &rlphy_funcs;
113 sc->mii_pdata = mii;
114 sc->mii_flags = ma->mii_flags;
115
116 sc->mii_flags |= MIIF_NOISOLATE;
117
118 PHY_RESET(sc);
119
120 sc->mii_capabilities =
121 PHY_READ(sc, MII_BMSR) & ma->mii_capmask;
122 if (sc->mii_capabilities & BMSR_MEDIAMASK)
123 mii_phy_add_media(sc);
124 }
125
126 int
rlphy_service(struct mii_softc * sc,struct mii_data * mii,int cmd)127 rlphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
128 {
129 struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
130
131 if ((sc->mii_dev.dv_flags & DVF_ACTIVE) == 0)
132 return (ENXIO);
133
134 /*
135 * Can't isolate the RTL8139 phy, so it has to be the only one.
136 */
137 if (IFM_INST(ife->ifm_media) != sc->mii_inst)
138 panic("rlphy_service: attempt to isolate phy");
139
140 switch (cmd) {
141 case MII_POLLSTAT:
142 break;
143
144 case MII_MEDIACHG:
145 /*
146 * If the interface is not up, don't do anything.
147 */
148 if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
149 break;
150
151 switch (IFM_SUBTYPE(ife->ifm_media)) {
152 case IFM_AUTO:
153 /*
154 * If we're already in auto mode, just return.
155 */
156 if (PHY_READ(sc, MII_BMCR) & BMCR_AUTOEN)
157 return (0);
158 (void) mii_phy_auto(sc, 0);
159 break;
160 case IFM_100_T4:
161 /*
162 * XXX Not supported as a manual setting right now.
163 */
164 return (EINVAL);
165 default:
166 /*
167 * BMCR data is stored in the ifmedia entry.
168 */
169 PHY_WRITE(sc, MII_ANAR,
170 mii_anar(ife->ifm_media));
171 PHY_WRITE(sc, MII_BMCR, ife->ifm_data);
172 }
173 break;
174
175 case MII_TICK:
176 /*
177 * Is the interface even up?
178 */
179 if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
180 return (0);
181
182 /*
183 * Only used for autonegotiation.
184 */
185 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO)
186 break;
187
188 /*
189 * The RealTek PHY's autonegotiation doesn't need to be
190 * kicked; it continues in the background.
191 */
192 break;
193
194 case MII_DOWN:
195 mii_phy_down(sc);
196 return (0);
197 }
198
199 /* Update the media status. */
200 mii_phy_status(sc);
201
202 /* Callback if something changed. */
203 mii_phy_update(sc, cmd);
204 return (0);
205 }
206
207 void
rlphy_status(struct mii_softc * sc)208 rlphy_status(struct mii_softc *sc)
209 {
210 struct mii_data *mii = sc->mii_pdata;
211 struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
212 int bmsr, bmcr, anlpar;
213
214 mii->mii_media_status = IFM_AVALID;
215 mii->mii_media_active = IFM_ETHER;
216
217 bmsr = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR);
218 if (bmsr & BMSR_LINK)
219 mii->mii_media_status |= IFM_ACTIVE;
220
221 bmcr = PHY_READ(sc, MII_BMCR);
222 if (bmcr & BMCR_ISO) {
223 mii->mii_media_active |= IFM_NONE;
224 mii->mii_media_status = 0;
225 return;
226 }
227
228 if (bmcr & BMCR_LOOP)
229 mii->mii_media_active |= IFM_LOOP;
230
231 if (bmcr & BMCR_AUTOEN) {
232 /*
233 * NWay autonegotiation takes the highest-order common
234 * bit of the ANAR and ANLPAR (i.e. best media advertised
235 * both by us and our link partner).
236 */
237 if ((bmsr & BMSR_ACOMP) == 0) {
238 /* Erg, still trying, I guess... */
239 mii->mii_media_active |= IFM_NONE;
240 return;
241 }
242
243 if ((anlpar = PHY_READ(sc, MII_ANAR) &
244 PHY_READ(sc, MII_ANLPAR))) {
245 if (anlpar & ANLPAR_T4)
246 mii->mii_media_active |= IFM_100_T4;
247 else if (anlpar & ANLPAR_TX_FD)
248 mii->mii_media_active |= IFM_100_TX|IFM_FDX;
249 else if (anlpar & ANLPAR_TX)
250 mii->mii_media_active |= IFM_100_TX;
251 else if (anlpar & ANLPAR_10_FD)
252 mii->mii_media_active |= IFM_10_T|IFM_FDX;
253 else if (anlpar & ANLPAR_10)
254 mii->mii_media_active |= IFM_10_T;
255 else
256 mii->mii_media_active |= IFM_NONE;
257 return;
258 }
259
260 /*
261 * If the other side doesn't support NWAY, then the
262 * best we can do is determine if we have a 10Mbps or
263 * 100Mbps link. There's no way to know if the link
264 * is full or half duplex, so we default to half duplex
265 * and hope that the user is clever enough to manually
266 * change the media settings if we're wrong.
267 */
268
269 /*
270 * The RealTek PHY supports non-NWAY link speed
271 * detection, however it does not report the link
272 * detection results via the ANLPAR or BMSR registers.
273 * (What? RealTek doesn't do things the way everyone
274 * else does? I'm just shocked, shocked I tell you.)
275 * To determine the link speed, we have to do one
276 * of two things:
277 *
278 * - If this is a standalone RealTek RTL8201(L) PHY,
279 * we can determine the link speed by testing bit 0
280 * in the magic, vendor-specific register at offset
281 * 0x19.
282 *
283 * - If this is a RealTek MAC with integrated PHY, we
284 * can test the 'SPEED10' bit of the MAC's media status
285 * register.
286 */
287 if (strcmp("rl",
288 sc->mii_dev.dv_parent->dv_cfdata->cf_driver->cd_name)
289 == 0) {
290 if (PHY_READ(sc, RL_MEDIASTAT) & RL_MEDIASTAT_SPEED10)
291 mii->mii_media_active |= IFM_10_T;
292 else
293 mii->mii_media_active |= IFM_100_TX;
294 } else {
295 if (PHY_READ(sc, 0x0019) & 0x01)
296 mii->mii_media_active |= IFM_100_TX;
297 else
298 mii->mii_media_active |= IFM_10_T;
299 }
300
301 } else
302 mii->mii_media_active = ife->ifm_media;
303 }
304